This document summarizes logic circuit design and analysis for Group 3. It includes verification of inputs and outputs, creation of truth tables, simplification using K-maps, and Boolean algebra. Truth tables are shown for the logic functions F1, F2, and F3 in terms of the inputs A, B, and C. F1, F2, and F3 are then expressed as simplified Boolean expressions.

1. Kelompok 3

2.  Veriikasi input dan output
 Membuat tabel kebenaran
 Penyederhanaan dengan k-map
 Aljabar boole
 Membuat rangkaian logic

4. n A B C F1 F2 F3
1 0 0 0 1 0 0
2 0 0 1 0 1 0
3 0 1 0 0 0 1
4 0 1 1 1 0 0
5 1 0 0 0 1 0
6 1 0 1 0 0 1
7 1 1 0 1 0 0
8 1 1 1 0 1 0

5.  F1 =
F1=A̅B̅C̅ +A̅BC + ABC̅
C |AB 00 01 11 10
0 1 0 1 0
1 0 1 0 0
n A B C F1
1 0 0 0 1
2 0 0 1 0
3 0 1 0 0
4 0 1 1 1
5 1 0 0 0
6 1 0 1 0
7 1 1 0 1
8 1 1 1 0

6.  F2 =
F2= A̅B̅C + ABC + AB̅C̅
C |AB 00 01 11 10
0 0 0 0 1
1 1 0 1 0
n A B C F2
1 0 0 0 0
2 0 0 1 1
3 0 1 0 0
4 0 1 1 0
5 1 0 0 1
6 1 0 1 0
7 1 1 0 0
8 1 1 1 1

7.  F3 =
F3=A̅BC̅+ AB̅C
C |AB 00 01 11 10
0 0 1 0 0
1 0 0 0 1
n A B C F3
1 0 0 0 0
2 0 0 1 0
3 0 1 0 1
4 0 1 1 0
5 1 0 0 0
6 1 0 1 1
7 1 1 0 0
8 1 1 1 0