1. S3 INFOTECH
S.NO
YEAR
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2012
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2013
3
2014
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2013
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2013
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2013
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2013
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2013
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2013
10
2013
919884848198
VLSI IEEE TITLES-2013
BPSK System On Spartan 3E FPGA
Cost-Effective FPGA Instrument For Harmonic And Interharmonic Monitoring
Development Of An FPGA-Based SPWM Generator For High Switching
Frequency DC/AC Inverters
Efficient Elliptic Curve Point Multiplication Using Digit-Serial Binary Field
Operations
Efficient FPGA Implementation Of Address Generator For WIMAX
Deinterleaver
Low-Power Correlation For IEEE 802.16 OFDM Synchronization On FPGA
Novel Architecture For Efficient FPGA Implementation Of Elliptic Curve
Cryptographic Processor Over GF(2163)
Power Efficient, FPGA Implementations Of Transform Algorithms For RadarBased Digital Receiver Applications
Simple Digital Pulse Width Modulator Under 100 Ps Resolution Using
General-Purpose FPGAS
The LUT-SR Family Of Uniform Random Number Generators For FPGA
Architectures
# 10/1, Jones Road, Saidapet, Chennai – 15. Ph: 044-3201 7467, 9884848198.
www.s3computers.com
E-Mail: info@s3computers.com
2. S3 INFOTECH
919884848198
S.NO
YEAR
VLSI IEEE TITLES-2013
11
2013
ADPLL Design And Implementation On FPGA
12
2013
Energy Efficient Design And Implementation Of ALU On 40nm FPGA
13
2013
FPGA Implementation Of Discrete Fourier Transform Core Using NEDA
14
2013
15
2013
16
2013
17
2013
The Implementation Of FIR Low-Pass Filter Based On FPGA And DA
18
2013
Design And Implementation Of Numerical Controlled Oscillator On FPGA
19
2013
Design And Implementation SDR Based QPSK Modulator On FPGA
20
2013
Area Optimized FPGA Implementation Of Color Edge Detection
FPGA Implementation Of Digital Local Oscillator For Digital Stretch
Processing
FPGA Implementation Of 16-Point Radix-4 Complex FFT Core Using NEDA
FPGA Implementation Of Fast Serial 64-Points FFT/IFFT Block Without
Reordering Block
# 10/1, Jones Road, Saidapet, Chennai – 15. Ph: 044-3201 7467, 9884848198.
www.s3computers.com
E-Mail: info@s3computers.com