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Unit_2_Boolean_algebra_and_Karnaugh_maps.pptx
1. Unit 2 Boolean algebra and Karnaugh maps
Boolean algebra rules and Boolean laws: Commutative,
Associative, Distributive, AND, OR and Inversion laws, De
Morgan’s theorem, Universal gates, Simplifications of Logic
equations using Boolean algebra rules and Karnaugh map (up
to 4 bit).
Lab Session: - Binary to Gray Interconversion of Logic Gates
30. 0 0
0 1
A B Y
0 0 0
0 1 0
1 0 0
1 1 1
0
0
1
1
A
B
Y=A.B
31. 3 INPUTS A, B AND C x yz
Y IS THE OUTPUT
Y=1 when inputs is >=4
Represent in kmap
0 00
1 01
3 11
2 10
32. 3 INPUTS A, B AND C
Y IS THE OUTPUT
Y=1 when of the inputs is >=4
Represent in kmap
A B C Y
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1
4 2 1
33. 3 INPUTS A, B AND C
X & Y ARE THE OUTPUT
X=1 when inputs ARE >=4
Y=1 when inputs ARE <=4
Represent in kmap
INPUTS OUTPUTS
A B C X Y
0 0 0 0 1
0 0 1 0 1
0 1 0 0 1
0 1 1 0 1
1 0 0 1 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 0
4 2 1
34. FOR Y =A’+C’.B’
C’ C
AB C 0 1
A’B’ 00 1 1
A’B 01 1 1
AB 11 0 0
AB’ 10 1 0
35.
36.
37.
38. Y= C + AB
Octet : 3 variables are
eliminated
Quad: 2 variables are
eliminated
Pair: 2 variables are
eliminated
BC…> 00 01 11 10
A
0 1 1
1 1 1 1
50. Same i/p = 0 output
different i/p’s = 1 output
• g2 g1 g0
1 1 0 gray------ bin
………………………….
1 0 0
• b2 b1 b0
51. Unit 3: Introduction to
Combinational Circuits
Introduction to Combinational Circuits Basic Logic gates
(NOT, OR, AND) & derived gates (NAND, NOR, EXOR)
Symbol and truth table, half adder, full adder, Half
subtractor, Four bit parallel adder. Multiplexer (4:1),
demultiplexer (1:4) and their applications, Code
converters - Decimal to binary, Hexadecimal to binary,
BCD to decimal, Concept of Encoder & decoder. Lab
Session: - To Study 4: 1 Multiplexer and 1 : Demultiplexer
To Study nibble adder and Subtractor circuit