3. TC0
Timer/Counter0 (TC0) is a general purpose 8-bit Timer/Counter module.
Would have a range of 0 - 255.
It allows program execution timing (event management) and wave generation.
4. TC1
Timer/Counter1 (TC1) is a general purpose 16-bit Timer/Counter module.
Range from 0 - 65536
It allows accurate program execution timing (event management), wave
generation, and signal timing measurement.
5. TC2
Timer/Counter2 (TC2) is a general purpose, channel, 8-bit Timer/Counter module.
The Timer/Counter can be clocked internally, via the prescaler, or asynchronously
clocked from the TOSC1/2 pins.
Allows Clocking from External 32kHz Watch Crystal Independent of the I/O Clock
7. Internal signals used in Counter unit
Signal Name Description
count Increment or decrement TCNT0 by 1.
direction Select between increment and decrement.
clear Clear TCNT0 (set all bits to zero).
clkTn
Timer/Counter clock, referred to as clkT0
in the
following.
top Signalize that TCNT0 has reached maximum
value.
bottom Signalize that TCNT0 has reached minimum
value (zero).
Depending of the
mode of operation
used, the counter
is cleared,
incremented, or
decremented at
each timer clock
(clkT0
).
8. Why Mode of Operation?
How the counter behaves (counts) and how waveforms are generated on the
Output Compare outputs OC0A and OC0B
.The counting sequence is determined.
How the Timer/Counter Overflow Flag (TOV0) is set
9. Modes of Operation
The mode of operation determines the behavior of the Timer/Counter and the
Output Compare pins
Mode is defined by the combination of the Waveform Generation mode bits and
Compare Output mode.
Waveform Generation mode affects the counting.
10. Action to be performed
Inverted
PWM
PWM
Output
Compare
Mode
Non-PWM
Output set
Output
Cleared
Non-Inverted
PWM
Output
toggled
11. Normal Mode
In this mode the counting direction is always up (incrementing), and no counter
clear is performed.
Timer/Counter Overflow Flag (TOV1) will be set in the same clock cycle in which
the TCNT1 becomes zero. the TOV1 Flag behaves like a ninth bit.
For TC0
12. Clear Timer on Compare Match (CTC) Mode
The counter is cleared to ZERO when the counter value (TCNT0) matches the
OCR0A.
Timer/Counter
Overflow Flag
is set in the
same clock
cycle that the
counter wraps
from MAX to
0x00.
13. Fast PWM Mode
It provide a high frequency PWM waveform generation option.Differ by their
single-slope operation.The counter counts from BOTTOM to TOP, then restarts
from BOTTOM.
14. Phase Correct PWM Mode
The Phase Correct PWM mode provides a high resolution, phase correct PWM
waveform generation. The Phase Correct PWM mode is based on dual-slope
operation. The counter counts repeatedly from BOTTOM to TOP, and then from
TOP to BOTTOM.