Anton Bobkov is a software engineer with over 20 years of experience developing real-time signal processing algorithms for applications including IP telephony, wireless technologies, speech and image/video processing. He has expertise in algorithm optimization for embedded implementations including bare metal systems. His background includes positions at Intel, Terayon Communication Systems, Internet Telecom, and the Popov's Institute for Broadcasting Receptions and Acoustics.

1. Anton F. Bobkov
Russia,
192284, St.-Petersburg,
Zagrebskiy blvd, 15-170
Phone: +7 (812) 456 4425
+7 (911) 916 3083
E-Mail: Anton.Bobkov@bk.ru
Summary 4+ years experience in software development and implementation of real-time signal processing
algorithms for IP-telephony applications.
5+ years experience in software development, implementation and optimization of real-time signal
processing algorithms for wireless applications.
7+ years experience in software development and implementation of real-time speech and
image/video processing algorithms.
5+ years experience in developing and optimization SW for embedded implementation including
bare metal.
In-depth understanding of digital processing theory. Deep knowledge of wireless technologies
(WiFi, WiMAX), video and audio processing.
Fast learning team player.
Employment History
04.2003 – 05.2015 Intel Corporation
(www.intel.com, NASDAQ: INTC)
 Design and implement low-power always-on Keyphrase Detector for Wearable Device
- Rewrite, optimize, debug and verify Keyphrase Detector bare metal implementation for HLS tool.
- Develop and implement algorithm modification with reduced memory consumption and memory access
pattern to avoid memory read/write conflicts without performance degradation.
- Rewrite the Keyphrase Detector for small programmable core, make optimization using assembler, define
parts suitable for HW accelerators and implement the defined accelerators in HW-friendly form achieving
20x performance increase.
- Implement SystemC test bench for Keyphrase Detector modules.
 Implement Video Post Processing filters for HW
- Rewrite, optimize, debug and verify the filters in newly developed language suitable for HW implementation.
- Provide feedback to the language developer
- Rewrite, optimize, debug and verify the filters for HLS tool
- Redesign memory access algorithm, implement Register File to support single read/write memory port and
asynchronous memory access without degradation in performance.
 Design and implement PHY 802.11a/n (MIMO) FW for new communication core
- Implement bit and packet-accurate Test Vector Generator for full TX and RX chains for Simulation, pre-
Silicon and post-Silicon validation
- Develop and implement PHY Baseband FW for new core using machine code programming
- Rewrite PHY Baseband FW for next generation of the core using newly developed language.
- Implement the channel model with different impairments for performance measurements and pre/post-
Silicon verification.
- Support pre/post-Silicon verification.
 Optimize the Speech Recognizer for ARC processor
- Find hotspots and rewrite them using ARC 625D DSP operations.
 Create a set of Proof-of-Concept live demos
- For Face and Iris detector using OpenCV
- For Keyphrase Detector, Speaker ID, Voice Command and Control algorithm, Speech Recognizer using
Python and C/C++ libraries.
- Create live demo for Voice Command and Control for Intel Galileo Board.
 Take part in set of research projects
- In Speech Recognition area (Sphinx, SREC)
- In Video Compression area (H.264)
- In Image Processing (Deblur)
04.2000 – 10.2002 Terayon Communication Systems Inc. (Prague Branch)
(www.terayon.com, NASDAQ:TERN)
 Design and implement ITU-T G.726 vocoder for Terayon TA 102 eMTA.
 Take part in design and implementation of ITU-T T.38 FoIP gateway.
 Take part in implementation of ITU-T T.30, ITU-T G.168 Recommendations.
 Develop and implement a set of fixed-point algorithms for Terayon TA 102 eMTA
02.2000 – 04.2000 Internet Telecom (St.-Petersburg Branch)
 Design DTMF information transmission based on RFC 2833.
 Design algorithm of ITU-T V.8 session controller.
10.1997 – 01.2000 Popov’s Institute for Broadcasting Receptions and Acoustics (St.-Petersburg)
 Take part in design of Digital Audio Broadcasting system Eureka-147/DAB.
 Implement MPEG-1 Layer-2 coder.
01.1994 – 05.1996 Faculty of Digital Signal Processing of Saint-Petersburg State University of
Telecommunication
 Created model of Short Wave Radio Channel.
 Researched quantization methods of line spectral roots.

2. Skills  Optimization and efficient implementation of SW for different platforms such as General CPU,
DSP, Custom Reconfigurable Core and Bare Metal.
 SW development and debugging for embedded real-time systems.
 SW/HW debugging using behavioral, function and instruction accurate simulators, cycle accurate
and RTL simulators.
 Implementation of test benches for different level of verification.
 Professional knowledge of modern DSP techniques for compression, filtering, detection,
demodulation, generation of signals. Fixed-point implementation of DSP algorithms. Optimization
and implementation of DSP algorithm for HW/SW real-time systems.
 Knowledge in Physical Layer of modern wireless protocols such as 802.11 (WiFi) and 802.16
(WiMAX) including MIMO techniques and demodulation.
Operation Systems: Windows 8/7/XP/2000/NT/98, Linux, DOS.
Programming Languages: C/C++, SystemC, Script Languages, Microcode programming, MatLab.
Languages Russian (Native), English (Conversational, Technical), Czech (Conversational).
Education Saint-Petersburg State University of Telecommunication.
Master of Science Degree in Radio Technique, Radio Engineer.
Personal data Born in St. Petersburg, Russia, on June 21, 1975. Married, no children. Have valid foreign passport.
Ready to Relocate