Spicy swan pb_reports_200416_02

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The document is a webpage displaying circuit simulation reports from the software Spicy Schematics & Circuit Simulation. It shows 37 reports that were generated using the design report feature of Spicy. Each report can be viewed by clicking on its link. The reports are numbered from 1587 to 1543. The webpage is copyrighted from 2011 to 2015 by iSchematics LLC.

4/20/2016 Spicy Schematics & Circuit Simulation Spice MyReports © 20112013 iSchematics.com
https://www.ischematics.com/webspicy/myReports.py?STDLINK=aGg0TWtSelVQS3lDbTVkbVVENFpIUGVIWHBjaTJlaTVoTE0xeWl3MDFaUC94dThWYTMvSUFtOGtXRXJYZlpvY0UyeVVpcWQ4d1I3b2VZdmVxbGxQWm… 1/15
Reports for: piero.belforte@gmail.com
These examples below were generated in Spicy using the Design Report feature.
Click on the report links to see the full design report
Show All Previous Next Page 2 of 37
Report 1587 Report 1586 Report 1585
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Frequency domain Vector Fitting (VF) is a well known technique to generate circuital models of a spatially discretized lossy transmission lines from theoretical formulation of losses. The sub-picosecond time steps required by multi-gigahertz bandwidths and short transmission lines included in the models, determine long Spice simulation times. A 100X speedup can be gained using the Digital Wave Simulator (DWS) instead of Spice. DWS processes the waves of a Digital Network built up connecting together scattering blocks (circuit elements, nodes and S-parameter multi-ports) coming from a Spice-like description. Being a DSP wave processor instead of a classical nodal equations solver, DWS is computationally very fast and numerically stable. Comparisons with commercial simulators like Microcap11 and CST Cable Studio show a good matching of results. A further 10-100X simulation speedup is obtained if Piecewise-Linear Fitting (PWLF) is used to describe the time-domain behaviors of Scattering Parameters. Single or multiple cell Behavioral Time Models (BTM) can be extracted by PWLF from TDR/TDT measurements and processed by DWS fast convolution algorithms. A setup de-embedding can be performed by pwl breakpoints optimization to fit actual measurements. A RG58 coaxial cable is analyzed and its VF-derived eye-diagrams are compared to PWLF measurement-derived results. At multi-gigabit rates significant differences, due to cable physical implementation effects, are observed. The modeling/simulation alternatives (VF/Spice, VF/DWS and PWLF/DWS) are compared together and the advantages of PWLF/DWS in term of simplicity, stability and speed are highlighted.

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A parallel-plate capacitor implemented by a rectangular double-sided printed circuit board is characterized by means a stimulus signal injected at a corner. Both frequency-domain (VNA) and time-domain (TDR) techniques are utilized to determine the step response of the reflected wave (S11) to be compared to the theoretical behavior of the equivalent parallel plate capacitance. A commercial application is utilized to convert the frequency domain tabulated data of the frequency response into the corresponding TDR response. A very accurate and fast 2D TLM (Transmission Line Model) model can be easily extracted from these single time-domain experimental responses.

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This document describes the modeling methodology used to assess the performance of these probes in terms of allowed digital bandwidth of signals chosen for temporary fault insertion trials. This methodology is based on time-domain characterization of Scattering parameters (TDR/TDT) and subsequent extraction of a Behavioral Time-domain Model (BTM) [13] of the probe itself. This technique called PWLFIT (Piece-Wise Linear FITting) [14] [15]is supported by the Digital Wave Simulator DWS [16] [17] and its companion tool DWV [18] developed starting in the early '90s for very fast modeling and simulation of high-speed circuits and systems.

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