This document is a resume for A.Ramesh detailing his professional experience and education. He has over 2 years of experience working as a CAD design engineer at SMSilicon in Hyderabad where he implemented various methodologies to improve power and timing. His roles included setting up EM analysis flows, developing automation scripts, and creating a GUI for timing path analysis. Previously, he worked at Nvidia for 8 months focusing on design testing through writing test suites and debugging tools. He has an MTech from IIIT Hyderabad and BE from Swami Vivekanand Technical University.
CETPA INFOTECH PVT LTD is one of the IT education and training service provider brands of India that is preferably working in 3 most important domains. It includes IT Training services, software and embedded product development and consulting services.
Grokking Techtalk #38: Escape Analysis in Go compilerGrokking VN
Trong quá trình phân tích hiệu năng, hiểu và nắm vững ngôn ngữ lập trình cũng như cách thiết kế của nó là rất hữu ích. Go là một trong những ngôn ngữ được sử dụng phổ biến trong các hệ thống phân tán có hiệu năng cao. Để hiểu rõ hơn cách mà Go compiler phân tích cách cấp phát bộ nhớ khi biên dịch chương trình, hãy nghe những chia sẻ của anh Cường về Escape Analysis trong Go compiler.
Về diễn giả:
Anh Lê Mạnh Cường là một kĩ sư phần mềm có 8 năm kinh nghiệm chuyên sâu trong backend và Quản trị hệ thống Linux. Là một OSS contributor tích cực, anh Cường đã có nhiều cống hiến vào cộng đồng mã nguồn mở, đặc biệt là Go và ecosystem của Go.
CETPA INFOTECH PVT LTD is one of the IT education and training service provider brands of India that is preferably working in 3 most important domains. It includes IT Training services, software and embedded product development and consulting services.
Grokking Techtalk #38: Escape Analysis in Go compilerGrokking VN
Trong quá trình phân tích hiệu năng, hiểu và nắm vững ngôn ngữ lập trình cũng như cách thiết kế của nó là rất hữu ích. Go là một trong những ngôn ngữ được sử dụng phổ biến trong các hệ thống phân tán có hiệu năng cao. Để hiểu rõ hơn cách mà Go compiler phân tích cách cấp phát bộ nhớ khi biên dịch chương trình, hãy nghe những chia sẻ của anh Cường về Escape Analysis trong Go compiler.
Về diễn giả:
Anh Lê Mạnh Cường là một kĩ sư phần mềm có 8 năm kinh nghiệm chuyên sâu trong backend và Quản trị hệ thống Linux. Là một OSS contributor tích cực, anh Cường đã có nhiều cống hiến vào cộng đồng mã nguồn mở, đặc biệt là Go và ecosystem của Go.
Report contains digital and analog design flow procedures in detail, working, Simulation and Synthesize mapped output. Full custom Schematic and layout design by using virtuoso encounter cadence tool.
Report contains digital and analog design flow procedures in detail, working, Simulation and Synthesize mapped output. Full custom Schematic and layout design by using virtuoso encounter cadence tool.
Microservices for building an IDE – The innards of JetBrains Rider - TechDays...Maarten Balliauw
Ever wondered how IDE’s are built? In this talk, we’ll skip the marketing bit and dive into the architecture and implementation of JetBrains Rider. We’ll look at how and why we have built (and open sourced) a reactive protocol, and how the IDE uses a “microservices” architecture to communicate with the debugger, Roslyn, a WPF renderer and even other tools like Unity3D. We’ll explore how things are wired together, both in-process and across those microservices. Let’s geek out!
EclipseCon Eu 2015 - Breathe life into your Designer!melbats
You have your shiny new DSL up and running thanks to the Eclipse Modeling Technologies and you built a powerful tooling with graphical modelers, textual syntaxes or dedicated editors to support it. But how can you see what is going on when a model is executed ? Don't you need to simulate your design in some way ? Wouldn't you want to see your editors being animated directly within your modeling environment based on execution traces or simulator results?
The GEMOC Research Project designed a methodology to bring animation and execution analysis to DSLs. The companion technologies required to put this in action are small dedicated components (all open-source) at a "proof of concept" maturity level extending proven components : Sirius, Eclipse Debug, Xtend making such features within the reach of Eclipse based tooling. The general intent regarding those OSS technologies is to leverage them within different contexts and contribute them to Eclipse once proven strong enough. The method covers a large spectrum of use cases from DSLs with a straightforward execution semantic to a combination of different DSLs with concurrent execution semantic. Any tool provider can leverage both the technologies and the method to provide an executable DSL and animated graphical modelers to its users enabling simulation and debugging at an early phase of the design.
This talk presents the approach, the technologies and demonstrate it through an example: providing Eclipse Debug integration and diagram animation capabilities for Arduino Designer (EPL) : setting breakpoints, stepping forward or backward in the execution, inspecting the variables states... We will walk you through the steps required to develop such features, the choices to make and the trade-offs involved. Expects live demos with simulated blinking leds and a virtual cat robot !
Remix Your Language Tooling (JSConf.eu 2012)lennartkats
JavaScript has a vivid ecosystem of a passionate developer community, libraries, and tools. New frameworks keep pushing the boundaries what you can do with it, and the language family is rapidly expanding with new cousins; TypeScript being the latest. We’re building language tooling to provide an integrated experience with static error checks, code completion, API documentation, and so on. But how can we keep up with this changing environment? Let’s talk about effectively building language tools.
Report contains digital and analog design flow procedures in detail, working, Simulation and Synthesize mapped output. Full custom Schematic and layout design by using virtuoso encounter cadence tool.
Report contains digital and analog design flow procedures in detail, working, Simulation and Synthesize mapped output. Full custom Schematic and layout design by using virtuoso encounter cadence tool.
Microservices for building an IDE – The innards of JetBrains Rider - TechDays...Maarten Balliauw
Ever wondered how IDE’s are built? In this talk, we’ll skip the marketing bit and dive into the architecture and implementation of JetBrains Rider. We’ll look at how and why we have built (and open sourced) a reactive protocol, and how the IDE uses a “microservices” architecture to communicate with the debugger, Roslyn, a WPF renderer and even other tools like Unity3D. We’ll explore how things are wired together, both in-process and across those microservices. Let’s geek out!
EclipseCon Eu 2015 - Breathe life into your Designer!melbats
You have your shiny new DSL up and running thanks to the Eclipse Modeling Technologies and you built a powerful tooling with graphical modelers, textual syntaxes or dedicated editors to support it. But how can you see what is going on when a model is executed ? Don't you need to simulate your design in some way ? Wouldn't you want to see your editors being animated directly within your modeling environment based on execution traces or simulator results?
The GEMOC Research Project designed a methodology to bring animation and execution analysis to DSLs. The companion technologies required to put this in action are small dedicated components (all open-source) at a "proof of concept" maturity level extending proven components : Sirius, Eclipse Debug, Xtend making such features within the reach of Eclipse based tooling. The general intent regarding those OSS technologies is to leverage them within different contexts and contribute them to Eclipse once proven strong enough. The method covers a large spectrum of use cases from DSLs with a straightforward execution semantic to a combination of different DSLs with concurrent execution semantic. Any tool provider can leverage both the technologies and the method to provide an executable DSL and animated graphical modelers to its users enabling simulation and debugging at an early phase of the design.
This talk presents the approach, the technologies and demonstrate it through an example: providing Eclipse Debug integration and diagram animation capabilities for Arduino Designer (EPL) : setting breakpoints, stepping forward or backward in the execution, inspecting the variables states... We will walk you through the steps required to develop such features, the choices to make and the trade-offs involved. Expects live demos with simulated blinking leds and a virtual cat robot !
Remix Your Language Tooling (JSConf.eu 2012)lennartkats
JavaScript has a vivid ecosystem of a passionate developer community, libraries, and tools. New frameworks keep pushing the boundaries what you can do with it, and the language family is rapidly expanding with new cousins; TypeScript being the latest. We’re building language tooling to provide an integrated experience with static error checks, code completion, API documentation, and so on. But how can we keep up with this changing environment? Let’s talk about effectively building language tools.
NDC Sydney 2019 - Microservices for building an IDE – The innards of JetBrain...Maarten Balliauw
Ever wondered how IDE’s are built? In this talk, we’ll skip the marketing bit and dive into the architecture and implementation of JetBrains Rider.
We’ll look at how and why we have built (and open sourced) a reactive protocol, and how the IDE uses a “microservices” architecture to communicate with the debugger, Roslyn, a WPF renderer and even other tools like Unity3D. We’ll explore how things are wired together, both in-process and across those microservices. Let’s geek out!
Alberto Maria Angelo Paro - Isomorphic programming in Scala and WebDevelopmen...Codemotion
Scala is the only language that can be used to produce code that can be "trans/compiled" for the JVM, in Javascript and in native binary. This allows to write libraries that are usable in JVM and JS using the power of functional programming (i.e. cats, scalaz), generic programming (i.e. shapeless) and macro/scalameta available in Scala. In this talk, we will see how to write a Scala application backend and a SPA (scala.js/scala-js-react) that share the same code as a business logic, datamodels and transparent API call (JVM/JS) in Scala (via autowire/akka-http/circe).
ConFoo Montreal - Microservices for building an IDE - The innards of JetBrain...Maarten Balliauw
Ever wondered how IDE’s are built? In this talk, we’ll skip the marketing bit and dive into the architecture and implementation of JetBrains Rider. We’ll look at how and why we have built (and open sourced) a reactive protocol, and how the IDE uses a “microservices” architecture to communicate with the debugger, Roslyn, a WPF renderer and even other tools like Unity3D. We’ll explore how things are wired together, both in-process and across those microservices. Let’s geek out!
Whats New in Visual Studio 2012 for C++ DevelopersRainer Stropek
For a Microsoft event we have been hired to do a full-day workshop about news in Visual Studio 2012 for C++ developers. My colleague Philipp Aumayr conducted the workshop. Here are the slides for his talk. More details including sample code can be found in our developer blog at http://www.software-architects.com
Flink Forward Berlin 2018: Thomas Weise & Aljoscha Krettek - "Python Streamin...Flink Forward
Python is popular amongst data scientists and engineers for data processing tasks. The big data ecosystem has traditionally been rather JVM centric. Often Java (or Scala) are the only viable option to implement data processing pipelines. That sometimes poses an adoption barrier for organizations that have already invested in other language ecosystems. The Apache Beam project provides a unified programming model for data processing and its ongoing portability effort aims to enable multiple language SDKs (currently Java, Python and Go) on a common set of runners. The combination of Python streaming on the Apache Flink runner is one example. Let’s take a look how the Flink runner translates the Beam model into the native DataStream (or DataSet) API, how the runner is changing to support portable pipelines, how Python user code execution is coordinated with gRPC based services and how a sample pipeline runs on Flink.
Python is popular amongst data scientists and engineers for data processing tasks. The big data ecosystem has traditionally been rather JVM centric. Often Java (or Scala) are the only viable option to implement data processing pipelines. That sometimes poses an adoption barrier for organizations that have already invested in other language ecosystems. The Apache Beam project provides a unified programming model for data processing and its ongoing portability effort aims to enable multiple language SDKs (currently Java, Python and Go) on a common set of runners. The combination of Python streaming on the Apache Flink runner is one example. Let’s take a look how the Flink runner translates the Beam model into the native DataStream (or DataSet) API, how the runner is changing to support portable pipelines, how Python user code execution is coordinated with gRPC based services and how a sample pipeline runs on Flink.
I am Apoorva Tripathi currently worked in Cadence Design System as a Solution Intern. trained in front-end design and Verification,
I have experience in writing RTL models in Verilog HDL and Testbenches in SystemVerilog and UVM.
Currently, I am and looking for opportunities that require the same skills, I am sharing my resume with you.
Please review my profile and my resume is attached herewith.
Thanks and Regards
Apoorva Tripathi
{apoorvatripathi24@gmail.com}
1. A.Ramesh
#404,IndraNagar +918977939926
Hyderabad-500032
RESUME
ramesh4j1988@gmail.com
PROFESSIONAL EXPERIENCE
Total Experience : 2+ years .
Currently working at SMSilicon,Hyderabad.
Experience at SM Silicon,Hyderabad as CAD design engineer since Nov-2014
Roles at SMSilicon:
Setting up flow for static and dynamic EMIR analysis in Redhawk and its analysis.
Implemented own methodology to group single bit flop to TSMC’s multibit flop ,based on
the displacement limit and the slack at placement stage ,observed Improved power and
timing than cadence default flow.
Worked in PD-flow enhancements which includes syn/pnr flow using rcp/encounter.
Developed scripts to automate the licenses expiry report,ip-consistency checks, script to
find idle servers, different types of parsers using object oriented perl.
Created webpages to display all tsmc standard cell views available ,regressions results
of every day run(LVS,DRC,ANTENNA…), for the users at glance.
Deploying new tools from vendor site to servers, licenses bring up.
Vendor(Tsmc/synopsys) provided cell libraries,memory compilers setup & releases to
the teams ,support and debugg on CAD flow.
Generating macros(compiled memories) from synopsys compilers using integrator.
Created different parsers for sdf,libs in perl .
Support ,writing automation scripts for teams and tool development.
Know various Version control system like SVN ,SOS.
Foundry tech-files installation and there release flow development.
Created flow for genus , have understanding of totem, extraction flow.
Working on conformal LEC flow .
Created GUI on Timing Path Viewer in perl tk from scratch :
which contains canvas widget to show the flyline between begin and endpoint
(canvas is scaled to chip's floorplan) when one selects a bucket.(bucket is
collection of paths based on some classification)
contains several buttons to open a window seperately ,
filters to grep,grep –v or highlight nets ,classify paths whose begin-end points in
the same and different clusters.
several windows which shows capture , launch ,path report when a particular
timing bucket is selected,
each column is kept toggle sort(ascending, descending),
mouse hovering feature,it displays a text information when mouse is hovered
over a net like metal layer used,capacitance,hold time,delay etc.
a window which display image(histogram of bucket path's slack) ,
2. hide and show headers,customised column headers,
classify different paths(RTL,PD,ping-pong),
Facilitated user to create his own defined buckets.
Previous Experience at Nvidia, Bangalore as CAD eng: 8 months.
Roles at Nvidia:
Worked in IEEE1500 test standard architecture Design, writing complex test suites , tcl
scripts to support the development of the design. Running and debugging checks and scan
insertion flow on various chips(CPU’s , GPU’s) at various modes and verifying that run is
clean.Debugging C++ and TCL programs using GDB and tn_shell. Fixing CAD-DFT Bugs and
documenting IEEE1500 and other DFT scan flow.
Good understanding of the DFT concepts and worked on the tools as well.
TECHNICAL SKILLS
SUMMARY
VLSI Domain Skills
HDLs : Verilog HDL.
EDA Tools : Encounter,Redhawk,Tempus,Innovus,Calibre.
DFT tools : DFTAdvisor, FastScan, TestKompress, Etchecker.
Domain : ASIC/FPGA Design Flow.
Scripts :Shell Script, TCL,PERL,PHP,HTML.
Language : C, C++, OOPs concepts, DataStructures.
Experience in writing RTL models in Verilog HDL .
EDUCATION
MTECH : Completed Mtech from IIIT Hyderabad in VLSI and computer engineering 2012-
2014 batch, secured a CGPA of 7.8 .
BE : Completed BE from Swami vivekanand technical university in year 2011,Bhilai. Secured
74.5%.
SSC : Completed from CGBSE board with 72% in year 2005.
HSC : Completed from CGBSE board with 77.5% in year 2003.
Extra-curricular Activities and Achievements:
Active member of Blood Donation group,Donate Blood Save Life,Lets-Vote campaign.
Active member of an NGO named Friends For Seva at Hydrabad formed by us.
Class Representative in BE for 4 years.
Personal Profile
Date of Birth: 07 may 1988.
Language Known: Telugu, Hindi, English.
I hereby declare that the information given above is true to best of my knowledge and belief.
Place: - Hyderabad (A.Ramesh)