1. Seminar
On
Distributed Amplifiers
Submitted To :
Submitted By :
Dr. Karun Rawat
Rakesh Kumar
Assistant Professor
CARE Dept.
IIT Delhi
2013EEE8274

2. Contents
 Introduction
 Basic Design Circuit of DA
 Operating Principle
 Analysis of DA circuit
 Calculation of Optimum Number of Stages to be cascaded
 References

3. Introduction
 Distributed amplifier basic idea first introduced in 1936
[Percival 36] to overcome traditional Gain*Bandwidth limit of
vacuum tube amplifiers.
 The key idea is to combine parasitic capacitances of the
transistors with lumped inductors to form artificial
Transmission-lines.
 Since transmission lines have very high cut-off frequency it
enables the amplifier to achieve very wide bandwidths.
 The topology of DA is suited for MMICs because its passive
circuit consists of inductors which can be realized in the form
of short lengths of micro strip lines.

4. Basic Design Circuit
 Consists of a pair of input and output transmission lines coupled by
transconductance of N identical MOSFETs.
 The transmission lines are formed using lumped inductors and are
referred to as the gate and drain lines.
 Gates of transistors are connected to a transmission line having a
characteristic impedance Zg with a spacing of lg .
 Similarly the drains are connected to a transmission line of
characteristic impedance Zd ,with a spacing ld .
Fig. Configuration of N-stage Distributed Amplifier
(Image Courtesy : Microwave Engineering, David M. Pozar)

5. Operating principle of DA
• As the RF signal travels on the gate line, each transistor is excited by the
traveling voltage wave and transfers the signal to drain line through its
transconductance.
• If the phase velocities on the gate and drain lines are equal, then the signals on
the drain line add in the forward direction as they arrive at the output.
• The out-of-phase wave traveling in the reverse direction will be absorbed by
the drain-line termination Zd .
• The amplified signals at each stage travels towards the load.

6. Analysis of DA
 Two separate small signal models of DA are shown one for drain line and other for gate
line
a. Transmission line circuit for the gate
line of the distributed amplifier
b. Equivalent circuit of a single
unit cell of the gate line
•Lg and Cg are the inductance and capacitance per unit length of the gate transmission line
•Ri and Cgs/lg represent the equivalent per unit length loading due to the FET input
resistance R; and gate-to-source capacitance Cgs
• Using basic transmission line theory to find the effective characteristic impedance and
propagation constants of the gate and drain lines
(Image Courtesy : Microwave Engineering, David M. Pozar)

7. Analysis of DA…
a. Transmission line circuit for
the drain line of the distributed amplifier
b. Equivalent circuit of a
single unit cell of the drain
line
•For the drain line, the series impedance and shunt admittance per unit length are
•The characteristic impedance of the drain line can be written as
• Propagation constant
(Image Courtesy : Microwave Engineering, David M. Pozar)

8. Calculation of Optimum Number of Stages to be cascaded
 Power gain G can be calculated as shown
 When loss is present the gain of a
distributed amplifier approaches zero as N
infinity
 This surprising behavior is explained by the fact that
the input voltage on the gate line decays exponentially
as
 So the FETs at the end of the amplifier receive no input
signal; similarly, the amplified signals from the FETs
near the beginning of the amplifier are attenuated
along the drain line
 The multiplicative increase in gain with N is not
enough to compensate for an exponential decay for
large N
 For a given set of FET parameters, there will be an
optimum value of N that maximizes the gain of a
distributed amplifier. This can be found by
differentiating with respect to N, and setting the result
to zero to obtain

9. References
1. Microwave engineering, David M. Pozar
2. A Fully Integrated 0.5–5.5-GHz CMOS Distributed Amplifier Brian M.
Ballweber, Member, IEEE, Ravi Gupta, Member, IEEE, and David J. Allstot,
Fellow, IEEE
3. Distributed amplifier circuit design using a commercial CMOS process
technology by Kyle Gene Ross

10. Thank You