1 0 1 1 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1
</
/>
} /> [
Operating System
22CSH-242
Presented by:
Dr. Krishnendu Rarhi
Unit II
Chapter 1
1 0 1 1 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1
Memory
Management
01
</>
} /> [
1 0 1 1 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1
Swapping
Segmentation
Paging
Demand Paging
Roadmap
1 0 1 1 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1
</ Background
• The CPU fetches instructions from memory according to the value of the program counter.
• These instructions may cause additional loading from and storing to specific memory addresses.
• A typical instruction-execution cycle, first fetches an instruction from memory.
• The instruction is then decoded and may cause operands to be fetched from memory.
• After the instruction has been executed on the operands, results may be stored back in memory.
• The memory unit sees only a stream of memory addresses; it does not know how they are
generated (by the instruction counter, indexing, indirection, literal addresses, and so on) or what
they are for (instructions or data).
• Accordingly, we are interested only in the sequence of memory addresses generated by the
running program.
1 0 1 1 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1
</ Background
• Main memory and registers are only storage CPU can access directly
• Memory unit only sees a stream of addresses + read requests, or address + data and write requests
• Register access in one cycle of CPU clock (or less)
• Main memory can take many cycles, causing a stall, since it does not have the data required to
complete the instruction that it is executing.
• Cache sits between main memory and CPU registers as a remedy to Stall Problem
• Protection of memory required to ensure correct operation which is provided by hardware
• On multiuser systems, we must additionally protect user processes from one another.
• Separate per-process memory space protects the processes from each other and is fundamental to
having multiple processes loaded in memory for concurrent execution.
• To separate memory spaces, we need the ability to determine the range of legal addresses that the
process may access.
• We can provide this protection by using two registers, usually a base and a limit
1 0 1 1 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1
</ Base & Limit Registers
 A pair of base and limit registers define the logical address space
 The base register holds the smallest legal physical memory address; the
limit register specifies the size of the range.
 CPU must check every memory access generated in user mode to be sure it
is between base and limit for that user
1 0 1 1 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1
</ Base & Limit Registers
if the base register holds 300040 and the limit
register is 120900, then the program can
legally access all addresses from 300040
through 420939 (inclusive).
1 0 1 1 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1
</ Address Binding
1. Programs on disk, ready to be brought into memory to execute form an input
queue
a. Without support, must be loaded into address 0000
2. As the process is executed, it accesses instructions and data from memory.
3. Inconvenient to have first user process physical address always at 0000
4. Further, addresses represented in different ways at different stages of a program’s
life
a. Source code addresses usually symbolic such as variable count
b. Compiled code addresses bind to relocatable addresses
c. Linker or loader will bind relocatable addresses to absolute addresses
d. Each binding maps one address space to another
1 0 1 1 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1
</ Multistep Processing
Compile time. If you know at compile
time where the process will reside in
memory, then absolute code can be
generated.
Load time. If it is not known at
compile time where the process will
reside in memory, then the compiler
must generate relocatable code.
Execution time. If the process can be
moved during its execution from one
memory segment to another, then
binding must be delayed until run
time.
1 0 1 1 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1
</ Logical vs Physical Address Space
1. The concept of a logical address space that is bound to a separate physical address space is
central to proper memory management
a. Logical address – generated by the CPU; also referred to as virtual address
b. Physical address – address seen by the memory unit
2. Logical and physical addresses are the same in compile-time and load-time address-binding
schemes; logical (virtual) and physical addresses differ in execution-time address-binding
scheme
3. Logical address space is the set of all logical addresses generated by a program
4. Physical address space is the set of all physical addresses generated by a program
5. The run-time mapping from virtual to physical addresses is done by a hardware device called
the memory-management unit (MMU).
1 0 1 1 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1
</ Memory Management Unit
1. Consider simple scheme where the value in the relocation register is added to every address
generated by a user process at the time it is sent to memory
a. Base register now called relocation register
b. MS-DOS on Intel 80x86 used 4 relocation registers
2. The user program deals with logical addresses; it never sees the real physical addresses
a. Execution-time binding occurs when reference is made to location in memory
b. Logical address bound to physical addresses
1 0 1 1 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1
</ Dynamic Relocation
 Routine is not loaded until it is called
 Better memory-space utilization; unused
routine is never loaded
 All routines kept on disk in relocatable load
format
 Useful when large amounts of code are needed
to handle infrequently occurring cases
 No special support from the operating system
is required
 Implemented through program
design
 OS can help by providing libraries
to implement dynamic loading
1 0 1 1 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1
</ Dynamic Linking
1. Static linking – system libraries and program code combined by the loader into the binary
program image
2. Dynamic linking –linking, rather loading, is postponed until execution time (used with system
libraries)
3. Small piece of code, stub, used to locate the appropriate memory-resident library routine
4. Stub replaces itself with the address of the routine, and executes the routine
5. Operating system checks if routine is in processes’ memory address
a. If not in address space, add to address space
6. Dynamic linking is particularly useful for libraries
7. System also known as shared libraries
8. Consider applicability to patching system libraries
a. Versioning may be needed
1 0 1 1 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1
</ Swapping
1. A process can be swapped temporarily out of memory to a backing store, and then brought
back into memory for continued execution
a. Total physical memory space of processes can exceed physical memory
2. Backing store – fast disk large enough to accommodate copies of all memory images for all
users; must provide direct access to these memory images
3. Roll out, roll in – swapping variant used for priority-based scheduling algorithms; lower-
priority process is swapped out so higher-priority process can be loaded and executed
4. Major part of swap time is transfer time; total transfer time is directly proportional to the
amount of memory swapped
5. System maintains a ready queue of ready-to-run processes which have memory images on
disk
6. Does the swapped out process need to swap back in to same physical addresses?
7. Depends on address binding method
a. Plus consider pending I/O to / from process memory space
8. Modified versions of swapping are found on many systems (i.e., UNIX, Linux, and Windows)
a. Swapping normally disabled
b. Started if more than threshold amount of memory allocated
c. Disabled again once memory demand reduced below threshold
1 0 1 1 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1
</ Swapping – Schematic View
1 0 1 1 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1
</ Context Switch Time
1. If next processes to be put on CPU is not in memory, need to swap out a process and swap in
target process
2. Context switch time can then be very high
3. 100MB process swapping to hard disk with transfer rate of 50MB/sec
a. Swap out time of 2000 ms
b. Plus swap in of same sized process
c. Total context switch swapping component time of 4000ms (4 seconds)
4. Can reduce if reduce size of memory swapped – by knowing how much memory really being
used
a. System calls to inform OS of memory use via request_memory() and
release_memory()
1 0 1 1 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1
</ Context Switch Time
1. Other constraints as well on swapping
a. Pending I/O – can’t swap out as I/O would occur to wrong process
b. Or always transfer I/O to kernel space, then to I/O device
i. Known as double buffering, adds overhead
2. Standard swapping not used in modern operating systems
a. But modified version common
i. Swap only when free memory extremely low
1 0 1 1 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1
</ Contiguous Allocation
1. Main memory must support both OS and user processes
2. Limited resource, must allocate efficiently
3. Contiguous allocation is one early method
4. Main memory usually into two partitions:
a. Resident operating system, usually held in low memory with interrupt vector
b. User processes then held in high memory
c. Each process contained in single contiguous section of memory
5. Relocation registers used to protect user processes from each other, and from changing
operating-system code and data
a. Base register contains value of smallest physical address
b. Limit register contains range of logical addresses – each logical address must be less
than the limit register
c. MMU maps logical address dynamically
d. Can then allow actions such as kernel code being transient and kernel changing size
Operating System_2.1_Memory Management.pptx

Operating System_2.1_Memory Management.pptx

  • 1.
    1 0 11 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1 </ /> } /> [ Operating System 22CSH-242 Presented by: Dr. Krishnendu Rarhi Unit II Chapter 1
  • 2.
    1 0 11 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1 Memory Management 01 </> } /> [
  • 3.
    1 0 11 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1 Swapping Segmentation Paging Demand Paging Roadmap
  • 4.
    1 0 11 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1 </ Background • The CPU fetches instructions from memory according to the value of the program counter. • These instructions may cause additional loading from and storing to specific memory addresses. • A typical instruction-execution cycle, first fetches an instruction from memory. • The instruction is then decoded and may cause operands to be fetched from memory. • After the instruction has been executed on the operands, results may be stored back in memory. • The memory unit sees only a stream of memory addresses; it does not know how they are generated (by the instruction counter, indexing, indirection, literal addresses, and so on) or what they are for (instructions or data). • Accordingly, we are interested only in the sequence of memory addresses generated by the running program.
  • 5.
    1 0 11 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1 </ Background • Main memory and registers are only storage CPU can access directly • Memory unit only sees a stream of addresses + read requests, or address + data and write requests • Register access in one cycle of CPU clock (or less) • Main memory can take many cycles, causing a stall, since it does not have the data required to complete the instruction that it is executing. • Cache sits between main memory and CPU registers as a remedy to Stall Problem • Protection of memory required to ensure correct operation which is provided by hardware • On multiuser systems, we must additionally protect user processes from one another. • Separate per-process memory space protects the processes from each other and is fundamental to having multiple processes loaded in memory for concurrent execution. • To separate memory spaces, we need the ability to determine the range of legal addresses that the process may access. • We can provide this protection by using two registers, usually a base and a limit
  • 6.
    1 0 11 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1 </ Base & Limit Registers  A pair of base and limit registers define the logical address space  The base register holds the smallest legal physical memory address; the limit register specifies the size of the range.  CPU must check every memory access generated in user mode to be sure it is between base and limit for that user
  • 7.
    1 0 11 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1 </ Base & Limit Registers if the base register holds 300040 and the limit register is 120900, then the program can legally access all addresses from 300040 through 420939 (inclusive).
  • 8.
    1 0 11 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1 </ Address Binding 1. Programs on disk, ready to be brought into memory to execute form an input queue a. Without support, must be loaded into address 0000 2. As the process is executed, it accesses instructions and data from memory. 3. Inconvenient to have first user process physical address always at 0000 4. Further, addresses represented in different ways at different stages of a program’s life a. Source code addresses usually symbolic such as variable count b. Compiled code addresses bind to relocatable addresses c. Linker or loader will bind relocatable addresses to absolute addresses d. Each binding maps one address space to another
  • 9.
    1 0 11 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1 </ Multistep Processing Compile time. If you know at compile time where the process will reside in memory, then absolute code can be generated. Load time. If it is not known at compile time where the process will reside in memory, then the compiler must generate relocatable code. Execution time. If the process can be moved during its execution from one memory segment to another, then binding must be delayed until run time.
  • 10.
    1 0 11 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1 </ Logical vs Physical Address Space 1. The concept of a logical address space that is bound to a separate physical address space is central to proper memory management a. Logical address – generated by the CPU; also referred to as virtual address b. Physical address – address seen by the memory unit 2. Logical and physical addresses are the same in compile-time and load-time address-binding schemes; logical (virtual) and physical addresses differ in execution-time address-binding scheme 3. Logical address space is the set of all logical addresses generated by a program 4. Physical address space is the set of all physical addresses generated by a program 5. The run-time mapping from virtual to physical addresses is done by a hardware device called the memory-management unit (MMU).
  • 11.
    1 0 11 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1 </ Memory Management Unit 1. Consider simple scheme where the value in the relocation register is added to every address generated by a user process at the time it is sent to memory a. Base register now called relocation register b. MS-DOS on Intel 80x86 used 4 relocation registers 2. The user program deals with logical addresses; it never sees the real physical addresses a. Execution-time binding occurs when reference is made to location in memory b. Logical address bound to physical addresses
  • 12.
    1 0 11 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1 </ Dynamic Relocation  Routine is not loaded until it is called  Better memory-space utilization; unused routine is never loaded  All routines kept on disk in relocatable load format  Useful when large amounts of code are needed to handle infrequently occurring cases  No special support from the operating system is required  Implemented through program design  OS can help by providing libraries to implement dynamic loading
  • 13.
    1 0 11 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1 </ Dynamic Linking 1. Static linking – system libraries and program code combined by the loader into the binary program image 2. Dynamic linking –linking, rather loading, is postponed until execution time (used with system libraries) 3. Small piece of code, stub, used to locate the appropriate memory-resident library routine 4. Stub replaces itself with the address of the routine, and executes the routine 5. Operating system checks if routine is in processes’ memory address a. If not in address space, add to address space 6. Dynamic linking is particularly useful for libraries 7. System also known as shared libraries 8. Consider applicability to patching system libraries a. Versioning may be needed
  • 14.
    1 0 11 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1 </ Swapping 1. A process can be swapped temporarily out of memory to a backing store, and then brought back into memory for continued execution a. Total physical memory space of processes can exceed physical memory 2. Backing store – fast disk large enough to accommodate copies of all memory images for all users; must provide direct access to these memory images 3. Roll out, roll in – swapping variant used for priority-based scheduling algorithms; lower- priority process is swapped out so higher-priority process can be loaded and executed 4. Major part of swap time is transfer time; total transfer time is directly proportional to the amount of memory swapped 5. System maintains a ready queue of ready-to-run processes which have memory images on disk 6. Does the swapped out process need to swap back in to same physical addresses? 7. Depends on address binding method a. Plus consider pending I/O to / from process memory space 8. Modified versions of swapping are found on many systems (i.e., UNIX, Linux, and Windows) a. Swapping normally disabled b. Started if more than threshold amount of memory allocated c. Disabled again once memory demand reduced below threshold
  • 15.
    1 0 11 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1 </ Swapping – Schematic View
  • 16.
    1 0 11 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1 </ Context Switch Time 1. If next processes to be put on CPU is not in memory, need to swap out a process and swap in target process 2. Context switch time can then be very high 3. 100MB process swapping to hard disk with transfer rate of 50MB/sec a. Swap out time of 2000 ms b. Plus swap in of same sized process c. Total context switch swapping component time of 4000ms (4 seconds) 4. Can reduce if reduce size of memory swapped – by knowing how much memory really being used a. System calls to inform OS of memory use via request_memory() and release_memory()
  • 17.
    1 0 11 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1 </ Context Switch Time 1. Other constraints as well on swapping a. Pending I/O – can’t swap out as I/O would occur to wrong process b. Or always transfer I/O to kernel space, then to I/O device i. Known as double buffering, adds overhead 2. Standard swapping not used in modern operating systems a. But modified version common i. Swap only when free memory extremely low
  • 18.
    1 0 11 0 1 1 0 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1 </ Contiguous Allocation 1. Main memory must support both OS and user processes 2. Limited resource, must allocate efficiently 3. Contiguous allocation is one early method 4. Main memory usually into two partitions: a. Resident operating system, usually held in low memory with interrupt vector b. User processes then held in high memory c. Each process contained in single contiguous section of memory 5. Relocation registers used to protect user processes from each other, and from changing operating-system code and data a. Base register contains value of smallest physical address b. Limit register contains range of logical addresses – each logical address must be less than the limit register c. MMU maps logical address dynamically d. Can then allow actions such as kernel code being transient and kernel changing size