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• SETUP.UpateRATE [time|value]
- SETUP.URATE 250ms ; Screen will be updated every 250ms
- SETUP.URATE 4 ; 4 times per second
• SYStem.POLLING SLOW
- System state is polled slowly, SYStem.POLLING DEFault in default
• MAP.UpdateOnce [address range]
- Only one time update for specified address after Break and Step/Over/Go till
- Used for memory area
• MAP.NoUpdateOnce [address range]
- Depend on SETUP.URATE command for the address range
- Used for SFR area](https://image.slidesharecdn.com/hancommdsdtvirtualtargetdebuggingwithtrace32-190910082159/75/MDS_Virtual-Target-Debugging-with-TRACE32-14-2048.jpg)
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DIAG 34xx command
- EnReset/ResBreak Option 연동 주의
DIAG command
- DIAG 3400 : JTAG 통신테스트, 모든 Debugger에서 사용 가능
- DIAG 16001 : EnReset/ResBreak과 연동하지 않음
- DIAG 3410 : MEM-AP 구조 SCAN(ROM table 위치 포함)
- DIAG 3411 : MEM-AP 구조 및 ROM Table Parsing까지 완료
- DIAG 3412 : SYS.CONFIG.JTAGACCESSPORT 설정 반드시 필요
>> 사용법
>> DIAG 3412 [port number]
SYStem.Detect.DAP](https://image.slidesharecdn.com/hancommdsdtvirtualtargetdebuggingwithtrace32-190910082159/75/MDS_Virtual-Target-Debugging-with-TRACE32-17-2048.jpg)
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• CADI Interface setup for Configuration 1.
PBI=CADI ; configure system to use CADI
• TRACE32 commands for CADI
SYS.CONFIG.ListCORE
- Model 내에 simulation되고 있는 component들의 List를 display해주는 명령
- SimualtionID라는 모델 포트정보를 확인할 수 있음
SYS.CONFIG.ListSIMULation
- Simulation되고 있는 Model들의 List를 보여줌
SYS.CONFIG.CORE [port|name]
- Model내의 Simulation되고 여러 개의 CPU core 중 연결하고자 하는 Core선택 명령
- ex. SYS.CONFIG.CORE “7001|cluster.core0”
• 특이사항
- Debugging을 위해 CoreSight Logic을 이용하는 것이 아닌 CADI stack에 의한 구동
- 나머지 모든 사항은 동일](https://image.slidesharecdn.com/hancommdsdtvirtualtargetdebuggingwithtrace32-190910082159/75/MDS_Virtual-Target-Debugging-with-TRACE32-25-2048.jpg)
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한컴MDS_Virtual Target Debugging with TRACE32
Virtual Target provides a debug environment for targets that cannot be physically connected. It supports various debug interfaces like GTL, CADI, and debug tools from different vendors on different host operating systems and processor architectures. GTL was introduced to address limitations of slow RTL simulation and FPGA-based verification like long build times and difficulty retrieving debug information. It uses a virtual JTAG/bus interface over procedural Verilog interfaces and a software transactor plugin to enable co-simulation with debug tools.
한컴MDS_Virtual Target Debugging with TRACE32
- 2.
- 3. 3 Virtual Target • Physically연결할 수 없는 Target들을 위한 Debug Environment • Supported Target - GTL(Generic Transactor Library) for EmulationEnvironment - CADI(Cycle Accurate Debug Interface) for ARM FastModel and FVP - VaST, VDI(Virtual Debug Interface), GDB, GDI, GUI, MCD • Supported Host OS - Linux(SuSE/RedHat/Ubuntu),MAC OS X, Windows7/8/10 Vista XP 2000 • Supported Processor - MIPS/PowrPC/SH/StarCore/TriCore/V850 - ARM/ARM64/TeakLite/Hexagon/XTENSa/x86…
- 4. 4 GTL 출현 배경 HugeRTL Image (A1+A2+A3) RTL A1 RTL A2 RTL A3 Verification 1 Verification 2 Verification 3 검증 완료? • 매우 느린 SW based RTL Simulation • RTL build image의 대용량화에 따른 FPGA board based Verification의 한계 • FPGA 기반 RTL 동작 검증 시 Debug 정보 획득 어려움으로 Emulator 사용 가능성 확대 -Signal Probing/Build 시간 등 -보다 많은 HW 동작 정보 요구 -Silicon Target과 유사환경에서의 검증 요구(Time to Market, Pre-Silicon 단계 검증) • Emulator 단점: FPGA(10MHz) 대비 느린 동작 Speed(Up to 1MHz)
- 5. 5 GTL Interface 개념 •Verilog Procedural Interface를 활용한 JTAG 신호의 virtual(SW적) 한 전송 • Emulator 내에 Transator를 필요로 하며 SW는 GTL Plug-In을 필요로 함 • Trace32는 Only SW Debugger만 필요 • JTAG Transactor/BUS(AHB-APB-AXI-DP) transactor Emulator Cadence PXP Mentor Veloce Synopsys Zebu JTAG Master (Transactor) or BUS Transactor JTAG DUT BUS Emulator Management SW Trace32 PowerView GTL Library (HostMCI.SO) LibGTLxxx.SO(Plug-In) Transactor Handler IPC
- 6. 6 GTL Interface • SupportedDebug Interface : JTAG DAP APB AHB AXI DMA GPIO transactor Synopsys Zebu/Cadence PXP/Mentor Veloce JTAG/BUS/DMATransactor JTAG DUT BUSEmulator Management SW TRACE32 PowerView GTL Library (HostMCI.SO) JTAG SWD DAP AHB-AP APB-AP AXI-AP JTAG-AP AHB Bus M APB Bus M AXI Bus M JTAG CM3 CR7 CA57 Score DRAM Direct download path by backdoor for Speed Transactor Handler LibGTLxxx.SO (Plug-In)
- 7. 7 Configuration 1 • EmulationHost 내 Single Core또는 SMP debug환경 Setup - TRACE32 PowerView와 Emulator가 IPC(Inter-Process Communication)로 연결되어 동작하는 형태 Emulator Cadence PXP Mentor Veloce Synopsys Zebu DUT Emulator Management SW Transactor Handler TRACE32 PowerView GTL Library (HostMCI.SO) Emulation Host(ex. Linux Server) IPC (PIPE or TCP..) LibGTLxxx.SO (Plug-In)
- 8. 8 Configuration 2 • EmulationHost 내 Multi-Processor AMP debugging 환경을 Setup - TRACE32 PowerView와 Emulator는 IPC, Trace32 PowerView 간은 TCP(30000 in default)로 연결되는 형태 Emulator Cadence PXP Mentor Veloce Synopsys Zebu DUT Emulator Management SW Transactor Handler TRACE32 for Core A HostMCI.SO TCP =30000 Emulation Host(ex. Linux Server) TRACE32 for Core B TRACE32 for Core C IPC (PIPE or TCP…) LibGTLxxx.SO
- 9. 9 Configuration 3 • EmulationHost와 별도로 여러 개의 Trace32 Instance를 구동(for Multi-User) - Emulation Host에서 동작하는 Trace32 MCI-Server와 Emulator는 IPC로 - Trace32와 Trace32 MCI-Server는 TCP(30000 in default)/IP 로 연결되는 형태 Emulator Emulation Host Trace32 for DUT B Trace32’ for DUT A TCP/IP Dev. PC Trace32 for DUT C Dev. PC DUT A DUT B DUT C C C B T32 MCI-Server A HostMCI.SO B Emulator-SW A Transactor Handler IPC LibGTLxxx.SO Trace32 for DUT A
- 10. 10 • GTL Interfacesetup for Configuration 1. PBI=MCILIB ; configure system to use hostmci.so • GTL Interface setup for Configuration 2. PBI=MCISERVER ; set up the usage of hostmci.so and open PORT=30000 ; server at 30000 for the first instance. INSTANCE=AUTO ; consecutive number of instance for AMP setup • GTL Interface setup for Configuration 3. - Invoke MCI-server first in Emulation Host side >> ./t32mciserver port=30000 ; start t32mciserver at port 30000 - CONFIG.T32 for Trace32 debugger side PBI=MCISERVER ; set up connection to t32mciserver NODE=192.168.0.1 ; connect to IP 192.168.0.1 PORT=30000 ; at port 30000 INSTANCE=AUTO ; consecutive number of Trace32 instance for AMP setup
- 11. 11 • 기존에 사용하던Script에 추가할 내용 1 SYStem.CONFIG.DEBUGPORT GTL0 ;SYStem.GTL.DISCONNECT ; disconnect if still connected ;SYStem.GTL.MODELCONFIG "TIMEOUT=10|PORT=20000|NODE=127.0.0.1|PACKLEN=1024“ ; optional ;SYStem.GTL.MODELNAME "jtag_gtl_bfm“ ; optional SYStem.GTL.LIBname "lib_gtl1.so“ SYStem.GTL.JTAGPROBENAME “JTAGProbe0” ; for JTAG transactor ; SYStem.CONFIG.* - ARM specific command ;SYStem.CONFIG.DAPNAME “SWD_DAP0“ ; for DAP transactor ;SYStem.CONFIG.DEBUGBUSNAME "APB_DAP0“ ; for APB transactor to debug, DAP: class ;SYStem.CONFIG.MEMORYBUSNAME "AHB_DAP0“; for AHB transactor for real time access(E:) ;SYStem.CONFIG.APBNAME “APB_DAP0” ; define APB transactor for APB: class ;SYStem.CONFIG.AXINAME “AXI_DAP0” ; define AXI transactor for Z(N)AXI: class ;SYStem.CONFIG.AHBNAME “AHB_DAP0” ; define AHB transactor for Z(N)AHB: class ; optional for below ;SYStem.GTL.DMANAME “DMA_transactor” ; define DMA transactor for Data.LOAD * /GTLDMALOAD ;SYStem.GTL.TransactorConfig “user defined string for transactor configuration” “User String”
- 12. 12 • 기존에 사용하던Script에 추가할 내용 2 SYStem.VT.TimeinTargetTime ON ; Select the time ref. between Host and Target(Emulator) for Timeout SYStem.VT.PauseinTargetTime ON ; Select the time ref. between Host and Target for Wait() ;SYStem.VT.HardwareTimeout ON ; ON(Enable), En/disable Transactor operation timeout ;SYStem.VT.TimeScale 1.0 ; Time scale for Timeout and Wait(n), wait time=TS*PS*timevalue(n) ;SYStem.VT.PauseScale 1.0 ; Time scale for Wait(n), wait time=TS*PS*timevalue(n) ;SYStem.VT.HardwareTimeoutScale 1.0 ; prolong/shrink Transactor operation timeout ;SYStem.VT.MaxTimeout 10us ; absolute maximum time for Timeout, DBG cmd timeout like SYS.Up ;SYStem.VT.MaxPause 10us ; absolute maximum time for Wait() time ;SYStem.VT.PollingPause 10us ; Add pause(Wait) by every polling ;SYStem.VT.OperationPasue 10us ; Add pause(Wait) by every operation(transaction), for testing SYStem.GTL.CONNECT ; connecting GTL-plug-in
- 13. 13 • 기존에 사용하던Script에 추가할 내용 SYStem.CPU CortexA7MPcore SYStem.CONFIG COREBASE 0x80090000 SYStem.CONFIG.DEBUGACCESSPORT 1. SYStem.JtagClock 300KHz SYStem.Option.ResBreak OFF SYStem.Option.EnReset ON SYStem.Option.WaitReset 100.ms SETUP.UpdateRATE 3s MAP.UpdateOnce ; TRACE32 updates the data of the opened window only one time MAP.NoUpdateOnce 0x10008000++0xFFF ; define normal update area SYStem.DETECT.DaisyChain ; connecting GTL-plug-in, if GTL is not connected ENDDO
- 14. 14 • SETUP.UpateRATE [time|value] -SETUP.URATE 250ms ; Screen will be updated every 250ms - SETUP.URATE 4 ; 4 times per second • SYStem.POLLING SLOW - System state is polled slowly, SYStem.POLLING DEFault in default • MAP.UpdateOnce [address range] - Only one time update for specified address after Break and Step/Over/Go till - Used for memory area • MAP.NoUpdateOnce [address range] - Depend on SETUP.URATE command for the address range - Used for SFR area
- 15. 15 • Data.LOAD.ELF *.ELF/VM - Load executable file to VM: area only • Data.LOAD.ELF *.ELF /PlusVM - Load executable file to both target and VM: memory • Data.LOAD.ELF *.ELF /GTLDMALOAD - Load executable file to the address via DMA transactor(Backdoor) • Data.List VM: - Data.List window accesses only VM: memory • Onchip.Access VM - Use the code in VM: memory for trace analysis
- 16. 16 DAP(Debug Access Port) JTAG or SWDP ForCortexM For CortexA/R (AXI-AP) AHB-AP APB-AP APB-AP DIAG 3400|16001 DIAG 3410 DIAG 3411 DIAG 3412
- 17. 17 DIAG 34xx command -EnReset/ResBreak Option 연동 주의 DIAG command - DIAG 3400 : JTAG 통신테스트, 모든 Debugger에서 사용 가능 - DIAG 16001 : EnReset/ResBreak과 연동하지 않음 - DIAG 3410 : MEM-AP 구조 SCAN(ROM table 위치 포함) - DIAG 3411 : MEM-AP 구조 및 ROM Table Parsing까지 완료 - DIAG 3412 : SYS.CONFIG.JTAGACCESSPORT 설정 반드시 필요 >> 사용법 >> DIAG 3412 [port number] SYStem.Detect.DAP
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- 22. 22 Memory Class inSYStem.Mode.Prepare Mode
- 23. 23 Debugging under FastModel/FVPSimulation • FastModel/FVP with TRACE32 - CADI(Cycle Accurate Debug Interface) SW Interface를 이용한 debugging - RTL simulation이 아닌 Model based Simulation이므로 매우 빠름 • Multi-Model based debugging with TCP - TCP지원으로 SimulationID auto-detection - SimulationID 선택 후 연결 Simulation Host Trace32 for Model B Trace32 for Model A TCP Protocol Trace32 for Model C Model_Shell A Ex. CortexA57x4 Model_Shell B Ex. CortexA7x2 Model_Shell C Ex. CortexA5 SimulationID:7000 SimulationID:7001 SimulationID:7002
- 24. 24 Hybrid Virtual Platform (ExtendedFastModel with Emulator from Mentor/Synopsys) • FastModel for CPU cores and Emulation for peripheral IPs - 빠른 Emulation Speed를 위한 연동 - 순수 Emulator 구성은 Firmware나 Hardware개발을 위한 구성인 반면 본 연동은 Software 개발을 위한 구성 Simulation Host Trace32 for Model B Trace32 for Model A TCP Protocol Trace32 for Model C Model_Shell A Ex. CortexA57x4 Model_Shell B Ex. CortexA7x2 Model_Shell C Ex. CortexA5 SimulationID:7000 SimulationID:7001 SimulationID:7002 Emulator such as ZeBu and Veloce Only peripheral IPs except CPUs, are emulated for improving emulation speed
- 25. 25 • CADI Interfacesetup for Configuration 1. PBI=CADI ; configure system to use CADI • TRACE32 commands for CADI SYS.CONFIG.ListCORE - Model 내에 simulation되고 있는 component들의 List를 display해주는 명령 - SimualtionID라는 모델 포트정보를 확인할 수 있음 SYS.CONFIG.ListSIMULation - Simulation되고 있는 Model들의 List를 보여줌 SYS.CONFIG.CORE [port|name] - Model내의 Simulation되고 여러 개의 CPU core 중 연결하고자 하는 Core선택 명령 - ex. SYS.CONFIG.CORE “7001|cluster.core0” • 특이사항 - Debugging을 위해 CoreSight Logic을 이용하는 것이 아닌 CADI stack에 의한 구동 - 나머지 모든 사항은 동일
- 26. 26 Hybrid Virtual Platform (ExtendedFastModel with Emulator from Mentor/Synopsys) • FastModel for main CPU cores and Emulation for peripheral IPs and other CPUs • Debugging all resources at the same time Simulation Host Trace32 for Model B Trace32 for Model A Trace32 for Model C Model_Shell A Ex. CortexA57x4 Model_Shell B Ex. CortexA7x2 Model_Shell C Ex. CortexA5 ID:7000 ID:7001 ID:7002 Emulator (ZeBu/Veloce) Peripheral IPs and other CPUs except simulated CPUs, are emulated for improving emulation speed A’ B’ C’ Emulation Host Trace32 for DUT B’ Trace32 for DUT A’ Trace32 for DUT C’