The document provides information about the exam format for the First Science: Computer Science CS1.2 course. It states that the exam is 2 hours long and contains 4 questions, with questions 1 and 2 being compulsory and the others being a choice between 3 and 4. Question 1 contains 60 multiple choice questions, with negative marking applying for incorrect answers. Question 2 involves assembly language programming. Questions 3 and 4 concern computer architecture topics. Sample multiple choice questions are provided covering various computer science topics. Instructions are also provided on how to fill out the multiple choice answer sheet.
This document provides an overview of the ARM processor. It begins with a brief history, describing how ARM was developed in the 1980s by Acorn Computers in Cambridge, England. It then defines what a processor is and explains the differences between RISC and CISC architectures. The document discusses key features of ARM processors like pipelining and conditional execution. It specifically examines the ARM7TDMI processor, describing its instruction sets including ARM, Thumb, and operating modes. Application areas for ARM like mobile phones and automotive are listed. The document concludes with references used in its preparation.
The document discusses assembly language instruction addressing and execution. It covers loading an *.exe program by accessing it from disk and storing it in memory segments. The boot process and loading of an *.exe file is explained. Examples are provided to illustrate instruction execution and addressing, showing how the instruction address is determined from segment registers and offsets.
- ARM was developed in 1983 by Acorn Computers with a 4-man team to replace the 6502 processor in BBC computers. It has since become one of the most widely used processor cores in the world due to its simplicity, low power consumption, and use in portable devices.
- ARM Holdings licenses the ARM processor core designs to manufacturers but does not manufacture the chips itself. ARM cores power many products including PDAs, phones, media players, handheld game consoles, digital cameras, and more. Popular ARM architectures include ARM7TDMI and ARM9TDMI.
- The ARM architecture uses a load/store design with 32-bit fixed-length instructions operating on a large number of general purpose
This document provides biographical information about the author and a history of electronics and computing. It discusses digital logic, circuit boards, microcontrollers, computers, and introduces the Arduino and Raspberry Pi open-source hardware platforms. Details are provided about the Arduino, including common boards, projects, and an introductory video. Specifications and supported operating systems are listed for the Raspberry Pi along with example introductory and demo videos.
This document provides information about ARM Ltd and the ARM architecture. It discusses the history and founding of ARM, the basic operating modes and registers in the ARM architecture, the instruction sets and pipeline stages of various ARM processors, and the features of ARM Cortex processors like the Cortex-A8 and Cortex-A9.
The document provides an overview of the ARM architecture, including:
- ARM was founded in 1990 and licenses its processor core intellectual property to design partners.
- The ARM instruction set includes 32-bit ARM and 16-bit Thumb instructions. ARM supports different processor modes like user mode, IRQ mode, and FIQ mode.
- Popular ARM processors include ARM7 and Cortex-M series. ARM licenses its IP to semiconductor companies who integrate the cores into various end products.
This document provides an introduction to ARM microcontrollers. It discusses that ARM designs RISC processor cores that are used in many microcontrollers produced by various manufacturers. The popular ARM7TDMI architecture is a 32-bit RISC processor that can operate in both 32-bit ARM and 16-bit THUMB modes. It has 31 registers and 7 operating modes. The ARM instruction set allows conditional execution and includes instructions for arithmetic, logical operations, and loading/storing data. Using THUMB instructions reduces code size by 30-40% compared to ARM.
This document provides an overview of the ARM processor. It begins with a brief history, describing how ARM was developed in the 1980s by Acorn Computers in Cambridge, England. It then defines what a processor is and explains the differences between RISC and CISC architectures. The document discusses key features of ARM processors like pipelining and conditional execution. It specifically examines the ARM7TDMI processor, describing its instruction sets including ARM, Thumb, and operating modes. Application areas for ARM like mobile phones and automotive are listed. The document concludes with references used in its preparation.
The document discusses assembly language instruction addressing and execution. It covers loading an *.exe program by accessing it from disk and storing it in memory segments. The boot process and loading of an *.exe file is explained. Examples are provided to illustrate instruction execution and addressing, showing how the instruction address is determined from segment registers and offsets.
- ARM was developed in 1983 by Acorn Computers with a 4-man team to replace the 6502 processor in BBC computers. It has since become one of the most widely used processor cores in the world due to its simplicity, low power consumption, and use in portable devices.
- ARM Holdings licenses the ARM processor core designs to manufacturers but does not manufacture the chips itself. ARM cores power many products including PDAs, phones, media players, handheld game consoles, digital cameras, and more. Popular ARM architectures include ARM7TDMI and ARM9TDMI.
- The ARM architecture uses a load/store design with 32-bit fixed-length instructions operating on a large number of general purpose
This document provides biographical information about the author and a history of electronics and computing. It discusses digital logic, circuit boards, microcontrollers, computers, and introduces the Arduino and Raspberry Pi open-source hardware platforms. Details are provided about the Arduino, including common boards, projects, and an introductory video. Specifications and supported operating systems are listed for the Raspberry Pi along with example introductory and demo videos.
This document provides information about ARM Ltd and the ARM architecture. It discusses the history and founding of ARM, the basic operating modes and registers in the ARM architecture, the instruction sets and pipeline stages of various ARM processors, and the features of ARM Cortex processors like the Cortex-A8 and Cortex-A9.
The document provides an overview of the ARM architecture, including:
- ARM was founded in 1990 and licenses its processor core intellectual property to design partners.
- The ARM instruction set includes 32-bit ARM and 16-bit Thumb instructions. ARM supports different processor modes like user mode, IRQ mode, and FIQ mode.
- Popular ARM processors include ARM7 and Cortex-M series. ARM licenses its IP to semiconductor companies who integrate the cores into various end products.
This document provides an introduction to ARM microcontrollers. It discusses that ARM designs RISC processor cores that are used in many microcontrollers produced by various manufacturers. The popular ARM7TDMI architecture is a 32-bit RISC processor that can operate in both 32-bit ARM and 16-bit THUMB modes. It has 31 registers and 7 operating modes. The ARM instruction set allows conditional execution and includes instructions for arithmetic, logical operations, and loading/storing data. Using THUMB instructions reduces code size by 30-40% compared to ARM.
Defined instruction set architecture, discussed different types of instructions in the MIPS architecture, e.g., arithmetic, logical, shift etc. Discussed different types of registers in MIPS, R-format, I-format and j-format instructions have been explained with examples. Further assembly language code for conditional operations e.g., if..else, swap operation, loop operation are demonstrated.
Codasip is a leading provider of RISC-V processor IP and design tools. They introduced the first licensable RISC-V processor in 2015. This presentation discusses Codasip's portfolio of application class RISC-V processors, including their single-core and multiprocessor options. It also describes Codasip Studio, their tool for customizing RISC-V processors, and the P extension for digital signal processing applications.
This document provides an introduction to microcontrollers and the 8051 architecture. It describes that a microcontroller contains a processor and other support devices integrated together on a single chip, unlike a microprocessor which requires external components. The 8051 is introduced as a popular microcontroller, and its pin diagram and internal architecture are explained, including details about ports, memory, registers, timers/counters, serial communication and interrupts.
The document provides an overview of embedded systems and ARM processors. It discusses key aspects of ARM processors including the pipeline, memory management features like cache, TCM, MMU and TLB. It also summarizes the AMBA specification and differences between operating in ARM and Thumb states. The document is intended as lecture material for an embedded systems course covering ARM architecture.
The document provides an overview of microprocessors and microcontrollers. It discusses the history of microprocessors from early 4-bit processors to modern 64-bit processors. A microprocessor contains a central processing unit while a microcontroller contains additional components like memory and input/output interfaces integrated into a single chip. Microcontrollers require less external hardware than microprocessors. The document describes the basic architecture of microprocessors and microcontrollers including components like registers, buses, and memory. It compares the von Neumann and Harvard architectures. Interrupts and memory-mapped I/O are also discussed.
All the concepts of 8051 Micro controller have been explained in detail. Also some information on Embedded Systems. The Presentation deals with Processors & Microcontrollers from first generation to the present generation. This presentation an invaluable compendium of knowledge to the individuals trying to explore the field of electronics. Moreover, a complete coverage for Mumbai University students have been made available.
This document provides an introduction to embedded systems. It defines embedded systems as electronic systems that perform dedicated tasks and include microcontrollers. Characteristics of embedded systems include high speed, low power consumption, small size, accuracy, adaptability, and reliability. Embedded systems are classified based on their functionality and performance requirements. The document also discusses the hardware architecture of embedded systems including the CPU, memory, I/O ports, communication interfaces, and application-specific circuitry. Recent trends in embedded systems include faster processors, lower power consumption, improved communication interfaces, new operating systems, and programming languages.
The document discusses different addressing modes used in microprocessors, including the 8086. It describes five main addressing modes: immediate, register, direct, register indirect, and implicit. Immediate addressing uses data contained in the instruction itself. Register addressing uses operands in registers. Direct addressing directly specifies a memory location. Register indirect addressing uses a memory location pointed to by a register pair. Implicit addressing hides the operand in the instruction. The document provides examples of instructions that use each addressing mode.
The document provides historical context and technical details about microprocessors:
- Ted Hoff at Intel pioneered the concept of the microprocessor in the early 1970s with the Intel 4004, the first commercial microprocessor containing 2,300 transistors.
- The microprocessor is a programmable device that takes in data, performs arithmetic and logical operations according to instructions stored in memory, and outputs results. It reads binary instructions from memory to process data.
- The typical components of a programmable machine using a microprocessor are the microprocessor itself, input and output devices, and memory to store instructions and data. The microprocessor acts as the central processing unit (CPU) and communicates with memory and I
This ppt explains in brief what actually is arm processor and it covers the first 3 chapters of book "ARM SYSTEM DEVELOPERS GUIDE". The 3 chapters include the history,architecture,instruction set etc.
Assembly Language Multiple Choice Questions and Answers
Assembly Langiage questions and answers with explanation for interview, competitive examination and entrance test. Fully solved examples with detailed answer description, explanation are given and it would be easy to understand. This article has been designed for those who want to learn the fundamentals of the Assembly Language. For the users, this page will be helpful to understand and get enough knowledge on the topic. So, the applicants can check the below-provided Assembly Language Questions. We have given the multiple choice questions in the Assembly Language Quiz by covering all the topics. By scrolling down the page, the individuals can take part in the Assembly Language Online Quiz to know all the question answers along with the explanations. Postulates can bookmark this page to get the latest information about the Assembly Language MCQ Quiz. Hence, the hopefuls need to utilize this opportunity and practice the quiz to learn the Assembly Language Questions and Answers.
Assembly Language Quiz Topics Covered
You can find the Assembly Language Questions from the topics like Basic Syntax, Memory Segments, Registers, System Calls, Addressing Modes, Variables, Constants, Arithmetic and Logical Instructions, Conditions, Loops, Numbers, Strings, Arrays, Procedures, Recursion, Macros, File Management, and Memory Management, etc. By checking all the Assembly Language Questions, the contenders can get an idea about the topic. To improve the skills in the Assembly Language, the applicants need to take part in the Assembly Language Online Quiz. The contenders who are preparing for the interviews can check our website frequently. We wish good luck to the aspirants who are ready to appear in the upcoming exams and interviews.
Assembly Language MCQ Quiz Answers
We have given the Assembly Language Answers to all the questions. Participants can hit the "View Answer" button to get the correct option along the four choices. In addition to the right choice, the explanation will also be displayed on the page. Hence, the users can check and know the descriptions of all the questions. Follow our web portal @ Allindiaexams.in to practice more online tests.
The document describes the 8 addressing modes of the 8086 microprocessor. These are: 1) Immediate, where the operand is specified in the instruction itself. 2) Register, where operands are registers. 3) Direct memory, using a segment and offset address. 4) Register indirect, using a base register address. 5) Register relative, using a base register and displacement. 6) Base indexed, using a base and index register. 7) Relative indexed, using a base, index, and displacement. 8) Implied, where operands are implied and not specified.
This document provides information about a course on programming PIC microcontrollers in C using the CCS PIC-C compiler. It discusses the recommended textbook, the topics that will be covered including PIC architecture, limitations of C as applied to PICs, programming PIC hardware, and using software libraries. It also describes how the course will be assessed through a 30 minute multiple choice test held at the end of term.
This document provides an overview of application specific integrated circuits (ASICs). It discusses the main types of ASICs including full custom, semi-custom (standard cell-based and gate array-based), and programmable. For semi-custom, it describes standard cell-based ASICs using predesigned logic cells and different types of gate arrays including channeled, channelless, and structured. The document also covers the design flow, economics, merits like improved speed and power consumption, and demirts such as high costs for redesigns.
The document discusses different classifications of embedded systems:
1. Stand-alone embedded systems do not require a host system and perform tasks independently, such as MP3 players and temperature measurement systems.
2. Real-time embedded systems must provide outputs within certain deadlines, like autopilot systems. Hard real-time systems guarantee deadlines while soft real-time systems mostly meet deadlines.
3. Networked embedded systems are connected to networks for accessing resources, like home security systems connected over TCP/IP.
4. Mobile embedded systems are used in portable devices with limited resources, such as cell phones and digital cameras.
This document provides an introductory presentation on the Raspberry Pi single board computer. It discusses what Raspberry Pi is, its low cost, support for education and programming. It describes the different models and their technical specifications. It also covers setting up Raspberry Pi, installing an operating system, using the Linux shell and commands, programming languages supported, and interfacing with GPIO pins to control hardware. Projects discussed include a home automation system and an LED blink example using GPIO pins.
The document discusses the internal architecture of the Intel 8086 microprocessor. It describes the main components of the 8086 including the Bus Interface Unit (BIU) and Execution Unit (EU). It also covers the memory organization of the 8086, including the use of separate memory segments for code, data, stack, and extra segments. The Flag Register contained within the EU is also described, which stores condition and control bits used during instruction execution.
The document discusses pipeline processing and memory organization. It provides definitions and explanations of key concepts related to pipelining such as stages in a pipeline, hazards, and caching. It also covers memory hierarchy concepts like registers, cache, main memory, and secondary storage. Multiple choice questions with answers are provided to test understanding of these topics.
This exam includes multiple choice and "mark all that apply" questions worth a total of 100 points. There are also two essay questions for extra credit. Students have three hours to complete the closed-book exam. They must put away all books, notes, and electronic devices. The proctor cannot answer questions during the exam.
Defined instruction set architecture, discussed different types of instructions in the MIPS architecture, e.g., arithmetic, logical, shift etc. Discussed different types of registers in MIPS, R-format, I-format and j-format instructions have been explained with examples. Further assembly language code for conditional operations e.g., if..else, swap operation, loop operation are demonstrated.
Codasip is a leading provider of RISC-V processor IP and design tools. They introduced the first licensable RISC-V processor in 2015. This presentation discusses Codasip's portfolio of application class RISC-V processors, including their single-core and multiprocessor options. It also describes Codasip Studio, their tool for customizing RISC-V processors, and the P extension for digital signal processing applications.
This document provides an introduction to microcontrollers and the 8051 architecture. It describes that a microcontroller contains a processor and other support devices integrated together on a single chip, unlike a microprocessor which requires external components. The 8051 is introduced as a popular microcontroller, and its pin diagram and internal architecture are explained, including details about ports, memory, registers, timers/counters, serial communication and interrupts.
The document provides an overview of embedded systems and ARM processors. It discusses key aspects of ARM processors including the pipeline, memory management features like cache, TCM, MMU and TLB. It also summarizes the AMBA specification and differences between operating in ARM and Thumb states. The document is intended as lecture material for an embedded systems course covering ARM architecture.
The document provides an overview of microprocessors and microcontrollers. It discusses the history of microprocessors from early 4-bit processors to modern 64-bit processors. A microprocessor contains a central processing unit while a microcontroller contains additional components like memory and input/output interfaces integrated into a single chip. Microcontrollers require less external hardware than microprocessors. The document describes the basic architecture of microprocessors and microcontrollers including components like registers, buses, and memory. It compares the von Neumann and Harvard architectures. Interrupts and memory-mapped I/O are also discussed.
All the concepts of 8051 Micro controller have been explained in detail. Also some information on Embedded Systems. The Presentation deals with Processors & Microcontrollers from first generation to the present generation. This presentation an invaluable compendium of knowledge to the individuals trying to explore the field of electronics. Moreover, a complete coverage for Mumbai University students have been made available.
This document provides an introduction to embedded systems. It defines embedded systems as electronic systems that perform dedicated tasks and include microcontrollers. Characteristics of embedded systems include high speed, low power consumption, small size, accuracy, adaptability, and reliability. Embedded systems are classified based on their functionality and performance requirements. The document also discusses the hardware architecture of embedded systems including the CPU, memory, I/O ports, communication interfaces, and application-specific circuitry. Recent trends in embedded systems include faster processors, lower power consumption, improved communication interfaces, new operating systems, and programming languages.
The document discusses different addressing modes used in microprocessors, including the 8086. It describes five main addressing modes: immediate, register, direct, register indirect, and implicit. Immediate addressing uses data contained in the instruction itself. Register addressing uses operands in registers. Direct addressing directly specifies a memory location. Register indirect addressing uses a memory location pointed to by a register pair. Implicit addressing hides the operand in the instruction. The document provides examples of instructions that use each addressing mode.
The document provides historical context and technical details about microprocessors:
- Ted Hoff at Intel pioneered the concept of the microprocessor in the early 1970s with the Intel 4004, the first commercial microprocessor containing 2,300 transistors.
- The microprocessor is a programmable device that takes in data, performs arithmetic and logical operations according to instructions stored in memory, and outputs results. It reads binary instructions from memory to process data.
- The typical components of a programmable machine using a microprocessor are the microprocessor itself, input and output devices, and memory to store instructions and data. The microprocessor acts as the central processing unit (CPU) and communicates with memory and I
This ppt explains in brief what actually is arm processor and it covers the first 3 chapters of book "ARM SYSTEM DEVELOPERS GUIDE". The 3 chapters include the history,architecture,instruction set etc.
Assembly Language Multiple Choice Questions and Answers
Assembly Langiage questions and answers with explanation for interview, competitive examination and entrance test. Fully solved examples with detailed answer description, explanation are given and it would be easy to understand. This article has been designed for those who want to learn the fundamentals of the Assembly Language. For the users, this page will be helpful to understand and get enough knowledge on the topic. So, the applicants can check the below-provided Assembly Language Questions. We have given the multiple choice questions in the Assembly Language Quiz by covering all the topics. By scrolling down the page, the individuals can take part in the Assembly Language Online Quiz to know all the question answers along with the explanations. Postulates can bookmark this page to get the latest information about the Assembly Language MCQ Quiz. Hence, the hopefuls need to utilize this opportunity and practice the quiz to learn the Assembly Language Questions and Answers.
Assembly Language Quiz Topics Covered
You can find the Assembly Language Questions from the topics like Basic Syntax, Memory Segments, Registers, System Calls, Addressing Modes, Variables, Constants, Arithmetic and Logical Instructions, Conditions, Loops, Numbers, Strings, Arrays, Procedures, Recursion, Macros, File Management, and Memory Management, etc. By checking all the Assembly Language Questions, the contenders can get an idea about the topic. To improve the skills in the Assembly Language, the applicants need to take part in the Assembly Language Online Quiz. The contenders who are preparing for the interviews can check our website frequently. We wish good luck to the aspirants who are ready to appear in the upcoming exams and interviews.
Assembly Language MCQ Quiz Answers
We have given the Assembly Language Answers to all the questions. Participants can hit the "View Answer" button to get the correct option along the four choices. In addition to the right choice, the explanation will also be displayed on the page. Hence, the users can check and know the descriptions of all the questions. Follow our web portal @ Allindiaexams.in to practice more online tests.
The document describes the 8 addressing modes of the 8086 microprocessor. These are: 1) Immediate, where the operand is specified in the instruction itself. 2) Register, where operands are registers. 3) Direct memory, using a segment and offset address. 4) Register indirect, using a base register address. 5) Register relative, using a base register and displacement. 6) Base indexed, using a base and index register. 7) Relative indexed, using a base, index, and displacement. 8) Implied, where operands are implied and not specified.
This document provides information about a course on programming PIC microcontrollers in C using the CCS PIC-C compiler. It discusses the recommended textbook, the topics that will be covered including PIC architecture, limitations of C as applied to PICs, programming PIC hardware, and using software libraries. It also describes how the course will be assessed through a 30 minute multiple choice test held at the end of term.
This document provides an overview of application specific integrated circuits (ASICs). It discusses the main types of ASICs including full custom, semi-custom (standard cell-based and gate array-based), and programmable. For semi-custom, it describes standard cell-based ASICs using predesigned logic cells and different types of gate arrays including channeled, channelless, and structured. The document also covers the design flow, economics, merits like improved speed and power consumption, and demirts such as high costs for redesigns.
The document discusses different classifications of embedded systems:
1. Stand-alone embedded systems do not require a host system and perform tasks independently, such as MP3 players and temperature measurement systems.
2. Real-time embedded systems must provide outputs within certain deadlines, like autopilot systems. Hard real-time systems guarantee deadlines while soft real-time systems mostly meet deadlines.
3. Networked embedded systems are connected to networks for accessing resources, like home security systems connected over TCP/IP.
4. Mobile embedded systems are used in portable devices with limited resources, such as cell phones and digital cameras.
This document provides an introductory presentation on the Raspberry Pi single board computer. It discusses what Raspberry Pi is, its low cost, support for education and programming. It describes the different models and their technical specifications. It also covers setting up Raspberry Pi, installing an operating system, using the Linux shell and commands, programming languages supported, and interfacing with GPIO pins to control hardware. Projects discussed include a home automation system and an LED blink example using GPIO pins.
The document discusses the internal architecture of the Intel 8086 microprocessor. It describes the main components of the 8086 including the Bus Interface Unit (BIU) and Execution Unit (EU). It also covers the memory organization of the 8086, including the use of separate memory segments for code, data, stack, and extra segments. The Flag Register contained within the EU is also described, which stores condition and control bits used during instruction execution.
The document discusses pipeline processing and memory organization. It provides definitions and explanations of key concepts related to pipelining such as stages in a pipeline, hazards, and caching. It also covers memory hierarchy concepts like registers, cache, main memory, and secondary storage. Multiple choice questions with answers are provided to test understanding of these topics.
This exam includes multiple choice and "mark all that apply" questions worth a total of 100 points. There are also two essay questions for extra credit. Students have three hours to complete the closed-book exam. They must put away all books, notes, and electronic devices. The proctor cannot answer questions during the exam.
This document contains a collection of multiple choice questions about computer fundamentals. There are 54 questions covering topics such as computer generations, components, memory, storage, operating systems, and applications. The questions are intended as a study guide or test for someone learning about basic computer concepts.
MCQ Bank for Computer Fundamantals from mcqSets.comSuresh Khanal
This is MCQ Bank for Computer Fundamentals from http://mcqSets.com. It contains 588 hand picked mcq questions that can be best helpful to prepare your computer exams.
The document discusses the organization and operation of computer systems at both the hardware and software level. It covers topics such as the central processing unit, instruction execution, pipelining, parallelism, memory hierarchies, storage devices, input/output, networking, and encoding of digital data. The document contains detailed diagrams and explanations of how different components of computer systems work individually and interact together.
This document contains a 25 question multiple choice quiz about computer fundamentals and operating systems. The questions cover topics such as generations of computers, computer architecture, memory, operating systems features, and applications such as word processing and spreadsheets. The document provides the question and a blank for the answer selection for each multiple choice question.
The document contains questions about computer hardware components and concepts. It asks about memory sizes, computer generations, mobile operating systems, processors, memory types, CPU components, data transfer methods, registers, number conversions, parity bits, and computer architecture topics like cache memory, pipelining, buses, and memory hierarchies. It also includes questions that require explaining memory and storage concepts, converting between numbering systems, defining standards, and identifying computer components in diagrams.
Bt0062 fundamentals of it model question paperAnimish Puttu
This document contains a model question paper for the subject "Fundamentals of IT" with 60 multiple choice questions covering various topics related to information technology including computer hardware, software, operating systems, networking, the internet, and applications. The questions are divided into two sections: Part A contains one mark questions and Part B contains two mark questions assessing more comprehensive understanding. Overall, the question paper tests students' foundational knowledge of IT concepts and terminology.
UNIVAC is the Universal Automatic Computer. The basic operations performed by computers are arithmetic, logical, and storage operations. The two major types of computer chips are primary memory chips and microprocessor chips. Supercomputers are focused on executing few programs as fast as possible, while mainframes can execute many programs concurrently. A compiler translates instructions of a high-level language into machine language.
This document provides 60 multiple choice questions about basic computer knowledge. It covers topics like computer generations, components, memory types, input/output devices, and other foundational computer concepts. It was written by Hamid Raza and includes his contact information. The questions are intended to test frequently asked topics in basic computer exams.
The document contains 40 multiple choice questions about operating systems. It covers topics like operating system components, file systems, scheduling algorithms, windows features, and more. The questions are single-select multiple choice with explanations for the answers. This type of document would be useful for someone studying or testing their knowledge of basic operating system concepts.
final Year Projects, Final Year Projects in Chennai, Software Projects, Embedded Projects, Microcontrollers Projects, DSP Projects, VLSI Projects, Matlab Projects, Java Projects, .NET Projects, IEEE Projects, IEEE 2009 Projects, IEEE 2009 Projects, Software, IEEE 2009 Projects, Embedded, Software IEEE 2009 Projects, Embedded IEEE 2009 Projects, Final Year Project Titles, Final Year Project Reports, Final Year Project Review, Robotics Projects, Mechanical Projects, Electrical Projects, Power Electronics Projects, Power System Projects, Model Projects, Java Projects, J2EE Projects, Engineering Projects, Student Projects, Engineering College Projects, MCA Projects, BE Projects, BTech Projects, ME Projects, MTech Projects, Wireless Networks Projects, Network Security Projects, Networking Projects, final year projects, ieee projects, student projects, college projects, ieee projects in chennai, java projects, software ieee projects, embedded ieee projects, "ieee2009projects", "final year projects", "ieee projects", "Engineering Projects", "Final Year Projects in Chennai", "Final year Projects at Chennai", Java Projects, ASP.NET Projects, VB.NET Projects, C# Projects, Visual C++ Projects, Matlab Projects, NS2 Projects, C Projects, Microcontroller Projects, ATMEL Projects, PIC Projects, ARM Projects, DSP Projects, VLSI Projects, FPGA Projects, CPLD Projects, Power Electronics Projects, Electrical Projects, Robotics Projects, Solor Projects, MEMS Projects, J2EE Projects, J2ME Projects, AJAX Projects, Structs Projects, EJB Projects, Real Time Projects, Live Projects, Student Projects, Engineering Projects, MCA Projects, MBA Projects, College Projects, BE Projects, BTech Projects, ME Projects, MTech Projects, M.Sc Projects, Final Year Java Projects, Final Year ASP.NET Projects, Final Year VB.NET Projects, Final Year C# Projects, Final Year Visual C++ Projects, Final Year Matlab Projects, Final Year NS2 Projects, Final Year C Projects, Final Year Microcontroller Projects, Final Year ATMEL Projects, Final Year PIC Projects, Final Year ARM Projects, Final Year DSP Projects, Final Year VLSI Projects, Final Year FPGA Projects, Final Year CPLD Projects, Final Year Power Electronics Projects, Final Year Electrical Projects, Final Year Robotics Projects, Final Year Solor Projects, Final Year MEMS Projects, Final Year J2EE Projects, Final Year J2ME Projects, Final Year AJAX Projects, Final Year Structs Projects, Final Year EJB Projects, Final Year Real Time Projects, Final Year Live Projects, Final Year Student Projects, Final Year Engineering Projects, Final Year MCA Projects, Final Year MBA Projects, Final Year College Projects, Final Year BE Projects, Final Year BTech Projects, Final Year ME Projects, Final Year MTech Projects, Final Year M.Sc Projects, IEEE Java Projects, ASP.NET Projects, VB.NET Projects, C# Projects, Visual C++ Projects, Matlab Projects, NS2 Projects, C Projects, Microcontroller Projects, ATMEL Projects, PIC Projects, ARM Projects, DSP Projects, VLSI Projects, FPGA Projects, CPLD Projects, Power Electronics Projects, Electrical Projects, Robotics Projects, Solor Projects, MEMS Projects, J2EE Projects, J2ME Projects, AJAX Projects, Structs Projects, EJB Projects, Real Time Projects, Live Projects, Student Projects, Engineering Projects, MCA Projects, MBA Projects, College Projects, BE Projects, BTech Projects, ME Projects, MTech Projects, M.Sc Projects, IEEE 2009 Java Projects, IEEE 2009 ASP.NET Projects, IEEE 2009 VB.NET Projects, IEEE 2009 C# Projects, IEEE 2009 Visual C++ Projects, IEEE 2009 Matlab Projects, IEEE 2009 NS2 Projects, IEEE 2009 C Projects, IEEE 2009 Microcontroller Projects, IEEE 2009 ATMEL Projects, IEEE 2009 PIC Projects, IEEE 2009 ARM Projects, IEEE 2009 DSP Projects, IEEE 2009 VLSI Projects, IEEE 2009 FPGA Projects, IEEE 2009 CPLD Projects, IEEE 2009 Power Electronics Projects, IEEE 2009 Electrical Projects, IEEE 2009 Robotics Projects, IEEE 2009 Solor Projects, IEEE 2009 MEMS Projects, IEEE 2009 J2EE P
Bca(rev syll ii-sem) assignment for july 2012 and jan 2013 sessionnShripad Tawade
This document contains assignments for the second semester of the Bachelor of Computer Applications (BCA) program for the year 2012. It includes assignments for 6 courses - MCS-011 Problem Solving and Programming, MCS-012 Computer Organisation and Assembly Language Programming, MCS-013 Data Structure, MCS-015 Operating System, BCSL-021 Computer Oriented Statistical Techniques, and BCSL-022 Discrete Mathematics. The assignments provide questions to test students' understanding of the course content and must be submitted by October 15th for the July session or April 15th for the January session.
The document provides instructions for a post graduate common entrance test for computer science engineering. It specifies the date, time, duration, and format of the test. Candidates are instructed to fill in personal details like registration number, question booklet code and serial number on the answer sheet. They are also provided instructions on how to answer questions within the given time limit, as well as guidelines for proper marking of responses. The test contains 2 parts - part 1 has 50 one-mark questions and part 2 has 25 two-mark questions.
CXC CSEC Information Technology Multiple Choice QuestionsElliot Seepaul
The document contains 60 multiple choice questions related to computer concepts such as hardware, software, operating systems, networking, programming, databases and information systems. The questions cover topics like input/output devices, disk formatting, network types, programming logic, data types, database keys and relationships between tables.
The document contains a 50 question practice test for the Computer Science & Applications paper-II exam. The questions cover topics like binary numbers, logic gates, algorithms, data structures, databases, operating systems and computer networks. The key answers are provided at the end with letters A through D corresponding to the multiple choice options for each question number from 1 to 50.
Solved Question Paper of Computer Operator Examination Conducted by EPF 2016Suresh Khanal
The document contains a solved question paper for a Computer Operator Examination conducted by EPF (Employee Provident Fund) with 50 multiple choice questions related to computer fundamentals. Some key topics covered include components of a computer system, operating systems, applications like MS Word, Excel and PowerPoint. The questions test the candidate's knowledge of basic computer terminology, specifications, commands and features of standard software. An explanation is provided for each answer with relevant details to justify the correct option.
This document contains a quiz of 75 multiple choice questions related to computer awareness. The questions cover topics such as computer hardware, operating systems, software applications, networking, internet, security, and computer programming languages. The questions are multiple choice with one correct answer out of 5 options for each question. The questions progress from basic to more advanced computer concepts.
1. First Science: Computer Science CS1.2:
Examination Format
There are 4 questions on the paper. Time allowed: 2 hours.
You must answer questions 1 and 2 and one other question.
All questions carry equal marks.
Question 1 is a multiple choice question made up of 60 sub-questions (see
below).
Negative marking applies. This is not as severe as it sounds !!
You get 1 mark for each correct answer. You only lose 1/3 marks for an
incorrect answer.
Question 2 is and assembly language programming question which is made
up of a number of parts. Some of these parts will require you to write
assembly language code fragments (NOT whole programs).
Questions 3 and 4 are computer architecture questions concerning matters
such as the fetch-execute cycle, pipelining, reading/writing memory, cache
memory and computer performance etc.
Sample Multiple Choice Questions (MCQs) 2001
Question 1 on the 1999 examination is Compulsory and consists of 50 mcqs drawn
largely from those given below.
Instructions for Answering MCQs
You will be provided with an MCQ answer sheet for your MCQ answers. This sheet is called
an EDPAC Answer Sheet. Please note the following instructions:
1. You should bring a HB pencil to the examination.
2. Do NOT fold or crease the EDPAC Answer Sheet.
3. You should mark the letters of your surname in the columns labelled Candidate’s Name
and mark your initials in the columns labelled INITS as if you were filling out a lotto ticket.
Also write your name in the appropriate box.
4. Write COMPUTER SCIENCE in the box Subject. Ignore the Subject Code box.
5. You should mark your Student number in the columns labelled CANDIDATE NUMBER.
6. You should use questions 1 to 50 on the EDPAC sheet IGNORING option E to provide the
answers to the corresponding MCQs in Question 1.
1
1
2. 7. Mark only one answer with your HB pencil with a clear Horizontal stroke.
8. You may alter you answer by erasing fully the pencilled mark and then marking your new
choice.
(It may be helpful to mark the answers on your exam paper first and then to transfer them to the
EDPAC sheet.)
9. Ensure that both your answer book and the EDPAC sheet are collected by the invigilators
before leaving your place.
10. Ensure that you have marked your name and student number on the EDPAC sheet and
written your name and number on your answer book.
11. Do NOT mark the EDPAC sheet in any way other than described above. Do not write or
doodle on the EDPAC sheet. Be especially carefully not to mark or damage the right hand
edge of the EDPAC sheet.
If you have any problems with the EDPAC sheet ask an invigilator for assistance.
Sample Questions:
1. Numbers are stored and transmitted inside a computer in
(a) binary form (b) ASCII code form (c) decimal form (d) alphanumeric form
2. The original ASCII codes (a) were 7 bits (b) 8 bits (c) represented 256 characters (d)
represented 127 characters
3. The ASCII code of ‘A’ is (a) 66D (b) 41H (c) 0100 0010 (d) 0110 0011
4. The ASCII code of ‘0’ (zero) is (a) 48D, (b) 32H (c) 0011 1000 (d) 42H.
5. The 4-bit binary number 0111 represents (a) 15, (b) -7 (c) 7 (d) -1
- The decimal number 255 may be represented by (a) 1111 1111B, (b) 1000 0000B, (c)
EEEEH, (d) 0111 1111
- The 8-bit binary number 1111 1111 represents (a) 255, (b) -255 (c) -127 (d) -1
6. The decimal number 127 may be represented by (a) 1111 1111B, (b) 1000 0000B, (c) EEH,
(d) 0111 1111
7. A byte corresponds to (a) 4 bits (b) 8 bits (c) 16 bits (d) 32 bits
8. The storage required for an image such as an X-ray is approximately (a) a few bytes (b) a
few hundred bytes (c) a few gigabytes (d) in the megabyte range.
9. A gigabyte represents (a) 1 billion bytes (b) 1000 kilobytes (c) 230 bytes (d) 1024 bytes
10. A megabyte represents (a) 1 million bytes (b) 1000 kilobytes (c) 220 bytes (d) 1024 bytes
11. A Kb corresponds to (a) 1024 bits (b) 1000 bytes (c) 210 bytes (d) 210 bits
12. A superscalar processor has (a) multiple functional units (b) a high clock speed (c) a large
amount of RAM (d) many I/O ports
13. A 32-bit processor has (a) 32 registers (b) 32 I/O devices (c) 32 Mb of RAM (d) a 32-bit
bus or 32-bit registers
14. Information is stored and transmitted inside a computer in (a) binary form (b) ASCII code
form (c) decimal form (d) alphanumeric form
2
2
3. 15. The minimum number of bits required to store the hexadecimal number FF is (a) 2, (b) 4,
(c) 8, (d) 16
16. A parity bit is (a) used to indicate uppercase letters (b) used to detect errors (c) is the first
bit in a byte (d) is the last bit in a byte
17. A 20-bit address bus allows access to a memory of capacity (a) 1 Mb (b) 2 Mb (c) 32Mb
(d) 64 Mb
18. A 32-bit address bus allows access to a memory of capacity (a) 64 Mb (b) 16 Mb (c) 1 Gb
(d) 4 Gb
19. Clock speed is measured in (a) bits per second (b) baud (c) bytes (d) Hertz
20. On-chip cache has (a) lower access time than RAM (b) larger capacity than off chip cache
(c) its own data bus (d) become obsolete
21. An FPU (a) makes integer arithmetic faster (b) makes pipelining more efficient (c)
increases RAM capacity (d) makes some arithmetic calculations faster
22. Pipelining improves CPU performance due to
(a) reduced memory access time (b) increased clock speed (c) the introduction of parallellism
(d) additional functional units
23. The system bus is made up of (a) data bus (b) data bus and address bus (c) data bus and
control bus (d) data bus, control bus and address bus
24. The von Neumann bottleneck is due to (a) mismatch in speed between secondary and
primary storage (b) mismatch in speed between the CPU and primary storage (c) slow speed of
I/O devices (d) low clock speeds
25. Cache memory enhances (a) memory capacity (b) memory access time (c) secondary
storage capacity (d) secondary storage access time
26. Cache memory (a) has greater capacity than RAM (b) is faster to access than CPU registers
(c) is permanent storage (d) faster to access than DRAM
27. A machine cycle refers to (a) fetching an instruction (b) clock speed (c) fetching, decoding
and executing an instruction (d)executing an instruction
28. CISC machines (a) have fewer instructions than RISC machines (b) use more RAM than
RISC machines (c) have medium clock speeds (d) use variable size instructions
29. RISC machines typically (a) have high capacity on-chip cache memories (b) have fewer
registers than CISC machines (c) are less reliable than CISC machines (d) typically execute 1
instruction per clock cycle.
30. CPU performance may be measured in (a) BPS (b) MIPS (c) MHz (d) VLSI
31. Modern processor chips may be classified as (a) LSI (b) ULSI (c) MIPS (d) SSI
32. Silicon chips are becoming more complex because (a) die size is decreasing (b) feature size
is decreasing (c) yield is increasing (d) the scale of integration is decreasing
33. Accessing disk storage is slower than accessing RAM by an order of (a) 10 (b) 100 (c) 1000
(d) 100,000
34. The typical disk storage capacity of a PC is of the order of (a) 32 MB (b) 2 Gb (c) 2 Tb (d)
5120 Kb
3
3
4. 35. Disk access takes of the order of (a) x millisecs (b) x microsecs (c) x/100 secs (d) x
nanosecs
36. RAM access takes of the order of (a) x millisecs (b) x microsecs (c) x/100 secs (d) x
nanosecs
37. Cache memory access takes of the order of (a) x millisecs (b) x microsecs (c) x secs (d) x
nanosecs
38. Accessing RAM is slower than accessing cache memory by an order of (a) 10 (b) 100 (c)
200 (d) 50
39. Optical tape storage (a) has faster access time than disk storage (b) smaller capacity than
CD-ROM (c) greater capacity than DAT storage (d) smaller capacity than DAT storage
40. DIP involves the use of a (a) scanner (b) plotter (c) microphone (d) CD-ROM
41. The typical RAM capacity of a PC is of the order of (a) 32 MB (b) 16 Gb (c) 16 Tb (d) 512
Kb
42. Modem speeds are measured in (a) bps (b) kbps (c) mbps (d) mips
43. LAN speeds are measured in (a) bps (b) Kbps (c) Mbps (d) Mips
44. WAN speeds are (a) usually higher than LAN speeds (b) measured in bytes per second (c)
depend on the transmission medium (d) limited by modem speeds
45. Accessing the Internet from a typical home PC requires the use of (a) CD-ROM drive (b) a
modem (c) Windows 95 (d) Netscape
46. To use the Internet you (a) must use the World Wide Web (b) must use electronic mail (c)
use appropriate communications software (d) must have a LAN account
47. A Pentium processor comprises (a) more than 1 million transistors (b) more than 3 million
transistors (c) 500,000 transistors (d) 900,000 transistors
48. Which of the following is NOT a type of processor (a) PowerPC 601 (b) Motorola 8086 (c)
Motorola 68000 (d) Intel Pentium
49. Apple Macintoshs were originally based on the (a) Intel 80x86 processor family (b)
Motorola 68000 family (c) Motorola 6800 family (d) PowerPc family
50. IBM PC’s were originally based on the (a) Intel 80x86 processor family (b) Motorola
68000 family (c) Motorola 6800 family (d) PowerPc family
51. IBM used as the operating system for their original PC (a) MS-DOS (b)Windows 3.1 (c)
PC-DOS (d) DOS
52. Windows (GUI) software originated on (a) IBM computers (b) Apple Macintosh computers
(c) Rank Xerox computers (d) Digital (DEC) computers
53. A RAID system is useful because (a) it increases processor speed (b) increases disk storage
capacity (c) increases disk storage capacity and availability (d) increases OS efficiency
54. In processing cheques which of the following I/O techniques have banks traditionally used
(a) OCR (b) MICR (c) barcode scanning (d) voice recognition
55 An RS-232 interface is (a) a parallel interface (b) a serial interface (c) printer interface (d) a
modem interface
4
4
5. 56. Which of the following is NOT a computer performance metric: (a) MIPS, (b) FLOPS, (c)
SPECmark, (d) RISC
57. For print quality you would expect best results from (a) line printer (b) dot matrix printer
(c) ink-jet printer (d) laser printer.
58. Handling dates in the next century is a serious problem for the computing industry. Which
of the following does NOT refer to this problem: (a) Y2K problem (b) Year 2000 problem (c)
Millennium bug (d) Next century problem.
59. ROM (a) is faster to access than RAM (b) is non-volatile (c) stores more information than
RAM (d) is used for cache memory
60. DRAM (a) is used for cache memory (b) is more expensive than SRAM (c) is cheaper than
SRAM (d) is only used at boot up time
61. SRAM (a) is cheaper than DRAM (b) is used at boot up time only (c) is used for cache
memory (d) is slower to access than DRAM
62. 10-Base-T refers to (a) Ethernet using thin coaxial cable (b) Ethernet using thick coaxial
cable (c) Ethernet using unshielded twisted pair (utp) cabling (d) none of the previous
63. 10-Base-2 refers to (a) Ethernet using thin coaxial cable (b) Ethernet using thick coaxial
cable (c) Ethernet using unshielded twisted pair (utp) cabling (d) none of the previous
64. 10-Base-5 refers to (a) Ethernet using thin coaxial cable (b) Ethernet using thick coaxial
cable (c) Ethernet using unshielded twisted pair (utp) cabling (d) none of the previous
65. The maximum recommended segment length for utp is (a) 200 metres (b) 100 metres (c)
500 metres (d) 1000 metres
66. A UPS (a) increased the storage capacity of a computer system (b) increases the process
speed (c) provides backup power in the event of a power cut (d) none of the previous
67. An NOS is (a) a proprietary operating system (b) a network operating system (c) Novell
Operating System (d) Unix-like operating system
68. An NIC (a) a Novell Interface Controller (b) used to control a printer (c) interfaces a
modem to a computer (d) connects a computer to a network
69. The capacity of a 3.5” floppy is around (a) 100K (b) 1.4 Mb (c) 5 Mb (d) 1 Gb
70. The capacity of a 3.5” Zip disk is around (a) 5 Mb (b) 10 Mb (c) 40 Mb (d) 100 Mb
71. When accessing a disk the amount of data transferred is (a) one track (b) one sector (block)
(c) one cylinder (d) 1 byte
72. A hard disk spins at x revolutions per minute where x is (a) 300 - 900 (b) 30 - 90 (c) 3000 -
9000 (d) 100,000
73. The largest delay in accessing data on disk is due to (a) seek time (b) rotation time (c) data
transfer time (d) none of the previous
74. CD-ROM capacity is around (a) 100 Mb (b) 650 Mb (c) 1 Gb (d) 4 Gb
75. The capacity of a DVD is around (a) 100 Mb (b) 650 Mb (c) 1.4 Gb (d) 4.7 Gb
76. The capacity of DAT is (a) 100 Mb (b) 650 Mb (c) 1 Gb (d) several gigabytes
77. A smart card (a) is a form of ATM card (b) has more storage capacity than an ATM card (c)
is an access card for a security system (d) contains a microprocessor
5
5
6. 78. The resolution of a VGA screen is (a) 1024 x 768 (b) 512 x 512 (c) 640 x 480 (d) 800 x 600
79. Laser printers usually print at (a) 200 dpi (b) 360 dpi (c) 600 dpi (d) 10,000 dpi
80. High print quality requires from (a) 600 dpi (b) 300 dpi (c) 1000 dpi (d)100,000 dpi
81. Laptop computers use (a) CRT displays (b) LCD displays (c) SSGA displays (d) none of
the previous
82. QWERTY is used with reference to (a) screen layout (b) mouse button layout (c) keyboard
layout (d) word processing software
83. A “killer application” is (a) software that is hard to debug ! (b) a form of computer virus (c)
a really popular application program (d) none of the previous
84. WYSIWYG is used with reference to (a) screen layout (b) mouse button layout (c)
keyboard layout (d) screen images that resemble printed documents
85. A GUI is (a) hardware (b) language interpreter (c) software interface (d) an operating
system
86. Multiprogramming refers to (a) having several programs in RAM at the same time (b)
multitasking (c) writing programs in multiple languages (d) none of the previous
87. Multitasking refers to (a) having several programs in RAM at the same time (b) the ability
to run 2 or more programs concurrently (c) writing programs in multiple languages (d) none of
the previous
88. Multiprogramming is a prerequisite for (a) multitasking (b) an operating system (c) to run
more than one program at the same time (d) none of the above
89. Timesharing is the same as (a) multitasking (b) multiprogramming (c) multiuser (d) none of
the previous
90. Virtual memory is (a) related to virtual reality (b) a form of ROM (c) a form of RAM (d)
none of the previous
91. Multiprocessing is (a) same as multitasking (b) same as multiprogramming (c) multiuser
(d) involves using more than one processor at the same time
92. The most widely used network operating system on PC LANs is (a) Linux (b) Novell
Netware (c) Unix (d) Windows NT
93. Disk fragmentation (a) is caused by wear (b) caused by overuse (c) is due to bad disk blocks
(d) none of the previous
94. A compiler is (a) a fast interpreter (b) slower than an interpreter (c) converts a program to
machine code (d) none of the previous
95. An interpreter is (a) faster than a compiler (b) translates and executes programs statement
by statement (c) converts a program to machine code (d) none of the previous
96. JPEG and MPEG (a) have to do with compression of graphics and video (b) have to do with
Web pages (c) the Internet (d) none of the previous
97. “Zipping” a file means (a) encrypting it (b) decrypting it (c) compressing it (d) transmitting
it
6
6
7. 98. The speed of transferring data with your modem is governed by (a) the speed of the your
modem (b) the speed of the receiving modem (c) the speed of transmitting/receiving modems
(d) the distance between the modems
99. ISDN speeds are (a) faster than ATM speeds (b) slower than ATM speeds (c) same as
modem speeds (d) same as ADSL speeds
100. A cable modem uses (a) LAN cable (b) cable-TV cable (c) is same speed as conventional
modem (d) optic fibre cables
101. A client-server system is based on (a) mainframe technology (b) WAN technology (c)
LAN technology (d) Unix operating system
102. A multiplexor is a form of (a) hub (b) modem (c) bridge (d) none of the previous
103. A hub is a (a) router (b) a bridge (c) repeater (d) all of the previous
104. A search engine is (a) hardware (b) IR system for the Internet (c) browser (d) none of the
previous
105. An ISP (a) provides access to the Internet (b) is a CPU register (c) is a CPU functional unit
(d) make of processor
106. FTP is (a) used to send email (b) used to browse the Web (c) is part of Netscape (d) is a
protocol for the transfer of files between computers
107. Telnet (a) used to send email (b) uses telephone lines (c) is part of Netscape (d) is a
protocol that allows for remote login
108. A firewall is (a) used to protect a computer room from fires and floods (b) a form of virus
(c) a screen saver program (d) none of the previous
109. A proxy server is (a) a backup server (b) an email server (c) a poor file server (d) none of
the above
110. An RDBMS is a (a) remote DBMS (b) relative DBMS (c) Relational DBMS (d) Reliable
DBMS
111 Data Warehousing refers to (a) storing data offline at a separate site (b) backing up data
regularly (c) is related to data mining (d) uses tape as opposed to disk
112. A 4GL is (a) DBMS system (b) uses Java (c) uses C++ (d) none of the previous.
113. The Pentium processor is (a) 16-bit (b) 32-bit (c) 64 bit (d) 8-bit
114. The IBM/Motorola PowerPC 601 processor is (a) 16-bit (b) 32-bit (c) 64 bit (d) 8-bit
115. The Motorola 68000 processor is (a) 16-bit (b) 32-bit (c) 64 bit (d) 8-bit
116. The Digital Alpha processor is (a) 16-bit (b) 32-bit (c) 64 bit (d) 8-bit
117. Apple’s iMac uses a (a) ISA bus (b) NuBus (c) PCI bus (d) USB bus
118 Which of the following is NOT a bus standard (a) EISA (b) VME (c) MCA (d) RS-232
119. A nanosecond is (a) 10-6 sec (b) 10-3 sec (c) 10-12 sec (d) 10-9 sec
120. The feature size of a Pentium is approx. (a) 1 micron (b) 0.1 microns (c) 4 microns (d) .4
microns
7
7
8. 121. The resolution of an SVGA screen is (a) 1024 x 768 (b) 512 x 512 (c) 640 x 480 (d) 800 x
800
122. A 5 stage pipeline with the stages taking 1, 1, 3, 1, 1, units of time has a throughput of (a) 1/3 (b) 1/7 (c) 7 (d)
3
123. Given a 5 stage pipeline with stages taking 1, 2, 3, 2, 1 units of time, the throughput of the pipeline is:
(a) 9 (b) 1/9 (c) 1/3 (d) 2
124. Given a 5 stage pipeline with stages taking 1, 2, 3, 1, 1 units of time, the clock period of the pipeline is:
(a) 8 (b) 1/8 (c) 1/3 (d) 3
125. Given a 5 stage pipeline with stages taking 1, 2, 3, 1, 1 units of time, the flowthrough time of the pipeline is:
(a) 8 (b) 1/8 (c) 1/3 (d) 3
126. The average memory access time for a machine with a cache hit rate of 90% where the cache access time is 10ns
and the memory access time is 100ns is (a) 55ns, (b) 45ns, (c) 90ns, (d) 19ns
127. The clock speed of a modern PC is of the order of (a) 400 Khz (b) 400 Hz (c) 400 Mhz (c)
400 Ghz
128. Given that the subprogram putc displays the character in al, the effect of the following instructions:
mov al, ‘c’
sub al, 2
call putc
is to (a) display 2 (b) display 'c' (c) display 'a' (d) display a blank
129. Given that the bl register contains ‘b’, the effect of the following instruction
and bl, 1101 1111
is to (a) clear bl (b) store ‘B’ in bl (c) store 0010 0000 in bl (d) leave bl unchanged
130. Which of the following is an illegal instruction
(a) MoV Ax, 30000 (b) iNc Al, 1 (c) aNd bx, bx (d) add ax, 30
131 An OR gate generates a low output when (a) any one of its inputs is low (b) all of its inputs are high (c) when all
of its inputs are low (d) power fails
132. Given that the subprogram putc displays the character in al, the effect of the following
instructions: mov al, ‘a’
add al, 2
call putc
is to (a) display 2 (b) display c (c) display a (d) display a blank
133. Given that the bl register contains ‘B’, the effect of the following instruction
or bl, 0010 0000
is to (a) clear bl (b) store ‘b’ in bl (c) store 0010 0000 in bl (d) leave bl unchanged
133b. Given that the bl register contains ‘B’, which of the following instructions will change bl so that it contains 'b'
(a) or bl, 0010 0000 (b) and bl, 0010 0000 (c) or bl, 1101 1111 in bl (d) and bl, 1101
1111
8
8
9. 133c. Given that the bl register contains ‘b’, which of the following instructions will change bl so that it contains 'B'
(a) or bl, 0010 0000 (b) and bl, 0010 0000 (c) or bl, 1101 1111 in bl (d) and bl, 1101
1111
134. Which of the following is an illegal instruction
(a) MoV Ax, 30000 (b) iNc Al (c) aNd bx, bx (d) add ax 30
135. An AND gate generates a high output when (a) any one of its inputs is high (b) all of its inputs are high (c) when
all of its inputs are low (d) power fails
136. Given that the subprogram putc displays the character in al, the effect of the following instructions:
mov al, ‘0’
add al, 2
call putc
is to (a) display ‘2’ (b) display '3' (c) display '0' (d) display a blank
137. Given that the bl register contains 1111 0000, the effect of the following instruction
or bl, 0000 1111
is to (a) clear bl (b) store 1111 1111 in bl (c) store 0000 1111 in bl (d) leave bl unchanged
138. Which of the following is an illegal 8086 instruction
(a) mov 20, bx (b) iNc Al (c) aNd bx, bx (d) add ax, 30
139. Which of the following is an illegal l8086 instruction
(a) mov ax, [bx] (b) iNc [bx] (c) aDd bx, [bx] (d) add ax, [cx]
140. Which of the following is an illegal 8086 instruction
(a) mov ax, [bx] (b) iNc [bx] (c) aDd bx, [dx] (d) add [bx], 1
141. Which of the following is an illegal 8086 instruction
(a) ret 2 (b) push al (c) aDd bx, 25000 (d) and ax, dx
142. The net effect of calling the following subprogram in terms of program behaviour:
Subprog: push ax
add ax, 10
ret
is to (a) leave ax unchanged (b) add 10 to ax (c) cause the program to behave in an unpredictable manner (d) do
nothing
143. Branch prediction is used in the context of (a) pipelining (b) program loops (c) cache memory (d) ALU operation
144. Delayed branching is used (a) to introduce delays in program execution (b) in pipelining (c) in cache memory (d)
decoding instructions
145. A Harvard architecture means that a machine has (a) separate memories for data and instructions (b) unified
cache memory (c) multiple functional units (d) an on-chip cache
146. Which is the most complex component of the following (a) transistor (b) flip flop (c) AND gate (d) decoder
9
9
10. 147. An assembly language instruction (a) always has a label (b) always takes at least 1 operand (c) always has an
operation field (c) always modifies the status register
148. An arithmetic instruction always modifies the (a) stack pointer (b) status register (c) program counter (d) an index
register
149. A conditional jump instruction (a) always cause a transfer of control (b) always involves the use of the status
register (c) always modifies the program counter (d) always involves testing the Zero flag
150. An interrupt instruction (a) causes an unconditional transfer of control (b) causes a conditional transfer of control
(c) modifies the status register (d) is an I/O instruction
151. A data movement instruction will (a) modify the status register (b) modify the stack pointer (c) modify the
program counter (d) transfer data from one location to another
152. The memory address register is used to store (a) data to be transferred to memory (b) data that has been
transferred from memory (c) the address of a memory location (d) an instruction that has been transferred from
memory.
153. The memory data register is used to store (a) data to be transferred to or from memory (b) data to be transferred
to the stack (c) the address of a memory location (d) an instruction that has been transferred from memory
154. The instruction register stores (a) an instruction that has been decoded (b) an instruction that has been fetched
from memory (c) an instruction that has been executed (d) the address of the next instruction to be executed
155. The program counter (a) stores the address of the instruction that is currently being executed (b) stores the next
instruction to be executed (c) stores the address of the next instruction to be executed (d) stores the instruction that is
being currently executed.
156. The stack pointer stores (a) the address of the stack in memory (b) address of the last item pushed on the stack (c)
the address of the next free stack location (d) the address of the last item popped from the stack
157. The read/write line is (a) belongs to the data bus (b) belongs to the control bus (c) belongs to the address bus (d)
CPU bus
158. The instruction inc I where I is a memory variable involves (a) a memory read operation (b) a memory write
operation (c) a memory read and a memory write operation (c) only an arithmetic operation
159. Memory mapped I/O involves (a) transferring information between memory locations (b) transferring information
between registers and memory (c) transferring information between the CPU and I/O devices in the same way as
between the CPU and memory (d) transferring information between I/O devices and memory
160. Busy waiting is a technique (a) to allow the CPU wait for a busy device (b) to allow a busy device wait for the
CPU (c) to keep an idle device busy (d) improve CPU performance
161. A hardware interrupt is (a) also called an internal interrupt (b) also called an external interrupt (c) an I/O interrupt
(d) a clock interrupt
162. An assembly language program is typically
(a) non-portable (b) shorter than an equivalent HLL program (c) harder to read than a machine code program (d)
slower to execute than a compiled HLL program
163. Programs are written in assembly language because they (a) run faster than HLL programs (b) are portable (c)
easier to write than machine code programs (d) they allow the programmer access to registers or instructions that are
not usually provided by a HLL
164. An assembly language program is translated to machine code by (a) an assembler (b) a compiler (c) an interpreter
(d) a linker
10
10
11. 165. An assembly language directive is (a) the same as an instruction (b) used to define space for variables (c) used to
start a program (d) to give commands to an assembler
166. Which of the following is not an MASM directive (a) .stack (b) db (c) .model (d) call
167. When a program is translated by the MASM assembler, the machine code is stored in a file with the extension
(a) .lis (b) .obj (c) .exe (d) .out
167a. The output of the linker (LINK command) is stored in a file with the extension (a) .lis (b) .obj (c) .exe (d) .lnk
168. Which of the following is not part of the processor
(a) the ALU (b) the CU (c) the registers (d) the system bus
169. Which of the following variables uses the most amount of RAM:
(a) x db 255 (b) y db 80 dup(‘Z’) (c) z dw 50 dup(0) (d) small dd 40 dup(0)
170. Which of the following defines a constant Max
(a) Max db 80 (b) Max equ 80 (c) Max dw 80 (d) mov Max, 80
171. The result of mov al, 65 is to store
(a) 0100 0010 in al, (b) ASCII code of ‘A’ in al, (c) store 42H in al (d) store 1000 0001 in al
172. The call instruction is used to (a) access subprograms (b) access memory (c) perform I/O (d) access the stack
173. The effect of the following instructions
push ax
add ax, 4
pop bx
mov cx, ax
push bx
pop ax
on the ax register is (a) leave it with its original value (b) add 4 to it (c) clear it (d) double it
174. To copy the hexadecimal number A to the bh register you write
(a) mov 0bh, ah (b) mov bh, 0ah (c) mov bh, ah (d) mov bh, [ah]
175. The effect of the following instructions
mov ah, 2h
int 21h
is to (a) read a character into al (b) read a character into dl (c) display the character in al (d) display the character in dl
176. The effect of the following instructions
mov ah, 1h
int 21h
is to (a) read a character into al (b) read a character into dl (c) display the character in al (d) display the character in dl
177. Given that al contains the ASCII code of an uppercase letter, it can be converted to lowercase by (a) add al, 32 (b)
sub al, 32 (c) or al, 1101 1111 (d) and al, 0010 0000
178. Given that al contains the ASCII code of a lowercase letter, it can be converted to uppercase by (a) add al, 32 (b)
sub al, 32 (c) or al, 1101 1111 (d) and al, 0010 0000
179. Given that al contains the ASCII code of an uppercase letter, it can be converted to lowercase by (a) add al, 30 (b)
sub al, 30 (c) or al, 0010 0000 (d) and al, 0010 0000
11
11
12. 180. Given that al contains the ASCII code of a lowercase letter, it can be converted to uppercase by (a) add al, 32 (b)
sub al, 30 (c) or al, 1101 1111 (d) and al, 1101 1111
181 The instruction jg operates with (a) unsigned numbers (b) 2’s complement numbers (c) floating point numbers
(d) ASCII codes
182 The instruction ja operates with (a) unsigned numbers (b) signed numbers (c) floating point numbers (d) ASCII
codes
183 The instruction mov str[si], ‘a’ is an example of (a) indirect addressing (b) indexed addressing (c) direct
addressing (d) register addressing
184 The instruction mov ax, [bx] is an example of (a) indirect addressing (b) indexed addressing (c) direct
addressing (d) based addressing
185 The instruction je label is an example of (a) indirect addressing (b) indexed addressing (c) relative addressing
(d) immediate addressing
186. The word size of an 8086 processor is
(a) 8 bits (b) 16 bits (c) 32 bits (d) 64 bits
187. The code used to boot up a computer is stored in (a) RAM (b) ROM (c) PROM and (d) EPROM
188. In accessing a disk block the longest delay is due to (a) rotation time (b) seek time (c) transfer time (d) clock
speed
189. Given that putc displays a character, the following code
mov al, ‘a’
add al, 2
and al, 1101 1111
call putc
is to (a) display 2 (b) display ‘c’ (c) display ‘C’ (d) display ‘A’
190. Given that bl contains ‘B’ the effect of the following code
or bl, 0010 0000
add bl, 2
is to (a) clear bl, (b) store ‘b’ in bl (c) store 0110 0001 in bl (d) store ‘d’ in bl
191. The average memory access time for a machine with a cache hit rate of 90% where the cache access time is 10ns
and the memory access time is 100ns is (a) 55ns, (b) 45ns, (c) 90ns, (d) 19ns
192. Which of the following is NOT involved in a memory write operation: (a) MAR, (b) PC,
(c)
MDR, (d) Data Bus
193. Pipelining improves CPU performance due to
(a) reduced memory access time (b) increased clock speed (c) the introduction of parallellism
(d) additional functional units
194. DRAM (a) is used for cache memory (b) is more expensive than SRAM (c) is cheaper
than SRAM (d) is only used at boot up time
195. SRAM (a) is cheaper than DRAM (b) is used at boot up time only (c) is used for cache
memory (d) is slower to access than DRAM
196. WYSIWYG is used with reference to (a) screen layout (b) mouse button layout (c)
keyboard layout (d) screen images that resemble printed documents
12
12
13. 197. A GUI is (a) hardware (b) language interpreter (c) software interface (d) an operating
system
199. FTP is (a) used to send email (b) used to browse the Web (c) is part of Netscape (d) is a
protocol for the transfer of files between computers
200. Telnet (a) used to send email (b) uses telephone lines (c) is part of Netscape (d) is a
protocol that allows for remote login
201. Which of the following is an illegal 8086 instruction
(a) ret 2 (b) push ax (c) aDd bx, 25000 (d) mov x, ay
202. The read/write line is (a) belongs to the data bus (b) belongs to the control bus (c) belongs to the address bus (d)
CPU bus
203. The call instruction stores the return address for a subprogram (a) on the stack (b) in the memory address
register (c) in the program counter (d) does not involve using the return address
204 The instruction je label is an example of (a) indirect addressing (b) indexed addressing (c) relative addressing
(d) immediate addressing
205. Given that dl contains 'x' which of the following will cause 'x' to be displayed:
(a) mov ah, 1h (b) mov ah, 2h (c) mov ah, 2h (d) mov ah, 0h
int 21h int 20h int 21h int 21h
206. Which of the following will read a character into al:
(a) mov ah, 9h (b) mov ah, 2h (c) mov ah, 2h (d) mov ah, 1h
int 21h int 20h int 21h int 21h
207. Which of the following will display a string whose address is in the dx register:
(a) mov ah, 0h (b) mov ah, 2h (c) mov ah, 9h (d) mov ah, 9h
int 21h int 20h int 21h int 22h
208. Which of the following will terminate a program and return to MS-DOS:
(a) mov ax, 4c00h (b) mov ax, 4c00h (c) mov dx, 4c00h (d) mov ax, 9h
int 20h int 21h int 21h int 22h
209. The cmp instruction modifies the (a) program counter (b) instruction register (c) flags register (d) segment
register
210. Conditional instructions typically inspect the (a) program counter (b) instruction register (c) flags register (d)
accumulator
211.The bp register is typically used for accessing (a) strings (b) memory (c) stack (d) data segment
212. The ret instruction modifies the (a) instruction register (b) program counter (c) address register (d) flags register
213. The sp register is typically used for accessing (a) strings (b) memory (c) stack (d) data segment
214. The call instruction modifies (a) the flags register (b) program counter (c) bp register (d) none of the previous
215. The call instruction modifies (a) the flags register (b) stack pointer (c) bp register (d) none of the previous
216 The call instruction modifies (a) the program counter and SP register (b) flags register (c) bp register (d) none of
the previous
217. The ret instruction modifies the (a) stack pointer (b) bp register (c) instruction register (d) flags register
13
13
14. 218. One type of main memory in a PC is called (a) SRAM (b) SDRAM (c) ROM (d) DROM
219.
14
14