This document discusses the make tool and its usage. Make is used to automatically execute commands based on file dependencies in order to rebuild programs and packages. It is configured using makefiles which specify rules and dependencies between targets. Makefiles allow rebuilding portions of a program automatically when source files change. Examples are provided to demonstrate basic makefile rules and usage of make for compiling C programs.

1. “make” System
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2. What to Expect?
What is 'make' & its System?
Learning 'make' by Examples
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3. What is 'make'?
Tool to automatically execute commands
Any number, Any length
Based on complete dependency chains
Typically based on time (of change)
Majorly replacing the manual process
Effectively saving time & manual errors
Typical usages
Project build system (compilation, etc)
Packaging files (binaries, documentation, source code)
Installations (of Systems, Packages, ...)
Anything that can be automated based on dependencies
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4. Usage of 'make'
Initiated by the command 'make'
Controlled by its configuration files
Containing rules to execute various commands
Based on various target dependencies
Default configuration files
GNUmakefile, makefile, Makefile (in that order)
Other configuration file using -f
Assisted by many in-built rules & variables
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5. Typical Rule
target: dependencies
<tab>action
<tab>action
<tab>...
Example
abc: pqr
cp pqr abc
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6. Sample Makefile
xyz: abc
cp abc xyz
abc: pqr
cp pqr abc
pqr:
touch pqr
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7. Let's create a Makefile
for
Automatically compiling a C program
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8. Extending the Makefile
Build an executable from many C files
Build a project with 10,000 C files
Add the user's header file dependencies
Automatic header dependency generation
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9. What all have we learnt?
'make' & its benefits
Usage of 'make'
Examples of using 'make'
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10. Any Queries?
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