INFINEON TECHNOLOGIES (M) SDN BHD:
Engineer I
2009 – 2011
Process/KPI Achievements (09/11):
- TVPA Reduction Project Lead:
 Soft layer dedication implementation, WLC calibration, avoidance of
~0.75 stepper investment, save ~€1.3 million.
 Train & mentor new engineers, AEs & OS on TVPA error troubleshooting
skills, saving sumof TVPA error duration by 126 hours/week, gain extra
~5138 MLPW per stepper.
- Stepper Tool Acceptance Lead:
 Leading steppers released through PCRB with 100% on or before RFP
target date (total 9 steppers), 50% of steppers released 40% earlier than
RFP date.
 Revise stepper tool acceptance VA & train up 5 new engineers & AEs to
independently handle tool acceptance to speed up tool release time line.
 521, 1st stage immediate released for layers with exposure load less than
70% (lens heating issue); 2nd stage released with more i5 capable layers
after U-lens changed to cope 200k MLPW production ramping.
 401 (419 relocation), fast stepper qualification and released at ECD fab.
- Stepper Jobserver Owner: Excellent setup and migration of i4 steppers to 2nd
jobserver and stepper recipe database backup.
- CANOMAP methodology implementation for stepper baseline compensation in
ECD fab. Avoid standalone overlay measurement tool investment, save ~€564k.
- Litho Yf: Sustain M2 Yf at 0.14% for Q1 to Q3 10/11 (target 0.10%) after Litho
Rework.
- Litho Rework: Sustain M2 Rework at 0.4% for Q1 to Q3 10/11 (target 0.4%),
compare to Villach 1.0%, Regensburg 0.7%, Dresden 1.2%. Rework reduction
contribution as Lead of TVPA Reduction Project: Problematic layer dedication
implementation. Total rework reduction: save ~€37.4k/yr.
- Litho Cpk: Achieve stretch target on Cpk > 1.5, results in Q3 10/11 95.48% vs
target 94%. Technology Front End layers Cpk achieve stretch target for Cpk > 1.5
for Q1 to Q4. Results: Q1 10/11 96% (250%), Q2 09/10 97% (250%), Q3 09/10 96%
(250%). Technology Back End layers Cpk achieve target for Cpk > 1.5 for Q1 to Q4.
Results: Q1 09/10 91% (250%), Q2 09/10 89% (100%), Q3 09/10 89% (100%).
 FE Implant layers Cpk improved from 67% (30/45 channels) to 87%
(39/45 channels).
 Fast detection on litho abnormality (missing alignment mark, abnormal
EPI overlay box) & managed to stop incoming processes (CMP over-polish,
EPI grow temperature drift, EPI dep slipline & RTP issue, missing etch)
quickly to prevent wafers to be scrapped.
- Litho PIC for C9FLRU M1528K Wafer Edge Yield Improvement Project, Zone E
Yield improved from 65% to 73%, meeting 160% target, save ~€229k/yr. [Bronze
Award Winner of IFX Team of 4th Quarter/2011].
- Litho PIC for SMART6 KILIS Yield Improvement Project, potential saving,
~€252k/yr.
- Stepper capacity improvement:
 Layer dedication implementation, improved stepper throughput, gains
extra ~25k MLPW.
 Additional 20 layers qualified at i5 Imide stepper, improved capacity with
flow factor: ~175k MLPW.
 Additional DOPL Passivation (KC) layer qualified at i4 Imide stepper,
increased tool capacity.
- TVPA Error Reduction Project Owner: Accountable for TVPA error process
optimization & reduction; CANON i4 Stepper, reduction from ~35% to ~15%;
Imide Stepper, from ~45% to ~15%; CANON i5 Stepper, from ~25% to 10% by
June 2010. Savings of 1,000 LSPW stepper capacity.
- CANON Stepper Capacity Improvement Project Owner: Perform process
optimization on AGA sample shot reduction for stepper throughput
improvement. Reduce AGA sample shot from 6 main 3 sub to only 3 main for
overlay spec greater than 200 nm. Total gain of 6,500 LSPW stepper capacity.
- CANON Stepper Tool Acceptance Owner (from July 2010): Tool released ahead of
schedule, EXPCAN422, EXPCAN523 & EXPCAN583 by 3.5 days, meeting 133%
expectations; EXPCAN521 & EXPCAN525 by 4.5 days meeting 147% expectations;
EXPCAN526 & EXPCAN528 by 7 days meeting 200% expectations.
- Responsible for process integration and support of SFET3HV technology transfer
from Regensburg: Independently completing 4 different voltage classes’
lithography set up and improvement/process window study with zero error.
Independent setup within less than 10months in IFKM, while running in
lithography 12 hours rotation shift support.
- CANON Stepper APC Coordinator: Weekly APC violation monitoring, tool stop
optimization & improvement for personnel efficiency & scrap/rework
improvement. Potential gain 14 hour/week, 630 wph.
Technical Paper Achievements (09/11):
- TVPA Error Optimization on Conventional system(i4 Stepper) using BIO function.
Skills/Tool/Equipment Known (09/11):
- CANON DUV/i4/i5 Stepper: Stepper (i4/i5) Acceptance Qualification, Stepper
Jobfile Creation, Process Optimization
- TEL Act8/MK7 Track: Process issue troubleshooting
- KLA Tencor Overlay, Hitachi CDSEM: Recipe Creation/Optimization (manual assist
reduction)
- EVG Mask Aligner: Recipe Creation/Optimization

LinkedIn – Engineer I at Infineon Technologies

  • 1.
    INFINEON TECHNOLOGIES (M)SDN BHD: Engineer I 2009 – 2011 Process/KPI Achievements (09/11): - TVPA Reduction Project Lead:  Soft layer dedication implementation, WLC calibration, avoidance of ~0.75 stepper investment, save ~€1.3 million.  Train & mentor new engineers, AEs & OS on TVPA error troubleshooting skills, saving sumof TVPA error duration by 126 hours/week, gain extra ~5138 MLPW per stepper. - Stepper Tool Acceptance Lead:  Leading steppers released through PCRB with 100% on or before RFP target date (total 9 steppers), 50% of steppers released 40% earlier than RFP date.  Revise stepper tool acceptance VA & train up 5 new engineers & AEs to independently handle tool acceptance to speed up tool release time line.  521, 1st stage immediate released for layers with exposure load less than 70% (lens heating issue); 2nd stage released with more i5 capable layers after U-lens changed to cope 200k MLPW production ramping.  401 (419 relocation), fast stepper qualification and released at ECD fab. - Stepper Jobserver Owner: Excellent setup and migration of i4 steppers to 2nd jobserver and stepper recipe database backup. - CANOMAP methodology implementation for stepper baseline compensation in ECD fab. Avoid standalone overlay measurement tool investment, save ~€564k. - Litho Yf: Sustain M2 Yf at 0.14% for Q1 to Q3 10/11 (target 0.10%) after Litho Rework. - Litho Rework: Sustain M2 Rework at 0.4% for Q1 to Q3 10/11 (target 0.4%), compare to Villach 1.0%, Regensburg 0.7%, Dresden 1.2%. Rework reduction contribution as Lead of TVPA Reduction Project: Problematic layer dedication implementation. Total rework reduction: save ~€37.4k/yr. - Litho Cpk: Achieve stretch target on Cpk > 1.5, results in Q3 10/11 95.48% vs target 94%. Technology Front End layers Cpk achieve stretch target for Cpk > 1.5 for Q1 to Q4. Results: Q1 10/11 96% (250%), Q2 09/10 97% (250%), Q3 09/10 96% (250%). Technology Back End layers Cpk achieve target for Cpk > 1.5 for Q1 to Q4. Results: Q1 09/10 91% (250%), Q2 09/10 89% (100%), Q3 09/10 89% (100%).  FE Implant layers Cpk improved from 67% (30/45 channels) to 87% (39/45 channels).  Fast detection on litho abnormality (missing alignment mark, abnormal EPI overlay box) & managed to stop incoming processes (CMP over-polish, EPI grow temperature drift, EPI dep slipline & RTP issue, missing etch) quickly to prevent wafers to be scrapped.
  • 2.
    - Litho PICfor C9FLRU M1528K Wafer Edge Yield Improvement Project, Zone E Yield improved from 65% to 73%, meeting 160% target, save ~€229k/yr. [Bronze Award Winner of IFX Team of 4th Quarter/2011]. - Litho PIC for SMART6 KILIS Yield Improvement Project, potential saving, ~€252k/yr. - Stepper capacity improvement:  Layer dedication implementation, improved stepper throughput, gains extra ~25k MLPW.  Additional 20 layers qualified at i5 Imide stepper, improved capacity with flow factor: ~175k MLPW.  Additional DOPL Passivation (KC) layer qualified at i4 Imide stepper, increased tool capacity. - TVPA Error Reduction Project Owner: Accountable for TVPA error process optimization & reduction; CANON i4 Stepper, reduction from ~35% to ~15%; Imide Stepper, from ~45% to ~15%; CANON i5 Stepper, from ~25% to 10% by June 2010. Savings of 1,000 LSPW stepper capacity. - CANON Stepper Capacity Improvement Project Owner: Perform process optimization on AGA sample shot reduction for stepper throughput improvement. Reduce AGA sample shot from 6 main 3 sub to only 3 main for overlay spec greater than 200 nm. Total gain of 6,500 LSPW stepper capacity. - CANON Stepper Tool Acceptance Owner (from July 2010): Tool released ahead of schedule, EXPCAN422, EXPCAN523 & EXPCAN583 by 3.5 days, meeting 133% expectations; EXPCAN521 & EXPCAN525 by 4.5 days meeting 147% expectations; EXPCAN526 & EXPCAN528 by 7 days meeting 200% expectations. - Responsible for process integration and support of SFET3HV technology transfer from Regensburg: Independently completing 4 different voltage classes’ lithography set up and improvement/process window study with zero error. Independent setup within less than 10months in IFKM, while running in lithography 12 hours rotation shift support. - CANON Stepper APC Coordinator: Weekly APC violation monitoring, tool stop optimization & improvement for personnel efficiency & scrap/rework improvement. Potential gain 14 hour/week, 630 wph. Technical Paper Achievements (09/11): - TVPA Error Optimization on Conventional system(i4 Stepper) using BIO function. Skills/Tool/Equipment Known (09/11): - CANON DUV/i4/i5 Stepper: Stepper (i4/i5) Acceptance Qualification, Stepper Jobfile Creation, Process Optimization - TEL Act8/MK7 Track: Process issue troubleshooting - KLA Tencor Overlay, Hitachi CDSEM: Recipe Creation/Optimization (manual assist reduction) - EVG Mask Aligner: Recipe Creation/Optimization