SPICE MODEL of FMLG14S (Standard Model) in SPICE PARK
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This document summarizes the modeling of a general purpose rectifier diode. It details the circuit components, manufacturer specifications, and SPICE model parameters. Simulation results show forward voltage characteristics match measurements within 1% error. Junction capacitance and reverse recovery characteristics also agree closely with measurements.
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SPICE MODEL of FMLG14S (Standard Model) in SPICE PARK
- 1. Device Modeling Report COMPONENTS: DIODE/GENERAL PURPOSE RECTIFIER /STANDARD PART NUMBER: FML-G14S MANUFACTURER: SANKEN REMARK: TC=25C Bee Technologies Inc. All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
- 2. Pspice model Model description parameter IS Saturation Current N Emission Coefficient RS Series Resistance IKF High-injection Knee Current CJO Zero-bias Junction Capacitance M Junction Grading Coefficient VJ Junction Potential ISR Recombination Current Saturation Value BV Reverse Breakdown Voltage(a positive value) IBV Reverse Breakdown Current(a positive value) TT Transit Time All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
- 3. Forward Current Characteristic Circuit Simulation Result Evaluation Circuit R1 0.01m D1 V1 0Vdc FML-G14S 0 All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
- 4. Comparison Graph Circuit Simulation Result Simulation Result Vfwd(V) Vfwd(V) Ifwd(A) %Error Measurement Simulation 0.005 0.460 0.459 0.22 0.01 0.500 0.495 1.00 0.02 0.530 0.530 0.00 0.05 0.580 0.581 -0.17 0.1 0.620 0.620 0.00 0.2 0.670 0.666 0.60 0.5 0.730 0.736 -0.82 1 0.800 0.800 0.00 2 0.900 0.900 0.00 5 1.050 1.050 0.00 10 1.230 1.226 0.33 20 1.500 1.500 0.00 All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
- 5. Junction Capacitance Characteristic Circuit Simulation Result Evaluation Circuit V2 0Vdc V1 = 0 V2 = 100 TD = 0 TR = 10n V1 TF = 50u D1 PW = 50n PER = 10u FML-G14S 0 All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
- 6. Comparison Graph Circuit Simulation Result Simulation Result Cj(pF) Cj(pF) Vrev(V) %Error Measurement Simulation 0 118.310 118.310 0.00 0.1 107.870 110.510 -2.45 0.2 100.250 103.163 -2.91 0.5 83.970 86.020 -2.44 1 70.110 69.260 1.21 2 56.280 56.669 -0.69 5 40.730 40.773 -0.11 10 31.220 31.192 0.09 20 23.630 23.786 -0.66 50 16.860 16.455 2.40 100 12.180 12.542 -2.97 All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
- 7. Reverse Recovery Characteristic Circuit Simulation Result Evaluation Circuit R1 50 V1 = -9.26 V2 = 10.59 TD = 0 TR = 10n V1 TF = 10n D1 PW = 20u PER = 50u FML-G14S 0 Compare Measurement vs. Simulation Measurement Simulation %Error trr 27.60 ns 27.60 ns 0.00 All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
- 8. Reverse Recovery Characteristic Reference Trj=9.60(ns) Trb=18.0(ns) Conditions:Ifwd=lrev=0.2(A),Rl=50 Example Relation between trj and trb All Rights Reserved Copyright (C) Bee Technologies Inc. 2004