The document outlines the significance and types of flag registers in processors, detailing how they reflect the outcomes of operations. It explains various status, control, and system flags, their functions, and gives examples of how different instructions affect these flags. Additionally, the document includes tasks for applying the knowledge on flag registers and their effects after specific instructions are executed.

1. EXPLORING FLAG REGISTER
Experiment 7

2. Objective
• Identification of flag register
• Type of flag register
• Learn which flag bits are affected by different instructions

3. Flag Register
• The Flag Register determines the current state of the processor by
storing specific bits that reflect the outcome of arithmetic, logical, and
control operations.
• These bits are crucial for decision-making, flow control, and
conditional execution in assembly programming.
• There are different types of flags:
1. Status flags: Reflect results of operations (e.g., CF, ZF, SF).
2. Control flags: Control CPU behaviour (e.g., IF, DF).
3. System flags: Manage processor states (e.g., VM, IOPL).

4. Status Flags
•These flags reflect the outcomes of arithmetic or logical operations.
• They indicate conditions like overflow, carry, or zero results, which are
essential for decision-making in programs.
Carry Flag (CF), Parity Flag (PF), Auxiliary Carry Flag (AF), Zero Flag (ZF),
Sign Flag (SF), Overflow Flag (OF)

5. Carry Flag (CF)
•Indicates an overflow in unsigned arithmetic
•When the result of an operation exceeds the maximum value that can fit in
the destination.
Example
MOV AL, 255
ADD AL, 1 ; CF = 1 because the result (256) is too
large for an 8-bit register.

6. Parity Flag (PF)
•Indicates whether the least significant byte of the result has an even
number of 1s.
•When the number of 1s in the result's least significant byte is even.
Example
MOV AL, 5 ; 5 = 00000101 (2 ones → PF = 1)
XOR AL, AL ; Result = 0 → PF = 1 (0 has 0 ones,
which is even).

7. Auxiliary Carry Flag (AF)
•Used internally for binary-coded decimal (BCD) operations. It reflects a
carry from the lower nibble (bit 3) to the higher nibble (bit 4).
Example
MOV AL, 15 ; 00001111
ADD AL, 1 ; AF = 1 because of carry from bit 3
to bit 4

8. Zero Flag (ZF)
•Indicates whether the result of an operation is zero.
•When the result is exactly zero.
Example
SUB AX, AX ; ZF = 1 (result = 0)

9. Sign Flag (SF)
•Indicates the sign of the result (positive or negative).
•When the most significant bit (MSB) of the result is 1 (negative).
Example
MOV AL, -5 ; SF = 1 because -5 in two’s complement
has MSB = 1

10. Overflow Flag (OF)
•Indicates overflow in signed arithmetic operations.
•When the result of a signed operation is too large or too small to fit in the
destination register.
Example
MOV AL, -5 ; SF = 1 because -5 in two’s complement
has MSB = 1

12. Effect of Instructions on Flags

13. MUL and IMUL
•Only affect the CF and OF flags.
•CF and OF are set if the result is too large to fit in the destination register.
Example
MOV AL, -5 ; SF = 1 because -5 in two’s complement
has MSB = 1

14. Boolean Instructions (AND, OR, XOR)
•Clear CF and OF.
•Modify SF, ZF, and PF.
Example
MOV AL, -5 ; SF = 1 because -5 in two’s
complement has MSB = 1

15. NOT, NEG
•NOT instruction does not affect any flag.
•NEG Affects CF, SF, ZF, OF, PF, and AF.
Special case: CF = 1 if the operand is non-zero.
Example
MOV AL, -5 ; SF = 1 because -5 in two’s
complement has MSB = 1

16. CMP Instruction:
•Performs a subtraction but does not store the result. Only updates
flags:
CF, SF, ZF, OF, PF, AF
MOV AX, 5
CMP AX, 10 ; Result: AX - 10 → Flags: CF = 1, ZF = 0, SF = 1

17. Tasks
• For each add instruction in this exercise, assume that AX contains the
given contents before the instruction is executed. Give the contents of
AX as well as the values of the CF, OF, SF, PF, AF and ZF after the
instruction is executed. All numbers are in hex

18. Tasks
• In the following instruction sequence, show the values of the Carry,
Zero, and Sign flags where indicated:
mov al, 00001111b
test al, 00000010b
mov al, 00000110b ; a. CF= ZF= SF=
cmp al, 00000101b
mov al, 00000101b ; b. CF= ZF= SF=
cmp al, 00000111b ; c. CF= ZF= SF=