The document discusses the construction and operation of a binary cell used for random access memory (RAM), highlighting its use of an r-s flip-flop to remember one bit of data. It details the inputs for selecting, reading, and writing data, emphasizing that memory operations depend on certain conditions of these inputs. Additionally, the document describes how multiple binary cells can be combined with address decoding circuitry to form RAM modules, with an example of a 4 x 4 RAM implementation.

1. Random Access Memory
Basics

2. Binary Cell
• In previous lectures, we talked about how a sequential
device as simple as an R-S flip-flop could be used to
remember one bit of data.
• We now develop a complete memory cell, called a binary
cell, based on the flip-flop.
• When such a cell is selected and in “read” mode, the
current value of its underlying flip-flop will be transferred
to the cell’s output line.
• When the cell is selected and in “write” mode, an input
data signal will determine the value remembered by the
flip-flop.
• A complete circuit is shown in Figure below.

4. Binary Cell …
• The S-R flip-flop we saw is modified to create a binary cell.
• To begin with, the cell has three inputs and a single
output.
• The inputs are labeled “Select”, “Read/write”, and “Input”.
• The output line is labeled “Output”.

5. Binary Cell …
• Select input
• The “select” input is used to access the cell, either for reading
or writing.
• When the select line is high, “1”, then a memory operation can
be performed on this cell.
• When the select line of the binary cell is low, “0”, then the
contents of the cell are not currently of interest – i.e., at the
present time the cell is not being read from or written to.
• We can see how “select” is given this power by noting that both
the inputs and the output of the underlying R-S flip-flop are
routed through AND gates and that “select” is one of the inputs
to each of these gates.
• Thus, if “select” is low, the inputs to the R-S flip-flop will stay
low (meaning that its stored value will not change) and the
output produced by the cell will be low (regardless of whether
the actual bit held in the flip-flop is “0” or “1”).

6. Binary Cell …
• Read/Write input
• The next input we’ll examine is “Read/write”.
• A system clock will drive this input.
• A low, “0”, will signify “read” while a high, “1”, will signify “write”.
• During the read phase it will not be possible to write to the cell.
• Likewise, during the write phase it will not be possible to read the
contents of the cell.
• Assume the cell has been selected (i.e., “select” is high signifying
that a memory access operation is to be performed on this cell.)
• Furthermore, assume that the clock value on the “Read/write” line is
low (forcing the “negated Read/write” to high) indicating the cell
contents are to be read.
• In this case, the value output by the cell will depend solely on the Q
value of the flip-flop.
• If Q is low, the cell outputs a “0”, if Q is high, the cell outputs a “1”.
Read/write” are currently high.

7. Binary Cell …
• Read/Write input …
• When the cell is being read its contents cannot be modified.
• The reason for this is that the same low value on the “Read/write”
line that allows the cell to be read, is fed into the and gates guarding
the inputs to the flip-flop.
• Thus during reads, the inputs to R and S are guaranteed to be low
preventing the value of the flip-flop from being modified.
• When the cell is selected and the “Read/write” line is set to high, it
enables a “write” operation, and the value placed into the cell will
totally depend on the state of the “Input” line.
• If “Input” is high, S (set) will receive a high and the flip-flop will
store a “1”.
• If, “Input” is low, then R (reset) which receives a negated version of
“Input”, will go high and the flip-flop will reset to “0”.

8. Binary Cell …
• Read/Write input …
• Remember that having a negated version of the input line run into R
is to prevent the R-S flip-flop from ever entering into its invalid
state.
• Not also that during write operations, reading is prohibited.
• This is easy to see, since the and gate guarding the “Output” line
receives one of its inputs from “negated Read/write” which is held
low during write operations.
• Hence, output from the cell will always be low, “0”, during writes,
regardless of the actual value on the Q line.

9. Binary Cell …
Figure: Block diagram encapsulating the binary cell we discussed

10. RAM Construction
Figure: Block diagram of a memory

11. RAM Construction …
Figure: Contents of a 1024 x 16 memory

12. RAM Construction …
• Memory Read/Write Operations happen as follows:
Memory Read
1. Apply the binary address of the desired word to the address lines.
2. Activate the read input.
The memory unit will then take the bits from the word that has been
selected by the address and apply them to the output data lines.
Memory Write
1. Apply the binary address of the desired word to the address lines.
2. Apply the data bits that must be stored in memory to the data input lines.
3. Activate the write input.
• The memory unit will then take the bits from the input data lines and store
them in the word specified by the address lines.

13. RAM Construction …
• An entire random access memory (RAM) can be
constructed from a large collection of binary cells, together
with some address decoding circuitry.
• For example, a memory of 256 words, each 16 bits wide –
will require 4096 such cells.
• We use a very small RAM to illustrate the construction,
with an appropriate decoding circuit.
• Figure below presents an implementation of a 4 x 4 RAM.
• Such a RAM module has four separate “words” of memory,
each four bits wide.

14. RAM Construction …
Figure: A 4 x 4 RAM