The document outlines the design of a 4-bit even up-counter using D flip-flops, focusing on a sequence that only includes even numbers. It specifies the steps to create a state diagram, generate a state transition table, derive simplified boolean expressions, and design the final circuit diagram. The main outputs include the state and transition details for proper implementation of the counter.

1. Digital Logic Design (CS302)
You are required to design a 4-bit even up-counter using D flip flop by converting combinational
circuit to sequential circuit. The counter will only consider even inputs and the sequence of inputs
will be 0-2-4-6-8-10-0.
4-bit even up-counter using D flip flop

2. 1. Draw the State diagram.
0101
0100
0010
0001
0000
1010
100
1
1000
0111
1101
1011
0011
0110
11111110

3. 2. Generate State & Transition Table.
Q3 Q2 Q1 Q0 Q3 Q2 Q1 Q0 D3 D2 D1 D0
0 0 0 0 0 0 0 1 0 0 0 1
0 0 0 1 0 0 1 0 0 0 1 0
0 0 1 0 0 0 1 1 0 0 1 1
0 0 1 1 0 1 0 0 0 1 0 0
0 1 0 0 0 1 0 1 0 1 0 1
0 1 0 1 0 1 1 0 0 1 1 0
0 1 1 0 0 1 1 1 0 1 1 1
0 1 1 1 1 0 0 0 1 0 0 0
1 0 0 0 1 0 0 1 1 0 0 1
1 0 0 1 1 0 1 0 1 0 1 0
1 0 1 0 1 0 1 1 1 0 1 1
1 0 1 1 1 1 0 0 1 1 0 0
1 1 0 0 1 1 0 1 1 1 0 1
1 1 0 1 1 1 1 0 1 1 1 0
1 1 1 0 1 1 1 1 1 1 1 1
1 1 1 1 0 0 0 0 0 0 0 0
3. Generate simplified Boolean Expression.
D3
Q1 Q0
Q3Q2
00 01 11 10
00 0 0 0 0
Present State Next State D Flip-Flop

4. 01 0 0 1 0
11 1 1 0 1
10 1 1 1 1
3 3 2' 3 0' 3' 2 1 0D Q Q Q Q Q Q Q Q  
D2
Q1 Q0
Q3 Q2
00 01 11 10
00 0 0 1 0
01 1 1 0 1
11 1 1 0 1
10 0 0 1 0
2 2 0' 2' 1 0D Q Q Q Q Q 
D1
Q1 Q0
Q3 Q2
00 01 11 10
00 0 1 0 1
01 0 1 0 1
11 0 1 0 1
10 0 1 0 1
1 1' 0 1 0' 1 0D Q Q Q Q Q Q   
D0
Q1 Q0
Q3 Q2
00 01 11 10
00 1 0 0 1

5. 01 1 0 0 1
11 1 0 0 1
10 1 0 0 1
0 0'D Q
Boolean Expression:
3 3 2 ' 3 0 ' 3' 2 1 0
2 2 0 ' 2 ' 1 0
1 1' 0 1 0 ' 1 0
0 0 '
D Q Q Q Q Q Q Q Q
D Q Q Q Q Q
D Q Q Q Q Q Q
D Q
  
 
   

4. Design the final Circuit diagram.