The document discusses the flags in a microprocessor that indicate the status of arithmetic and logic operations. It explains that the carry flag, parity flag, auxiliary flag, zero flag, sign flag, and overflow flag can change after arithmetic and logic instructions but not data transfer or program control operations. It then provides details on what each flag indicates, such as the carry flag showing carries/borrows, the zero flag indicating a result of zero, and the overflow flag exposing when a signed number operation exceeds capacity.

2.  The rightmost five flags and the overflow
flag change after many arithmetic and
logic instructions execute.
 flags never change for any data transfer
or program control operation
 Some of the flags are also used to
control features found in the
microprocessor.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
- NT IOPL OF DF IF TF SF ZF - AF - PF - CF

3. Carry Flag (Bit 0)
 holds the carry after addition or the
borrow after subtraction.
 indicates error conditions, as dictated by
some programs and procedures.

4. Parity Flag (Bit 2)
 PF = 1 even number of 1’s
 PF = 0 odd number of 1’s

5. Auxiliary Flag (Bit 4)
 holds the carry (half-carry) after addition or
the borrow after subtraction between bits
positions 3 and 4 of the result
Addition:
Bit 3 – Bit4
AF = 1 > Carry
AF = 0 > No Carry
Subtraction:
Bit 4 – Bit 3
AF = 1 > Borrow
AF = 0 > No Borrow

6. Zero Flag (Bit 6)
 shows that the result of an arithmetic or
logic operation is zero
 memory or register is equal to zero, Z=1
 Z = 0, the result is not zero or greater
than zero

7. Sign Flag (Bit 7)
 2’s complement
 Sign bit = 1, negative # in 2’s
complement

8. Trap Flag
 enables trapping through an on-chip-
debugging feature
 T =1, microprocessor interrupts the flow
of the program on conditions as
indicated by the debug registers and
control registers.
 T=0, the trapping (debugging) feature is
disabled.

9. Interrupt Flag
 controls the operation of the INTR
(interrupt request) input pin
 IF=1, INTR is enabled
 IF=0, INTR pin is disabled
 state of the flag bit is controlled by the
STI (set I flag) and CLI (clear I flag)
instructions.

10. Direction Flag
 selects either the increment or
decrement mode for the DI and/or SI
registers during string instructions
 D=1, registers decrement (Backward
Branching)
 D=0, registers increment (Forward
Branching)
 set with the STD (set direction)
 cleared with the CLD (clear direction)
instructions

11. Overflow Flag
 occurs when signed numbers are added
or subtracted
 indicates that the result has exceeded
the capacity of the machine.
 For signed numbers
OF = 1, exceed the limit
OF = 0, did not exceed the limit

12. INPUT/OUTPUT PRIVILEGE LEVEL
 Priority of current task

13. NESTED TASK
 indicates if current task is nested