This document discusses the control sequences and hardwire approach for the 8085 microprocessor. It provides the control sequences for ADD B, ADC B, SUB B, and SBB B instructions. Each control sequence lists the steps involved including fetching the instruction and operands and performing the arithmetic operation. It also discusses the hardwired control unit organization that uses a control step counter, step decoder, and combinational logic circuit to generate control signals in the proper sequence to execute instructions. The control signals are represented logically based on the instruction and timing.

1. Birla Vishwakarma
Mahavidhyalaya
• Subject : Control Sequences and
Hardwire Approach
• Batch : B3 Group : G2
• Made by : 15CP032:-Siddhapura Romil
15CP033:-Kavaiya Hiren
15CP018:-Ahalpara Keval
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2. INTERNALBUS
MAR
Z
Interrupt
control
MDR
Serial I/O
Flag
MUX
Y
A
Instruction
decoder
IR
B (8) C(8)
D(8) E(8)
H(8) L(8)
PC(16)
SP(16)
ALU
Control
signal
MEM
ORY
Select 1
SINGLE BUS
ARCHITECTURE
OF 8085 MICRO-
PROCESSOR

3. Add Register to Accumulator
Opcode : ADD Reg.
Machine Cycle : 1
T – states : 4
Cycles : Fetch
Instruction : ADD B
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4. Control Sequence of ADD B
Instruction
 1. PC out, MAR in, READ, WMFC, PC++
 2. MDR out, IR in
 3. B out, Y in, Select Y, ADD ,Z in
 4. Z out ,A in, End.
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5. Control Sequence of ADC B
Instruction
 1. PC out, MAR in, READ, WMFC, PC++
 2. MDR out, IR in
 3. B out, Y in, Select Y, CY out, ADD ,Z in
 4. Z out ,A in, End.
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6. Subtract Register from
Accumulator
Opcode : SUB Reg.
Machine Cycle : 1
T – states : 4
Cycles : Fetch
Instruction : SUB B
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7. Control Sequence of SUB B
Instruction
 1. PC out, MAR in, READ, WMFC, PC++
 2. MDR out, IR in
 3. B out, Y in, Select Y, SUB ,Z in
 4. Z out ,A in, End.
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8. Control Sequence of SBB B
Instruction
 1. PC out, MAR in, READ, WMFC, PC++
 2. MDR out, IR in
 3. B out, Y in, Select Y, CY out, SUB ,Z in
 4. Z out ,A in, End.
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9. Hardwire Approach
• To execute instructions, the processor must have
some means of generating the control signal in
proper sequence.
• The approach fall into one of two categories:
1. Hardwire Control
2. Microprogrammed Control
• Let us discuss a hardwired control unit organization
as shown in this figure,
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10. CLK
Control step
counter
Step decoder
Combinational
Logic
Circuit
Instruction
decoder
IR
External
inputs
Condition
codes
CLK
INS1
INS2
T1 T2
Run
Reset
End
Control signal

11. Logical Representation of Z in
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T3 ADD T3 SUB
. . . . . . . .
Z in
Z in = T3.ADD + T3.SUB + ……….

12. Logical representation of IR in
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. . . .
IRIN
OTHER INST.
T2 ADD
IR in = T2.ADD + …….

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