1. J. Hilsenbeck et al.: AlGaN/GaN HFETs with New Ohmic and Schottky Contacts 183
phys. stat. sol. (a) 176, 183 (1999)
Subject classification: 73.30.+y; 73.40.Cg; S7.14; S7.15
AlGaN/GaN HFETs with New Ohmic
and Schottky Contacts for Thermal Stability up to 400 C
J. Hilsenbeck 1) (a), W. Rieger (b), E. Nebauer (a), W. John (a), G. Trankle (a),
È
J. Wurfl (a), A. Ramakrishan (c), and H. Obloh (c)
È
(a) Ferdinand Braun Institut fur Hochstfrequenztechnik, Albert-Einstein-Str. 11
È È
D-12489 Berlin, Germany
(b) Now at Infineon Technologies, Microelectronic Design Center Villach, Siemensstraûe 2,
A-9500 Villach, Austria
(c) Fraunhofer Institut Angewandte Festkorperphysik, Tullastraûe 72,
È
D-79108 Freiburg, Germany
(Received July 4, 1999)
Results on the thermal stability of AlxGa1± N/GaN Heterostructure Field-Effect Transistors
±x
(HFETs) are presented. The epilayer structures were grown by MOVPE on sapphire with Al mole
fractions in the AlGaN barrier layers of 20 and 25%, respectively. Different metallizations for
ohmic and Schottky contacts were employed and their influence on the thermal stability of
HFETs was investigated. Transistors with standard Ti/Al based ohmic and Pt based Schottky con-
tacts showed rapid degradation after aging at 400 C. Using a WSiN diffusion barrier on top of the
Ti/Al/Ti/Au ohmic contact the morphology could be strongly improved with smooth contact sur-
faces and well defined contact edges. The ohmic contact resistance of this system is thermally
stable and exhibits a value of 0.77 Wmm after aging at 400 C. Transistors with WSiN/Au Schottky
gate contacts already showed improved aging behaviour while HFETs with Ir/Au Schottky contacts
and 25% Al mole fraction in the barrier layer demonstrated long term stability at 400 C with the
highest Schottky barrier height and lowest gate leakage current.
1. Introduction
Recent progress in III-nitride epitaxy opened the way for high quality GaN based
electronic devices like Junction Field-Effect Transistors (JFETs) [1], High Electron
Mobility Transistors (HEMTs) [2, 3], unintentionally doped Polarization Induced
HEMTs (PIHEMTs) [4] and Heterojunction Bipolar Transistors (HBTs) [5]. The op-
eration of AlGaN/GaN HFETs at elevated temperatures has been successfully demon-
strated (see e.g. Ref. [6]). In order to make these devices available for long term
operation at both elevated temperatures and ± due to self-heating of the device [7] ±
± ±
high power, thermally stable ohmic and Schottky contacts are essential. Commonly
used Ti/Al/Ti/Au ohmic contacts suffer from both thermal degradation and rough con-
tact morphology [8]. To achieve further reduction of source resistance the gate has to
be located closer to the source contact. Therefore, ohmic contacts with smooth mor-
phology and well defined contact edges are required. To overcome these problems
sputtered WSiN as a barrier layer on top of the active Ti/Al/Ti/Au ohmic contact is
1
) Corresponding author; phone: +49-30-6392-2630; Fax: +49-30-6392-2685;
e-mail: hilsenbk@fbh-berlin.de

2. 184 J. Hilsenbeck et al.
an attractive candidate to improve both contact morphology and thermal stability.
Since transistors with Pt based gates show strong degradation at elevated tempera-
tures [8] the development of an alternative gate contact metallization system being
stable on high Al mole fraction AlGaN Schottky layers is of great interest. The mate-
rial properties of WSiN or Ir have shown to be very promising to replace Pt as the
contact material forming the metal±semiconductor junction.
2. Experimental
The AlGaN/GaN epilayers for the HFETs were grown by MOVPE on 2 inch sapphire
substrates. On a GaN nucleation layer a 2.7 mm thick unintentionally doped GaN buffer
layer and a 50 nm Si doped GaN channel layer (4 Â 1017 cm ± 3) were grown. These
±
layers were followed by a 3 nm AlxGa1± N spacer, a 15 nm Si doped AlxGa1± N sup-
±x ±x
ply layer (7 Â 1018 cm ± ), a 10 nm AlxGa1± N barrier layer (samples A and B: x = 0.2,
±3
±x
samples C and D: x = 0.25) and a 1 nm thick GaN cap layer to prevent the top AlGaN
layer from oxidation.
Device fabrication started with ohmic metallization, followed by device isolation, gate
metallization and device passivation combined with pad metallization. Different sets of
transistors containing conventional metallizations (A) and modified high temperature
stable metallizations (B to D) have been realized. The conventional ohmic metallization
was made with 20 nm Ti / 100 nm Al / 45 nm Ti / 55 nm Au. The ohmic contacts of the
samples B to D consist of a 10 nm Ti / 50 nm Al / 25 nm Ti / 30 nm Au metallization
followed by a sputtered WSiN diffusion barrier layer (120 nm). The latter separates the
internal metal system from the overlayer metal, which is defined later in the process by
the gate contact material. The formation of the ohmic contacts was made by rapid
thermal annealing (RTA) at 850 C for 60 s.
For device isolation a combined reactive ion etching (Ar/Cl2/BCl3) and ± to suppress
±
surface leakage currents ± He implantation was emloyed. The gate fabrication has
±
been done with optical contact lithography leading to a gate length of 1 mm. The gates
are centered between source and drain (source±drain separation dSD = 4 mm) and the
transistor widths are 40, 80 and 120 mm. For the Schottky contact to sample A 20 nm
Pt / 50 nm Ti / 250 nm Au was employed and for samples B and C 50 nm WSiN / 250 nm
Au. The gate metallization of sample D consists of 50 nm Ir / 250 nm Au. Like WSiN
the Ir was realized by dc sputtering with a deposition rate of 25 nm/min. Finally, the
samples were passivated with SiNx. The aging experiments have been carried out at
400 C under N2 atmosphere.
3. Results
The microscope image in Fig. 1, upper part, shows typical WSiN based ohmic source
and drain contacts of samples B to D. Due to the properties of the WSiN sputter de-
position process [9] the inner metal layers are entirely covered by WSiN which sup-
presses the roughening of the underlying contact metallization during rapid thermal
annealing. It has to be taken into account that the WSiN barrier layer needs to be
thicker than the underlying contact metallization. Otherwise the WSiN barrier may
burst during RTA and the underlying metals diffuse into the region between source
and drain (Fig. 1, lower part) which leads to a drastic decrease of device yield and to
an increased ohmic contact resistance. The as prepared average values for the ohmic

3. AlGaN/GaN HFETs with New Ohmic and Schottky Contacts 185
Fig. 1. Microscope image of ohmic source and
drain contacts with WSiN barrier layer upper
part: thicker and lower part: thinner than the
underlying contact metallization
contact resistance Rc for sample A are
0.75 Wmm and for samples B to D
0.62 Wmm. After 24 h annealing at 400 C
Rc increased to 0.95 and 0.77 Wmm, re-
spectively. The modified ohmic contacts
show unchanged morphology with very
well defined contact contours.
The barrier height of the Schottky
diodes was determined from I±V measure-
ments. The initial values of barrier height
FB and open channel current IDS,max of
the test transistors are given in Figs. 2 and
3, respectively. During aging at 400 C the
Pt-based gates of sample A show strong
degradation resulting in a dramatic reduc-
tion of the Schottky barrier height to
0.45 eV within the first hours of annealing
(Fig. 2). This is associated with a decrease
of gm,max by 20% from 155 to 122 mS/mm
and IDS, max by 10% (Fig. 3). Similar results show aging experiments of MOCVD grown
GaN MESFETs and MBE grown AlGaN/GaN HFETs [8]. After further long term
annealing the barrier height stabilizes at this very low level while gm,max and IDS,max
decrease continuously down to 100 mS/mm and 242 mA/mm, respectively, although no
further increase of the transistor source resistance was observed.
Fig. 2. Schottky barrier height
vs. aging time

4. 186 J. Hilsenbeck et al.
Fig. 3. Maximum drain-source
current vs. aging time. The initi-
al IDS,max of transistor A and
its strong increase after the first
aging step differs principally
from other experimental re-
sults. Therefore, it has not been
taken into account for the in-
terpretation of the aging ex-
periments
HFETs with WSiN/Au gates (sample B) show only a slight decrease of IDS,max (see
Fig. 3) even after 120 h annealing at 400 C. In addition, the maximum transconduc-
tance was determined to be 150 mS/mm after aging for 120 h which is only 8% less
than the starting value. By increasing the Al content in the AlGaN layers to 25% the
HFETs demonstrate thermally stable electrical performance (sample C). For both
HFETs the Schottky barrier height remained stable at around 0.65 V.
The highest Schottky barrier height was measured for the Ir/Au Schottky metalliza-
tion and 25% Al content (sample D). After the first aging steps the barrier height
increased from 0.9 to 1.1 eV and stabilizes at this high level even for long term anneal-
ing (120 h) at 400 C (Fig. 2). The gate leakage current of transistor D is almost two
orders of magnitude lower than of transistors with WSiN/Au gate metallization and
25% Al. From X-ray diffraction (XRD) investigations no change in the Ir/Au contact
metal was observed before and after aging. IDS,max and gm,max of sample D initially
Fig. 4. Transfer characteristics of an AlGaN/GaN HFET with Ti/Al/Ti/Au/WSiN ohmic and Ir/Au
gate contacts after aging for 8 and 120 h

5. AlGaN/GaN HFETs with New Ohmic and Schottky Contacts 187
decreased by 7% and remained stable up to the end of the aging experiment with very
low leakage currents in the sub-threshold region (Figs. 3 and 4).
4. Conclusions
We have developed a new ohmic metallization system resulting in thermally stable con-
tacts with improved surface morphology and well defined contours. Furthermore, we
observed that transistors with WSiN/Au or Ir/Au show improved aging behaviour at
400 C compared to conventional AlGaN/GaN HFETs with Pt based gate contacts.
HFET with 25% Al content in the Schottky barrier layer are thermally stable up to
120 h aging. The highest value for FB in combination with the lowest gate leakage
currents could be achieved with Ir/Au as gate metallization. These results open the way
towards high reliability GaN electronic devices that can be continuously operated up to
400 C.
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