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Symbolic Instructions
for 8086 micro processor
Created By
Ketan Makwana (16)
Saurabh Mehta (17)
Symbolic Instruction Set
• Looping
• Processor Control
• Stack Operations
• String Operations
• Transfer ( Conditional )
• Transfer ( Un-Conditional )
• Type Conversion
• Arithmetic
• ASCII – BCD Conversion
• Bit Shifting
• Comparison
• Data Transfer
• Flag Operations
• Input / Output
• Logical Operations
Arithmetic
• MUL : Unsigned Multiply
• IMUL : Signed (int) Multiply
• SBB : Subtract with Borrow
• SUB : Subtract Binary Values
• XADD : Exchange and Add
• NEG : Negate
• ADC : Add with carry
• ADD : Add Binary Numbers
• DEC : Decrement By 1
• INC : Increment By 1
• DIV : Unsigned Divide
• IDIV : Singed (int) Divide
How ADC work?
• When ADD is used after it’s execution CF is changed according
to the operands value & ADC uses CF value to perform addition.
How SBB work?
• When SBB is used after it’s execution CF is changed according to
the operands value & SUB uses CF value to perform subtraction.
Continue …
• This program
illustrate the use of
ADD and SUB
instructions.
ASCII – BCD Conversion
• AAA : ASCII Adjust After Addition
• AAS : ASCII Adjust After Subtraction
• AAD : ASCII Adjust After Division
• AAM : ASCII Adjust After Multiplication
• DAA : Decimal Adjust After Addition
• DAS : Decimal Adjust After Subtraction
• The four ASCII conversion instructions : AAA , AAS , AAD ,
AAM only works with AX register as source and as the
destination.
• The two BCD conversion instructions : DAA , DAS are followed
BCD Addition and BCD Subtraction respectively & only works
on AL register.
Continue ….
Bit Shifting
• RCL : Rotate Left Through Carry
• RCR : Rotate Right Through Carry
• ROL : Rotate Left
• ROR : Rotate Right
• SHL : Shift Logical Left
• SAL : Shift Algebraic Left
• SHR : Shift Logical Right
• SAR : Shift Algebraic Right
• SHILD : Shift Left Double (80386+)
• SHRD : Shift Right Double (80386+)
Continue ….
• Rotate Left
Through Carry
• Rotate Left
• Rotate Right
Through Carry
• Rotate Right
Continue ….
• Shift Logical Left
• Shift Algebraic Left
• Shift Logical Right
• Shift Algebraic Right
Data Transfer
• LDS : Load Data Segment Register
• LEA : Load Effective Address
• LES : Load Extra Segment Register
• LSS : Load Stack Segment Register
• MOVSX : Move With Sign - Extend
• MOVZX : Move With Zero - Extend
• LODS : Load String
• MOV : Move Data
• MOVS : Move String
• STOS : Store String
• XCHG : Exchange
• XLAT : Translate
Continue …
• This program
illustrate the use of
MOV and LEA
instructions.
Flag Operations
• CLC : Clear Carry Flag
• CLD : Clear Direction Flag
• CLI : Clear Interrupt Flag
• CMC : Complement Carry Flag
• LAHF : Load AH from Flags
• POPF : Pop Flags off Stack
• PUSHF : Push Flags onto Stack
• SAHF : Store AH in Flags
• STC : Set Carry Flag
• STD : Set Direction Flag
• STI : Set Interrupt Flag
How STC, STD, STI work?
0 0 0 0 0 0 0 0
CF ZF SF OF PF AF IF DF
1 0 0 0 0 0 1 1
1 0 0 0 0 0 1 0
1 0 0 0 0 0 1 1
How CLC, CLD, CLI Work?
1 0 0 0 0 0 1 1
CF ZF SF OF PF AF IF DF
0 0 0 0 0 0 1 0
0 0 0 0 0 0 1 1
0 0 0 0 0 0 0 0
Input / Output
• IN : Input Byte or Word
• INSn : Input String (80286+)
• Out : Output Byte or Word
• OUTSn : Output String (80286+)
Logical Operations
• AND : Logical AND
• OR : Logical OR
• XOR : Exclusive OR
• NOT : Logical NOT
Continue …
• Four Logical
instructions : AND,
OR, XOR, NOT is used
to manipulate binary
numbers in register.
Comparison
• BSF / BSR : Bit Scan (80386+)
• BT / BTC / BTR / BTS : Bit Test (80386+)
• CMP : Compare
• CMPSn : Compare String
• CMPXCHG : Compare and Exchange (80486+)
• CMPXCHG8B : Compare and Exchange (Pentium+)
• TEST : Test Bits
Looping
• LOOP : Loop Until Complete
• LOOPE : Loop While Equal
• LOOPNE : Loop While Not Equal
• LOOPNEW : Loop While Not Equal (80386+)
• LOOPZ : Loop While Zero
• LOOPNZ : Loop While Not Zero
• LOOPNZW : Loop While Not Zero (80386+)
How LOOPE work?
• Loope (loop while equal) will
branch to the target address
if cx is not zero and the zero
flag is set. This instruction is
quite useful after CMP or
CMPS instruction.
• The loope instruction does
not affect any flags.
Continue …
• The number of times looping
is required is placed in the CX
register.
• With each iteration, the
contents of CX are
decremented.
• ZF is checked whether to
loop again or not.
Processor Control
• HLT : Enter Halt State
• NOP : No Operation
• LOCK : Lock Bus
• WAIT : Put Processor in Wait State
Stack Operations
• ENTER : Make Stack Frame (80286+)
• LEAVE : Terminate Stack Frame (80286+)
• POP : Pop Word off Stack
• POPF : Pop Flags off Stack
• POPA : Pop All General Registers (80286+)
• PUSH : Push Word onto Stack
• PUSHF : Push Flags off Stack (80286+)
• PUSHA : Push All General Registers (80286+)
How PUSHA , POPA work?
• These two instructions only
work with 16-bit registers.
• PUSHA push all register’s
values to top of the data stack.
• POPA set back the previous
values of data registers from top
of the data stack.
Open Program
String Operations
• REPE : Repeat While Equal
• REPNE : Repeat While Not Equal
• REPZ : Repeat While Zero
• REPNZ : Repeat While Not Zero
• STOS : Store String
• CMPS : Compare String
• LODS : Load String
• MOVS : Move String
• REP : Repeat String
• SCAS : Scan String
How MOVS work?
• This instruction is always translated by the assembler into
either MOVSB, Move String Byte; or MOVSW, Move String
Word, depending upon whether source-string refers to a string
of bytes or words.
• In either case, you must explicitly load the SI and DI registers
with the offset of the source and destination strings.
How CMPS work?
• This instruction compares two values by subtracting the byte
pointed to by DI, from the byte pointed to by DS:SI, and sets
the flags according to the results of the comparison.
• The operands themselves are not altered.
• After the comparison, SI and DI are incremented (if the
direction flag is cleared) or decremented (if the direction flag is
set), in preparation for comparing the next element of the
string.
Continue …
Symbolic instructions for 8086 micro processor

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Symbolic instructions for 8086 micro processor

  • 1. Symbolic Instructions for 8086 micro processor Created By Ketan Makwana (16) Saurabh Mehta (17)
  • 2. Symbolic Instruction Set • Looping • Processor Control • Stack Operations • String Operations • Transfer ( Conditional ) • Transfer ( Un-Conditional ) • Type Conversion • Arithmetic • ASCII – BCD Conversion • Bit Shifting • Comparison • Data Transfer • Flag Operations • Input / Output • Logical Operations
  • 3. Arithmetic • MUL : Unsigned Multiply • IMUL : Signed (int) Multiply • SBB : Subtract with Borrow • SUB : Subtract Binary Values • XADD : Exchange and Add • NEG : Negate • ADC : Add with carry • ADD : Add Binary Numbers • DEC : Decrement By 1 • INC : Increment By 1 • DIV : Unsigned Divide • IDIV : Singed (int) Divide
  • 4. How ADC work? • When ADD is used after it’s execution CF is changed according to the operands value & ADC uses CF value to perform addition.
  • 5. How SBB work? • When SBB is used after it’s execution CF is changed according to the operands value & SUB uses CF value to perform subtraction.
  • 6. Continue … • This program illustrate the use of ADD and SUB instructions.
  • 7. ASCII – BCD Conversion • AAA : ASCII Adjust After Addition • AAS : ASCII Adjust After Subtraction • AAD : ASCII Adjust After Division • AAM : ASCII Adjust After Multiplication • DAA : Decimal Adjust After Addition • DAS : Decimal Adjust After Subtraction
  • 8. • The four ASCII conversion instructions : AAA , AAS , AAD , AAM only works with AX register as source and as the destination. • The two BCD conversion instructions : DAA , DAS are followed BCD Addition and BCD Subtraction respectively & only works on AL register. Continue ….
  • 9. Bit Shifting • RCL : Rotate Left Through Carry • RCR : Rotate Right Through Carry • ROL : Rotate Left • ROR : Rotate Right • SHL : Shift Logical Left • SAL : Shift Algebraic Left • SHR : Shift Logical Right • SAR : Shift Algebraic Right • SHILD : Shift Left Double (80386+) • SHRD : Shift Right Double (80386+)
  • 10. Continue …. • Rotate Left Through Carry • Rotate Left • Rotate Right Through Carry • Rotate Right
  • 11. Continue …. • Shift Logical Left • Shift Algebraic Left • Shift Logical Right • Shift Algebraic Right
  • 12. Data Transfer • LDS : Load Data Segment Register • LEA : Load Effective Address • LES : Load Extra Segment Register • LSS : Load Stack Segment Register • MOVSX : Move With Sign - Extend • MOVZX : Move With Zero - Extend • LODS : Load String • MOV : Move Data • MOVS : Move String • STOS : Store String • XCHG : Exchange • XLAT : Translate
  • 13. Continue … • This program illustrate the use of MOV and LEA instructions.
  • 14. Flag Operations • CLC : Clear Carry Flag • CLD : Clear Direction Flag • CLI : Clear Interrupt Flag • CMC : Complement Carry Flag • LAHF : Load AH from Flags • POPF : Pop Flags off Stack • PUSHF : Push Flags onto Stack • SAHF : Store AH in Flags • STC : Set Carry Flag • STD : Set Direction Flag • STI : Set Interrupt Flag
  • 15. How STC, STD, STI work? 0 0 0 0 0 0 0 0 CF ZF SF OF PF AF IF DF 1 0 0 0 0 0 1 1 1 0 0 0 0 0 1 0 1 0 0 0 0 0 1 1
  • 16. How CLC, CLD, CLI Work? 1 0 0 0 0 0 1 1 CF ZF SF OF PF AF IF DF 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0
  • 17. Input / Output • IN : Input Byte or Word • INSn : Input String (80286+) • Out : Output Byte or Word • OUTSn : Output String (80286+)
  • 18. Logical Operations • AND : Logical AND • OR : Logical OR • XOR : Exclusive OR • NOT : Logical NOT
  • 19. Continue … • Four Logical instructions : AND, OR, XOR, NOT is used to manipulate binary numbers in register.
  • 20. Comparison • BSF / BSR : Bit Scan (80386+) • BT / BTC / BTR / BTS : Bit Test (80386+) • CMP : Compare • CMPSn : Compare String • CMPXCHG : Compare and Exchange (80486+) • CMPXCHG8B : Compare and Exchange (Pentium+) • TEST : Test Bits
  • 21. Looping • LOOP : Loop Until Complete • LOOPE : Loop While Equal • LOOPNE : Loop While Not Equal • LOOPNEW : Loop While Not Equal (80386+) • LOOPZ : Loop While Zero • LOOPNZ : Loop While Not Zero • LOOPNZW : Loop While Not Zero (80386+)
  • 22. How LOOPE work? • Loope (loop while equal) will branch to the target address if cx is not zero and the zero flag is set. This instruction is quite useful after CMP or CMPS instruction. • The loope instruction does not affect any flags.
  • 23. Continue … • The number of times looping is required is placed in the CX register. • With each iteration, the contents of CX are decremented. • ZF is checked whether to loop again or not.
  • 24. Processor Control • HLT : Enter Halt State • NOP : No Operation • LOCK : Lock Bus • WAIT : Put Processor in Wait State
  • 25. Stack Operations • ENTER : Make Stack Frame (80286+) • LEAVE : Terminate Stack Frame (80286+) • POP : Pop Word off Stack • POPF : Pop Flags off Stack • POPA : Pop All General Registers (80286+) • PUSH : Push Word onto Stack • PUSHF : Push Flags off Stack (80286+) • PUSHA : Push All General Registers (80286+)
  • 26. How PUSHA , POPA work? • These two instructions only work with 16-bit registers. • PUSHA push all register’s values to top of the data stack. • POPA set back the previous values of data registers from top of the data stack. Open Program
  • 27. String Operations • REPE : Repeat While Equal • REPNE : Repeat While Not Equal • REPZ : Repeat While Zero • REPNZ : Repeat While Not Zero • STOS : Store String • CMPS : Compare String • LODS : Load String • MOVS : Move String • REP : Repeat String • SCAS : Scan String
  • 28. How MOVS work? • This instruction is always translated by the assembler into either MOVSB, Move String Byte; or MOVSW, Move String Word, depending upon whether source-string refers to a string of bytes or words. • In either case, you must explicitly load the SI and DI registers with the offset of the source and destination strings.
  • 29. How CMPS work? • This instruction compares two values by subtracting the byte pointed to by DI, from the byte pointed to by DS:SI, and sets the flags according to the results of the comparison. • The operands themselves are not altered. • After the comparison, SI and DI are incremented (if the direction flag is cleared) or decremented (if the direction flag is set), in preparation for comparing the next element of the string.