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ECET 105 Week 1 Homework
For more course tutorials visit
www.newtonhelp.com
1. Does a typical computer have any analog outputs? If so, what are
they?
2. List three advantages of digital signal representation as compared
to their analog representation.
3. Convert 126 x 10+2 to scientific and engineering notations.
4. Make the following conversions:
a. Convert 0.34 seconds to milliseconds.
b. Express 0.0005 x 10-4 farads as picofarads.
5. The frequency of a signal is equal to the reciprocal of the signal’s
period (f = 1/p). For a computer with a 2.4 GHz clock, what is the
clock period? Use engineering notation for your answer.
6. The signal shown below is a sine wave as it might be displayed on
an oscilloscope. If it takes 40 msec. for the waveform to travel
between the points shown by the arrow “B” below, what is the
frequency of the waveform?
7. Power (in watts) is a certain amount of energy (in joules) divided
by a certain length of time (in seconds). The laser with the highest
peak power produces energy of 186 joules in 167 femtoseconds. What
is the peak power? Use engineering notation for your answer. (Note:
Use references to determine the value of a femtosecond and the
proper notation for your answer.)
8. Which logic function produces a HIGH output only when all of the
inputs are HIGH?
9. Which logic function produces a HIGH output only when all of the
inputs are LOW?
10. Using the Internet, find the data sheet for the 74LS00 integrated
circuit chip. Answer the following:
===============================================
ECET 105 Week 1 iLab Introduction to Laboratory Test
Equipment
For more course tutorials visit
www.newtonhelp.com
I. OBJECTIVES
1. To learn the function and basic operation of the instruments
comprising a test bench
2. To gain a basic understanding of how to use the power supply,
DMM, oscilloscope, and function generator
3. To take measurements using the power supply, DMM,
oscilloscope, and function generator
4. To determine waveform characteristics of various signals
II. PARTS LIST
Equipment
IBM PC or Compatible with Windows 2000 or Higher
ELVIS II+
Parts
1 - 1.0 kohm Resistor (color bands = brown, black, red, gold)
1 - 4.7 kohm Resistor (color bands = yellow, violet, red, gold)
III. PROCEDURES
A. Introduction to Instruments and Measurements
Before beginning this lab, be sure that you have read the Lab Prepfor
an explanation of how to use the various instruments.
1. Measure DC voltage with the DMM.
a. Attach the power supply +5 V outputs to the DMM inputs.
b. Launch the ELVIS II+ DMM and select DC Voltage.
1. Press Run and record the reading below, including units.
2. Press Stop.
DMM measurement ___________________________
2. Measure DC voltage with the oscilloscope.
1. Launch the ELVIS II+
2. Enable Channel 0.
3. Ensure the following settings.
• Probe—10x
• Coupling—DC
• Scale—2 Volts/Div
• Vertical Position—0
• Timebase—50 us/Div
• Trigger Type—Immediate
• Trigger Source—Chan 0 Source
• Horizontal Position—50
• Acquisition Mode—Run Continuously
1. Connect the oscilloscope probe from the oscilloscope to the +5
V output (main probe to +5 V and ground to GND).
2. Press Run and read the voltage on the oscilloscope. Record
your reading with the appropriate unit in engineering notation.
Vertical scale _____________ Horizontal scale______________
V = _____________
1. Press Stop.
3. Measure resistance with the DMM.
4. Remove a 1 kohm resistor (color bands are brown, black, red,
gold) from the parts kit. The first three bands indicate the value of the
resistor and the fourth band indicates the accuracy of the resistance. A
gold band indicates that the measured value should be within ±5% of
the specified value.
5. Switch the DMM to ohms (Ω) and measure the resistor value
by clipping the probes to each end of the resistor.
6. Press Start and record the measured value and the calculated
range (1 kohm ±5%) including units.
DMM measurement ____________________________
Theoretical range ______________________________
7. Repeat Step 3 with the 4.7 kohm resistor (color bands are
yellow, violet, red, and gold) including units.
DMM measurement ____________________________
===============================================
ECET 105 Week 2 Homework
For more course tutorials visit
www.newtonhelp.com
1. What is the duty cycle for a square wave signal that is HIGH for 15
nsec and LOW for 30 nsec?
2. A pulse train is shown on the oscilloscope below. Determine the
period of the pulse.
3. Determine the frequency for a pulse that occurs every 10 ms.
4. What is the base-10 value for the binary number 11012?
5. What are the respective weights of the 1s in Problem 4?
6. How many different values can be represented by 6 bits, 7 bits, 8
bits, and 10 bits?
7. What is the minimum number of bits required to represent each of
the following decimal numbers: 10, 1,000, 100,000, and 1,000,000?
7. Convert the binary value, 1011010100101101,to a hexadecimal
equivalent.
9. Convert the following decimal numbers to 8-bit binary values. For
negative numbers, use the 2’ complement formulation.
10. Express each of the following signed numbers (2s complement
format) in decimal:
===============================================
ECET 105 Week 2 iLab Soldering Techniques and the
Electronic Die Kit
For more course tutorials visit
www.newtonhelp.com
I. OBJECTIVES
1. To learn the basics of soldering.
2. To produce mechanically and electrically sound solder joints.
3. To assemble the Electronic Die Kit.
II. PARTS LIST
Equipment:
Digital Die Kit
Tools:
1 – Soldering Iron
1 – Pair Long-Nose Pliers
1 – Diagonal cutter
1 – Solder and hookup wire
1 – Wire stripper
III. PROCEDURE
1. Preparation
2. Prepare a well-ventilated and clear workspace with ample lighting.
3. Ensure that the workspace includes a mat to work on in order to
prevent the burning of the table or materials during the process.
4. Use a tray, egg crate, or vegetable/fruit tray for all (but especially
the small) parts to avoid losing them. Attach the tray with double-
sided tape to your bench or desktop.
5. Have a waste basket or desktop trash receptacle handy.
6. Ensure that the sponge that accompanies the soldering iron is
sufficiently damp. The level of dampness needed is judged by wetting
the sponge and then squeezing out the excess water until the sponge
can be held in the hand with no noticeable water dripping from it.
CAUTION:
In order to avoid injury to the eyes, goggles or other eye protection
must be worn AT ALL TIMES during the circuit assembly and
soldering process.
A soldering iron at temperature is very hot. It is a fire hazard. It is a
health hazard. Caution must be taken at all times to ensure that
contact with the skin does not occur.
6. Plug in the soldering iron and wait approximately five minutes for
the iron to heat to a proper temperature. The temperature of the iron
may be tested by lightly rubbing the tip of the iron against the moist
sponge. If a majority of water is evaporated, then the iron is ready for
use. The tip should be kept clean and tinned for soldering. The sponge
is used to wipe away excess solder and materials. Tinning means that
there is always a thin layer of solder on the tip.
7. Procure and prepare the dice kit for soldering. Inventory the parts
and materials and ensure that each part fits the circuit board correctly
by checking the parts on the board WITHOUT soldering them to the
board. Put them in the tray until ready to install.
8. Prepare the tools that you will need: soldering iron, rosin core
solder, desolder wick, safety glasses, long-nose pliers, and wire
cutters.
1. Assembling the Electronic Die Kit
2. Start with the seven 220 ohm resistors. Note that the color bands
are red-red-brown-gold.
2. With your long-nose pliers, bend the legs of all seven of the
resistors so that they form 90-degree angles.
3. Insert the 220 ohm resistors into R1, R2, R3, R4, R5, R6, and R7 of
your printed circuit board through the side where you see the labels.
Bend the lead on the side away from the component part, not next to
the resistor body, but on the other side of the pliers. Otherwise, you
may break the connection inside the resistor. Ensure that all
components, with the exception of the IC socket, are not fully inserted
in the board, but have small gaps between them and the circuit board
to avoid excessive heating.
===============================================
ECET 105 Week 3 Homework
For more course tutorials visit
www.newtonhelp.com
1. Determine the output X for the 2-input AND gate with the input
waveforms shown.
2. Determine the output X for the 2-input OR gate with the input
waveforms shown.
3. Determine the output X for the 2-input Exclusive-OR gate with the
input waveforms shown
4. Determine the output X for the 2-input NAND gate with the input
waveforms shown.
5. Is the output from the NAND gate shown in Problem 4 active-
HIGH or active-LOW? Why?
6. Download from a semiconductor manufacturer’s website (such as
ti.com) the data sheet for a DIP packaged quad NOR gate (74x02).
What pins does this chip use for the inputs to the first gate?
7. Draw a logic circuit that performs the following Boolean
expression: Y = A * B.
8. Draw a logic circuit that performs the following Boolean
expression:
9. Which gate is represented by the truth table below?
10. Use a truth table to determine the function of the gate shown
below.
===============================================
ECET 105 Week 3 iLab Introduction to Digital Logic Gates
For more course tutorials visit
www.newtonhelp.com
. OBJECTIVES
To understand basic logic functions (AND, OR, and NOT) and their
complement used in Boolean algebra and digital logic design.
To test simple logic small-scale integration (SSI) integrated circuit
(IC) devices.
II. PARTS LIST
Equipment:
IBM PC or Compatible with Windows 2000 or Higher
Parts:
1 – 74LS00 Quad 2-Input NAND Gate IC
1 – 74LS02 Quad 2-Input NOR Gate IC
1 – 74LS04 Hex INVERTER Gate IC
1 – 74LS08 Quad 2-Input AND Gate IC
1 – 74LS32 Quad 2-Input OR Gate IC
1 – 74LS86 Quad 2-Input XOR Gate IC
1 – Set of Four Single-Pole-Double-Throw (SPDT) Switches,
DIP Style
1 – 330 Ω resistor
1 – Light emitting diode (LED), red
III. PROCEDURE
OR Gate Operation
Using the Internet or the campus library, acquire a hard copy of a data
sheet for the 74LS32 quad 2-input OR gate. (HINT: Look at ti.com
for possible help.) One of the OR gates is shown below in Figure 5.1.
Figure 5.1 – 2-Input OR Gate
Fill in the Table 5.1 for ALL possible logic conditions, based on the
information found on the data sheet.
Input (Pin 1) Input (Pin 2) Output (Pin 3)
Table 5.1 - 2-Input OR Gate Theoretical Truth Table
Write the Boolean expression below for the relationship between the
device inputs (labeled as A and B) and output (labeled as Y).
OUTPUT Y = ____________________________
Construct the circuit shown in Figure 5.2 (a layout of the breadboard
is shown in Figure 5.3). Be sure that the flat side of the LED (called
the cathode) is connected to ground and that the 74LS32 is connected
to power and ground (Pins 14 and 7, respectively).
Figure 5.2 – OR Gate Test Circuit
Top View
Side View
Figure 5.3 – Breadboard Layout for Figure 5.2
Connect the circuit to verify the logic gate operation recording the
input and output voltages. Fill in Table 5.2below for ALL possible
logic conditions.
Input (Pin 1) Input (Pin 2) Output (Pin 3)
Table 5.2 - 2-Input OR Gate Measured Truth Table
Do the results match the manufacturer’s truth table?
__________ (YES or NO)
AND Gate Operation
Acquire a hard copy of a data sheet for the 74LS08 quad 2-input AND
gate.
Figure 5.4 – 2-Input AND Gate
Fill in the truth table below for ALL possible logic conditions based
on the information found on the data sheet.
Input (Pin 1) Input (Pin 2) Output (Pin 3)
Table 5.3 - 2-Input AND Gate Theoretical Truth Table
Write the Boolean expression below for the relationship between the
device inputs (labeled as A and B) and output (labeled as Y).
OUTPUT Y = ____________________________
Construct the circuit shown in Figure 5.5 by replacing the 74LS32
from Figure 5.2 with a 74LS08.
===============================================
ECET 105 Week 4 Homework
For more course tutorials visit
www.newtonhelp.com
1. Draw a logic circuit that performs the following Boolean
expression:
2. Determine the Boolean expression for the circuit shown below.
3. The Boolean expression for an AND gate is . Does the expression
also describe an AND gate? Prove your answer.
4. Write the Boolean expression for the logic circuit shown below.
5. Develop the truth table for the circuit shown in Problem 4.
6. Develop the truth table for the circuit shown below.
7. Develop the Boolean expression for the circuit shown in Problem 6.
8. Draw a logic circuit using only NAND gates to implement the
following Boolean expression: Y =AB + C.
9. Develop a logic circuit, using only NAND gates, to implement a
circuit to meet the requirements of the truth table shown below.
10. Determine the Boolean description for the circuit shown below.
===============================================
ECET 105 Week 4 iLab Logic Circuit Design, Simplification,
Simulation, and Verification
For more course tutorials visit
www.newtonhelp.com
Objectives:
To design a digital logic circuit using a truth table and sum-of-product
(SOP) formulation.
To use the MultiSim program to simplify, simulate, and test the
circuit operation.
To build and test the logic circuit to verify that the system performs as
expected.
Results:
Built a circuit board which would turn on the LED light and used
multisim and tools which would simplify to do so. Verified the truth
table to check and see if the vales are accurate.
===============================================
ECET 105 Week 5 Homework
For more course tutorials visit
www.newtonhelp.com
1. Determine the decimal value of each of the following unsigned
binary numbers:
2. Determine the decimal value of each of the following signed binary
numbers displayed in the 2’s complement form:
3. Determine the outputs (Cout, Sout) of a full-adder for each of the
following inputs:
4. The circuit below is an attempt to build a half-adder. Will the Cout
and Sout function properly? Demonstrate your rationale.
5. Determine the outputs for the circuit shown below. Assume that C0
= 0 for all cases.
6. Derive the Boolean equation for A = B, when A and B are 4-bit
numbers.
7. Complete the timing diagram below for a 2-bit adder. (10 points)
8. Answer the following:
What is the frequency of a periodic waveform with a period of 1.0
µsec?
How many bits are required to represent decimal numbers from -256
to +255?
What is the largest positive number that can be represented by 10
signed bits?
9. The full-adder shown below is tested under all input conditions as
shown. Is the circuit operating correctly? If not, what is the most
likely fault?
10. Using a 4-bit adder/subtractor, carry out the binary operations for
9 – 3 and 3 – 9. What can you conclude about the answers and the
carry out bit (C4)?
===============================================
ECET 105 Week 5 iLab Designing Adders and Subtractors
For more course tutorials visit
www.newtonhelp.com
Objectives:
The objectives are to reinforce the concepts of binary
addition/subtraction while using the Quartus II Programmable Logic
Tool as well as getting used to the program. We were also supposed
to build and test a simple adder/subtractor using the eSOC III Board.
Observations/Measurements:
Describe any problems you had with this week’s assignment.
1. In the simulation run of the four-bit adder, when we performed the
addition 5 + 3, we did not immediately have an output of 8 on SOUT.
What could be the cause of this?
2. If we changed the count period to 1000 nS for A and B, would this
correct the anomalies in Question 1? Why or why not?
3. How fast can your 4-bit adder/subtractor determine the sum or
difference of two numbers?
4. Use the simulation timing diagram to compare the worst case time
to do an operation with your adder/subtractor with the worst case
using the 74LS283. State which operation takes the longest and list
the time required for both devices.
===============================================
ECET 105 Week 6 Homework
For more course tutorials visit
www.newtonhelp.com
1. When a HIGH is on the output of the decoding circuit below, what
is the binary code appearing on the inputs?
2. Write the Boolean equations for each of the following codes if an
active-LOW decoder output is required. The first decode is shown as
an example.
3. What are the active outputs of a BCD-to-7 segment decoder with an
input of 0100?
4. A 7-segment decoder/driver drives the display below. Using the
waveforms shown, determine the sequence of digits that appear on the
display.
5. Construct a truth table for an active-LOW output BCD (1-of-10)
decoder.
6. Derive the truth table for the Y output in the diagram below.
7. Derive the Boolean equation for the Y output in Problem 6.
8. For the multiplexer shown below, determine the output for the
following input state.
D0 = 0, D1 = 1, D2 = 1, D3 = 0, S0 = 1, S1 = 0.
9. Determine the function of the circuit shown below.
10. Write the Boolean equation for the circuit shown in Problem 9.
===============================================
ECET 105 Week 6 iLab Decoders and Multiplexers
For more course tutorials visit
www.newtonhelp.com
Objectives:
To learn about the operation of a BCD-to-seven-segment decoder
To learn about the operation of a seven-segment display
To learn about the operation of multiplexers
To build and test a multiplexed display circuit using both discrete
components and the eSOC III board
Questions:
Why are the 330 Ω resistors required for the discrete logic circuit, but
not for the MultiSim simulated circuit or the eSOC III circuit?
Create a partial truth table showing the requirements for a seven-
segment decoder to output a hexadecimal digit. This requires four
input bits and six output states, A – F. For each output state, show the
segments a-g. The output states for the inputs 0 – 9 are the same as for
the 74LS47 (see focus.ti.com). Use capital letters A, C, E, F and
lower case for b and d.
Why is the seven-segment display driven with an active-LOW signal
using discrete logic and an active-HIGH with the eSOC board?
===============================================
ECET 105 Week 7 Homework
For more course tutorials visit
www.newtonhelp.com
1. Sketch the Q output for the waveforms shown. Assume that Q
starts LOW.
2. Sketch the Q output for the circuit shown below. Assume that Q
starts LOW.
3. Sketch the Q output for the circuit shown below. Assume that Q
starts LOW.
4. Sketch the Q output for the circuit shown below. Assume that Q
starts LOW.
5. Sketch the Q output for the circuit shown below. Assume that Q
starts LOW.
6. Sketch the Q output for the circuit shown below. Assume that Q
starts LOW.
7. Sketch the Q output for the circuit shown below. Assume that Q
starts LOW.
8. Sketch the Q0 and Q1 outputs for the circuit shown below. Assume
that both Q0 and Q1 start LOW.
9. What is the output frequency for Q1 in the circuit shown below?
10. What is the output frequency for Q2 in the circuit shown below?
===============================================
ECET 105 Week 7 iLab Add-Subtractor using Flip-Flops
For more course tutorials visit
www.newtonhelp.com
I. OBJECTIVES
To test the operation of a 74LS74 D flip-flop and compare the
operation with the predicted behavior
To test the operation of a 74LS112 J-K flip-flop and compare the
operation with the predicted behavior
To measure propagation delays of a 74LS112 J-K flip-flop
To build and test an enhanced adder-subtractor
II. PARTS LIST
Equipment:
IBM PC or Compatible with Windows 2000 or Higher
Quartus II Design Software—Version 9.1
Frequency Generator
Oscilloscope
Parts:
2 – 330 Ω resistors, ¼ W 2 – Red LEDs
1 – 74LS74 dual D flip-flop 1 – Green LED
1 – 74LS112 dual J-K flip-flop 1 – SPDT Switch,
DIP configuration
1 – eSOC III FPGA Board
III. PROCEDURE
A. Test the 74LS74 D Flip-Flop
Build the D flip-flop circuit shown in Figure 7.1. The LEDs are wired
as active-LOW since the flip-flop can supply more current in a low
state than in a high state. This means that the green LED is on when is
HIGH and the red LED indicates Q is HIGH. Remember to attach
VCC to pin 14 and ground to pin 7.
Using the circuit, verify that the operation follows the truth table for
this device.
What happens when both and are set low?
Build the J-K flip-flop circuit shown in Figure 7.2. Remember to
attach VCC to pin 16 and ground to pin 8.
Using the circuit, verify that the operation follows the truth table for
this device.
Increase the pulse generator output to 1.0 MHz. Set the switches so
that all of the flip-flop inputs are high and remove the LEDs and
resistors. Using the oscilloscope, measure the propagation times for
the Q output from the active clock edge. Record the value below.
Using Quartus II, modify the circuit from Lab 5 as shown in Figure
7.3 by adding three 7474 D-flip-flip chips. Note that a clear function
has been added and that the flip-flop presets are inactive since they
are tied to +5V (labeled VCC).
Perform a simulation to verify the correct operation of the circuit.
Note that in this case, the CLOCK signal is not a periodic signal; the
CLOCK signal is a discrete signal occurring on a switch closure.
Assign pins to the inputs and outputs. Use the DIP switches for your
inputs (0-3 for A, 8-11 for B, 7 for CLEAR, 15 for ADDSUB), one of
the debounced pushbuttons for CLOCK and the red LEDs for outputs
(RD0-4).
Download you program to the eSOC III board and test the operation
of the circuit.
Photograph your final circuit for submission (online) or demonstrate
your circuit to your professor (onsite or blended).
Why is the condition when both and are LOW considered illegal?

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ECET 105 Invent Yourself/newtonhelp.com

  • 1. ECET 105 Week 1 Homework For more course tutorials visit www.newtonhelp.com 1. Does a typical computer have any analog outputs? If so, what are they? 2. List three advantages of digital signal representation as compared to their analog representation. 3. Convert 126 x 10+2 to scientific and engineering notations. 4. Make the following conversions: a. Convert 0.34 seconds to milliseconds. b. Express 0.0005 x 10-4 farads as picofarads. 5. The frequency of a signal is equal to the reciprocal of the signal’s period (f = 1/p). For a computer with a 2.4 GHz clock, what is the clock period? Use engineering notation for your answer. 6. The signal shown below is a sine wave as it might be displayed on an oscilloscope. If it takes 40 msec. for the waveform to travel between the points shown by the arrow “B” below, what is the frequency of the waveform? 7. Power (in watts) is a certain amount of energy (in joules) divided by a certain length of time (in seconds). The laser with the highest
  • 2. peak power produces energy of 186 joules in 167 femtoseconds. What is the peak power? Use engineering notation for your answer. (Note: Use references to determine the value of a femtosecond and the proper notation for your answer.) 8. Which logic function produces a HIGH output only when all of the inputs are HIGH? 9. Which logic function produces a HIGH output only when all of the inputs are LOW? 10. Using the Internet, find the data sheet for the 74LS00 integrated circuit chip. Answer the following: =============================================== ECET 105 Week 1 iLab Introduction to Laboratory Test Equipment For more course tutorials visit www.newtonhelp.com I. OBJECTIVES 1. To learn the function and basic operation of the instruments comprising a test bench 2. To gain a basic understanding of how to use the power supply, DMM, oscilloscope, and function generator
  • 3. 3. To take measurements using the power supply, DMM, oscilloscope, and function generator 4. To determine waveform characteristics of various signals II. PARTS LIST Equipment IBM PC or Compatible with Windows 2000 or Higher ELVIS II+ Parts 1 - 1.0 kohm Resistor (color bands = brown, black, red, gold) 1 - 4.7 kohm Resistor (color bands = yellow, violet, red, gold) III. PROCEDURES A. Introduction to Instruments and Measurements Before beginning this lab, be sure that you have read the Lab Prepfor an explanation of how to use the various instruments. 1. Measure DC voltage with the DMM. a. Attach the power supply +5 V outputs to the DMM inputs. b. Launch the ELVIS II+ DMM and select DC Voltage. 1. Press Run and record the reading below, including units. 2. Press Stop.
  • 4. DMM measurement ___________________________ 2. Measure DC voltage with the oscilloscope. 1. Launch the ELVIS II+ 2. Enable Channel 0. 3. Ensure the following settings. • Probe—10x • Coupling—DC • Scale—2 Volts/Div • Vertical Position—0 • Timebase—50 us/Div • Trigger Type—Immediate • Trigger Source—Chan 0 Source • Horizontal Position—50 • Acquisition Mode—Run Continuously 1. Connect the oscilloscope probe from the oscilloscope to the +5 V output (main probe to +5 V and ground to GND). 2. Press Run and read the voltage on the oscilloscope. Record your reading with the appropriate unit in engineering notation.
  • 5. Vertical scale _____________ Horizontal scale______________ V = _____________ 1. Press Stop. 3. Measure resistance with the DMM. 4. Remove a 1 kohm resistor (color bands are brown, black, red, gold) from the parts kit. The first three bands indicate the value of the resistor and the fourth band indicates the accuracy of the resistance. A gold band indicates that the measured value should be within ±5% of the specified value. 5. Switch the DMM to ohms (Ω) and measure the resistor value by clipping the probes to each end of the resistor. 6. Press Start and record the measured value and the calculated range (1 kohm ±5%) including units. DMM measurement ____________________________ Theoretical range ______________________________ 7. Repeat Step 3 with the 4.7 kohm resistor (color bands are yellow, violet, red, and gold) including units. DMM measurement ____________________________
  • 6. =============================================== ECET 105 Week 2 Homework For more course tutorials visit www.newtonhelp.com 1. What is the duty cycle for a square wave signal that is HIGH for 15 nsec and LOW for 30 nsec? 2. A pulse train is shown on the oscilloscope below. Determine the period of the pulse. 3. Determine the frequency for a pulse that occurs every 10 ms. 4. What is the base-10 value for the binary number 11012? 5. What are the respective weights of the 1s in Problem 4? 6. How many different values can be represented by 6 bits, 7 bits, 8 bits, and 10 bits? 7. What is the minimum number of bits required to represent each of the following decimal numbers: 10, 1,000, 100,000, and 1,000,000? 7. Convert the binary value, 1011010100101101,to a hexadecimal equivalent.
  • 7. 9. Convert the following decimal numbers to 8-bit binary values. For negative numbers, use the 2’ complement formulation. 10. Express each of the following signed numbers (2s complement format) in decimal: =============================================== ECET 105 Week 2 iLab Soldering Techniques and the Electronic Die Kit For more course tutorials visit www.newtonhelp.com I. OBJECTIVES 1. To learn the basics of soldering. 2. To produce mechanically and electrically sound solder joints. 3. To assemble the Electronic Die Kit. II. PARTS LIST Equipment: Digital Die Kit Tools: 1 – Soldering Iron 1 – Pair Long-Nose Pliers 1 – Diagonal cutter 1 – Solder and hookup wire 1 – Wire stripper III. PROCEDURE
  • 8. 1. Preparation 2. Prepare a well-ventilated and clear workspace with ample lighting. 3. Ensure that the workspace includes a mat to work on in order to prevent the burning of the table or materials during the process. 4. Use a tray, egg crate, or vegetable/fruit tray for all (but especially the small) parts to avoid losing them. Attach the tray with double- sided tape to your bench or desktop. 5. Have a waste basket or desktop trash receptacle handy. 6. Ensure that the sponge that accompanies the soldering iron is sufficiently damp. The level of dampness needed is judged by wetting the sponge and then squeezing out the excess water until the sponge can be held in the hand with no noticeable water dripping from it. CAUTION: In order to avoid injury to the eyes, goggles or other eye protection must be worn AT ALL TIMES during the circuit assembly and soldering process. A soldering iron at temperature is very hot. It is a fire hazard. It is a health hazard. Caution must be taken at all times to ensure that contact with the skin does not occur. 6. Plug in the soldering iron and wait approximately five minutes for the iron to heat to a proper temperature. The temperature of the iron may be tested by lightly rubbing the tip of the iron against the moist sponge. If a majority of water is evaporated, then the iron is ready for use. The tip should be kept clean and tinned for soldering. The sponge is used to wipe away excess solder and materials. Tinning means that there is always a thin layer of solder on the tip. 7. Procure and prepare the dice kit for soldering. Inventory the parts and materials and ensure that each part fits the circuit board correctly by checking the parts on the board WITHOUT soldering them to the board. Put them in the tray until ready to install. 8. Prepare the tools that you will need: soldering iron, rosin core solder, desolder wick, safety glasses, long-nose pliers, and wire cutters. 1. Assembling the Electronic Die Kit
  • 9. 2. Start with the seven 220 ohm resistors. Note that the color bands are red-red-brown-gold. 2. With your long-nose pliers, bend the legs of all seven of the resistors so that they form 90-degree angles. 3. Insert the 220 ohm resistors into R1, R2, R3, R4, R5, R6, and R7 of your printed circuit board through the side where you see the labels. Bend the lead on the side away from the component part, not next to the resistor body, but on the other side of the pliers. Otherwise, you may break the connection inside the resistor. Ensure that all components, with the exception of the IC socket, are not fully inserted in the board, but have small gaps between them and the circuit board to avoid excessive heating. =============================================== ECET 105 Week 3 Homework For more course tutorials visit www.newtonhelp.com 1. Determine the output X for the 2-input AND gate with the input waveforms shown. 2. Determine the output X for the 2-input OR gate with the input waveforms shown.
  • 10. 3. Determine the output X for the 2-input Exclusive-OR gate with the input waveforms shown 4. Determine the output X for the 2-input NAND gate with the input waveforms shown. 5. Is the output from the NAND gate shown in Problem 4 active- HIGH or active-LOW? Why? 6. Download from a semiconductor manufacturer’s website (such as ti.com) the data sheet for a DIP packaged quad NOR gate (74x02). What pins does this chip use for the inputs to the first gate? 7. Draw a logic circuit that performs the following Boolean expression: Y = A * B. 8. Draw a logic circuit that performs the following Boolean expression: 9. Which gate is represented by the truth table below? 10. Use a truth table to determine the function of the gate shown below. ===============================================
  • 11. ECET 105 Week 3 iLab Introduction to Digital Logic Gates For more course tutorials visit www.newtonhelp.com . OBJECTIVES To understand basic logic functions (AND, OR, and NOT) and their complement used in Boolean algebra and digital logic design. To test simple logic small-scale integration (SSI) integrated circuit (IC) devices. II. PARTS LIST Equipment: IBM PC or Compatible with Windows 2000 or Higher Parts: 1 – 74LS00 Quad 2-Input NAND Gate IC 1 – 74LS02 Quad 2-Input NOR Gate IC 1 – 74LS04 Hex INVERTER Gate IC
  • 12. 1 – 74LS08 Quad 2-Input AND Gate IC 1 – 74LS32 Quad 2-Input OR Gate IC 1 – 74LS86 Quad 2-Input XOR Gate IC 1 – Set of Four Single-Pole-Double-Throw (SPDT) Switches, DIP Style 1 – 330 Ω resistor 1 – Light emitting diode (LED), red III. PROCEDURE OR Gate Operation Using the Internet or the campus library, acquire a hard copy of a data sheet for the 74LS32 quad 2-input OR gate. (HINT: Look at ti.com for possible help.) One of the OR gates is shown below in Figure 5.1. Figure 5.1 – 2-Input OR Gate Fill in the Table 5.1 for ALL possible logic conditions, based on the information found on the data sheet. Input (Pin 1) Input (Pin 2) Output (Pin 3)
  • 13. Table 5.1 - 2-Input OR Gate Theoretical Truth Table Write the Boolean expression below for the relationship between the device inputs (labeled as A and B) and output (labeled as Y). OUTPUT Y = ____________________________ Construct the circuit shown in Figure 5.2 (a layout of the breadboard is shown in Figure 5.3). Be sure that the flat side of the LED (called the cathode) is connected to ground and that the 74LS32 is connected to power and ground (Pins 14 and 7, respectively). Figure 5.2 – OR Gate Test Circuit Top View Side View Figure 5.3 – Breadboard Layout for Figure 5.2 Connect the circuit to verify the logic gate operation recording the input and output voltages. Fill in Table 5.2below for ALL possible logic conditions. Input (Pin 1) Input (Pin 2) Output (Pin 3) Table 5.2 - 2-Input OR Gate Measured Truth Table
  • 14. Do the results match the manufacturer’s truth table? __________ (YES or NO) AND Gate Operation Acquire a hard copy of a data sheet for the 74LS08 quad 2-input AND gate. Figure 5.4 – 2-Input AND Gate Fill in the truth table below for ALL possible logic conditions based on the information found on the data sheet. Input (Pin 1) Input (Pin 2) Output (Pin 3) Table 5.3 - 2-Input AND Gate Theoretical Truth Table Write the Boolean expression below for the relationship between the device inputs (labeled as A and B) and output (labeled as Y). OUTPUT Y = ____________________________ Construct the circuit shown in Figure 5.5 by replacing the 74LS32 from Figure 5.2 with a 74LS08. =============================================== ECET 105 Week 4 Homework
  • 15. For more course tutorials visit www.newtonhelp.com 1. Draw a logic circuit that performs the following Boolean expression: 2. Determine the Boolean expression for the circuit shown below. 3. The Boolean expression for an AND gate is . Does the expression also describe an AND gate? Prove your answer. 4. Write the Boolean expression for the logic circuit shown below. 5. Develop the truth table for the circuit shown in Problem 4. 6. Develop the truth table for the circuit shown below. 7. Develop the Boolean expression for the circuit shown in Problem 6.
  • 16. 8. Draw a logic circuit using only NAND gates to implement the following Boolean expression: Y =AB + C. 9. Develop a logic circuit, using only NAND gates, to implement a circuit to meet the requirements of the truth table shown below. 10. Determine the Boolean description for the circuit shown below. =============================================== ECET 105 Week 4 iLab Logic Circuit Design, Simplification, Simulation, and Verification For more course tutorials visit www.newtonhelp.com Objectives: To design a digital logic circuit using a truth table and sum-of-product (SOP) formulation. To use the MultiSim program to simplify, simulate, and test the circuit operation.
  • 17. To build and test the logic circuit to verify that the system performs as expected. Results: Built a circuit board which would turn on the LED light and used multisim and tools which would simplify to do so. Verified the truth table to check and see if the vales are accurate. =============================================== ECET 105 Week 5 Homework For more course tutorials visit www.newtonhelp.com 1. Determine the decimal value of each of the following unsigned binary numbers: 2. Determine the decimal value of each of the following signed binary numbers displayed in the 2’s complement form: 3. Determine the outputs (Cout, Sout) of a full-adder for each of the following inputs:
  • 18. 4. The circuit below is an attempt to build a half-adder. Will the Cout and Sout function properly? Demonstrate your rationale. 5. Determine the outputs for the circuit shown below. Assume that C0 = 0 for all cases. 6. Derive the Boolean equation for A = B, when A and B are 4-bit numbers. 7. Complete the timing diagram below for a 2-bit adder. (10 points) 8. Answer the following: What is the frequency of a periodic waveform with a period of 1.0 µsec? How many bits are required to represent decimal numbers from -256 to +255? What is the largest positive number that can be represented by 10 signed bits?
  • 19. 9. The full-adder shown below is tested under all input conditions as shown. Is the circuit operating correctly? If not, what is the most likely fault? 10. Using a 4-bit adder/subtractor, carry out the binary operations for 9 – 3 and 3 – 9. What can you conclude about the answers and the carry out bit (C4)? =============================================== ECET 105 Week 5 iLab Designing Adders and Subtractors For more course tutorials visit www.newtonhelp.com Objectives: The objectives are to reinforce the concepts of binary addition/subtraction while using the Quartus II Programmable Logic Tool as well as getting used to the program. We were also supposed to build and test a simple adder/subtractor using the eSOC III Board. Observations/Measurements:
  • 20. Describe any problems you had with this week’s assignment. 1. In the simulation run of the four-bit adder, when we performed the addition 5 + 3, we did not immediately have an output of 8 on SOUT. What could be the cause of this? 2. If we changed the count period to 1000 nS for A and B, would this correct the anomalies in Question 1? Why or why not? 3. How fast can your 4-bit adder/subtractor determine the sum or difference of two numbers? 4. Use the simulation timing diagram to compare the worst case time to do an operation with your adder/subtractor with the worst case using the 74LS283. State which operation takes the longest and list the time required for both devices. =============================================== ECET 105 Week 6 Homework For more course tutorials visit www.newtonhelp.com
  • 21. 1. When a HIGH is on the output of the decoding circuit below, what is the binary code appearing on the inputs? 2. Write the Boolean equations for each of the following codes if an active-LOW decoder output is required. The first decode is shown as an example. 3. What are the active outputs of a BCD-to-7 segment decoder with an input of 0100? 4. A 7-segment decoder/driver drives the display below. Using the waveforms shown, determine the sequence of digits that appear on the display. 5. Construct a truth table for an active-LOW output BCD (1-of-10) decoder. 6. Derive the truth table for the Y output in the diagram below. 7. Derive the Boolean equation for the Y output in Problem 6. 8. For the multiplexer shown below, determine the output for the following input state. D0 = 0, D1 = 1, D2 = 1, D3 = 0, S0 = 1, S1 = 0.
  • 22. 9. Determine the function of the circuit shown below. 10. Write the Boolean equation for the circuit shown in Problem 9. =============================================== ECET 105 Week 6 iLab Decoders and Multiplexers For more course tutorials visit www.newtonhelp.com Objectives: To learn about the operation of a BCD-to-seven-segment decoder To learn about the operation of a seven-segment display To learn about the operation of multiplexers To build and test a multiplexed display circuit using both discrete components and the eSOC III board Questions: Why are the 330 Ω resistors required for the discrete logic circuit, but not for the MultiSim simulated circuit or the eSOC III circuit?
  • 23. Create a partial truth table showing the requirements for a seven- segment decoder to output a hexadecimal digit. This requires four input bits and six output states, A – F. For each output state, show the segments a-g. The output states for the inputs 0 – 9 are the same as for the 74LS47 (see focus.ti.com). Use capital letters A, C, E, F and lower case for b and d. Why is the seven-segment display driven with an active-LOW signal using discrete logic and an active-HIGH with the eSOC board? =============================================== ECET 105 Week 7 Homework For more course tutorials visit www.newtonhelp.com 1. Sketch the Q output for the waveforms shown. Assume that Q starts LOW. 2. Sketch the Q output for the circuit shown below. Assume that Q starts LOW.
  • 24. 3. Sketch the Q output for the circuit shown below. Assume that Q starts LOW. 4. Sketch the Q output for the circuit shown below. Assume that Q starts LOW. 5. Sketch the Q output for the circuit shown below. Assume that Q starts LOW. 6. Sketch the Q output for the circuit shown below. Assume that Q starts LOW. 7. Sketch the Q output for the circuit shown below. Assume that Q starts LOW. 8. Sketch the Q0 and Q1 outputs for the circuit shown below. Assume that both Q0 and Q1 start LOW. 9. What is the output frequency for Q1 in the circuit shown below? 10. What is the output frequency for Q2 in the circuit shown below? =============================================== ECET 105 Week 7 iLab Add-Subtractor using Flip-Flops
  • 25. For more course tutorials visit www.newtonhelp.com I. OBJECTIVES To test the operation of a 74LS74 D flip-flop and compare the operation with the predicted behavior To test the operation of a 74LS112 J-K flip-flop and compare the operation with the predicted behavior To measure propagation delays of a 74LS112 J-K flip-flop To build and test an enhanced adder-subtractor II. PARTS LIST Equipment: IBM PC or Compatible with Windows 2000 or Higher Quartus II Design Software—Version 9.1 Frequency Generator Oscilloscope Parts:
  • 26. 2 – 330 Ω resistors, ¼ W 2 – Red LEDs 1 – 74LS74 dual D flip-flop 1 – Green LED 1 – 74LS112 dual J-K flip-flop 1 – SPDT Switch, DIP configuration 1 – eSOC III FPGA Board III. PROCEDURE A. Test the 74LS74 D Flip-Flop Build the D flip-flop circuit shown in Figure 7.1. The LEDs are wired as active-LOW since the flip-flop can supply more current in a low state than in a high state. This means that the green LED is on when is HIGH and the red LED indicates Q is HIGH. Remember to attach VCC to pin 14 and ground to pin 7. Using the circuit, verify that the operation follows the truth table for this device. What happens when both and are set low? Build the J-K flip-flop circuit shown in Figure 7.2. Remember to attach VCC to pin 16 and ground to pin 8. Using the circuit, verify that the operation follows the truth table for this device.
  • 27. Increase the pulse generator output to 1.0 MHz. Set the switches so that all of the flip-flop inputs are high and remove the LEDs and resistors. Using the oscilloscope, measure the propagation times for the Q output from the active clock edge. Record the value below. Using Quartus II, modify the circuit from Lab 5 as shown in Figure 7.3 by adding three 7474 D-flip-flip chips. Note that a clear function has been added and that the flip-flop presets are inactive since they are tied to +5V (labeled VCC). Perform a simulation to verify the correct operation of the circuit. Note that in this case, the CLOCK signal is not a periodic signal; the CLOCK signal is a discrete signal occurring on a switch closure. Assign pins to the inputs and outputs. Use the DIP switches for your inputs (0-3 for A, 8-11 for B, 7 for CLEAR, 15 for ADDSUB), one of the debounced pushbuttons for CLOCK and the red LEDs for outputs (RD0-4). Download you program to the eSOC III board and test the operation of the circuit. Photograph your final circuit for submission (online) or demonstrate your circuit to your professor (onsite or blended). Why is the condition when both and are LOW considered illegal?