1. DEVRY ECET 105 Week 1 iLab Introduction to Laboratory Test
Equipment NEW
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ECET 105 Week 1 iLab Introduction to Laboratory Test
Equipment NEWI. OBJECTIVES
1. To learn the function and basic operation of the
instruments comprising a test bench
2. To gain a basic understanding of how to use the power
supply, DMM, oscilloscope, and function generator
3. To take measurements using the power supply, DMM,
oscilloscope, and function generator
4. To determine waveform characteristics of various signals
II. PARTS LIST
Equipment
IBM PC or Compatible with Windows 2000 or Higher
ELVIS II+
Parts
1 - 1.0 kohm Resistor (color bands = brown, black, red,
gold)
1 - 4.7 kohm Resistor (color bands = yellow, violet, red,
gold)
III. PROCEDURES
A. Introduction to Instruments and Measurements
Before beginning this lab, be sure that you have read the Lab
2. Prepfor an explanation of how to use the various instruments.
1. Measure DC voltage with the DMM.
a. Attach the power supply +5 V outputs to the DMM inputs.
b. Launch the ELVIS II+ DMM and select DC Voltage.
1. Press Run and record the reading below, including units.
2. Press Stop.
DMM measurement ___________________________
2. Measure DC voltage with the oscilloscope.
1. Launch the ELVIS II+
2. Enable Channel 0.
3. Ensure the following settings.
• Probe—10x
• Coupling—DC
• Scale—2 Volts/Div
• Vertical Position—0
• Timebase—50 us/Div
• Trigger Type—Immediate
• Trigger Source—Chan 0 Source
• Horizontal Position—50
• Acquisition Mode—Run Continuously
1. Connect the oscilloscope probe from the oscilloscope to
the +5 V output (main probe to +5 V and ground to GND).
2. Press Run and read the voltage on the oscilloscope.
Record your reading with the appropriate unit in engineering
notation.
Vertical scale _____________ Horizontal scale______________
V = _____________
1. Press Stop.
3. Measure resistance with the DMM.
4. Remove a 1 kohm resistor (color bands are brown, black,
red, gold) from the parts kit. The first three bands indicate the
value of the resistor and the fourth band indicates the accuracy
of the resistance. A gold band indicates that the measured value
3. should be within ±5% of the specified value.
5. Switch the DMM to ohms (Ω) and measure the resistor
value by clipping the probes to each end of the resistor.
6. Press Start and record the measured value and the
calculated range (1 kohm ±5%) including units.
DMM measurement ____________________________
Theoretical range ______________________________
7. Repeat Step 3 with the 4.7 kohm resistor (color bands are
yellow, violet, red, and gold) including units.
DMM measurement ____________________________
Theoretical range ______________________________
8. Press Stop.
4. Measure a changing signal voltage with the oscilloscope.
9. Launch the ELVIS II+ frequency generator.
1. Connect the frequency generator output to the
oscilloscope CH0 input.
2. Select the square wave output ( ) and set the frequency
to 1 kHz.
5. Set the Amplitude to 5.00 Vpp and the DC Offset to 2.50 V.
6. On the oscilloscope, adjust the Time/Div setting to a
value of 0.5 ms.
7. Set the Volts/Div to 2.0 V.
8. Press Run on both instruments. Sketch the observed
waveform below. Label both axes and ground.
Output Waveform for Step 4
1. Stop both instruments.
5. Generate and measure triangle waveforms.
2. Set the frequency generator to output a triangle wave ( )
4. with a frequency of 1.0 kHz, 6.00 Vpp, and 0 V DC Offset.
3. Set the oscilloscope to 2.0 V/div and 200 μsec/div.
4. Run both instruments and sketch the output below. Label
the axes and ground.
Output Waveform for Step 5
1. Measure and record the values below, including units.
Vertical scale _____________ Horizontal scale______________
Period ________________ Frequency _________________
1. Stop both instruments.
6. Generating and measuring sinusoidal waveforms.
6. Select a sine wave output with a frequency of 1 kHz, 6.0
Vpp, and 0 V DC Offset.
7. Record measurements displayed on the oscilloscope
display, including units.
Vertical scale _____________ Horizontal scale______________
Peak +V = ________________ Frequency = ________________
1. Component Identification
Go through your parts kit and identify the various components
and tools you have. Application and proper use will be
demonstrated in video clips and discussed in the Lab Q & A
thread.
1.
2. After verifying that your lab kit is complete, select two
components and find out what they are and what they do.
HINT—Use the instruction manual, illustrated parts list, the
campus library and/or the Internet to guide you toward the
answers. Record the part numbers and functions below.
First device’s part number or physical description
_________________
First device’s function (what does it do?)
Second device’s part number or physical description
_________________
Second device’s function (what does it do?)
6. DEVRY ECET 105 Week 2 Homework NEW
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1. What is the duty cycle for a square wave signal that is HIGH
for 15 nsec and LOW for 30 nsec?
2. A pulse train is shown on the oscilloscope below. Determine
the period of the pulse.
3. Determine the frequency for a pulse that occurs every 10 ms.
4. What is the base-10 value for the binary number 11012?
5. What are the respective weights of the 1s in Problem 4?
6. How many different values can be represented by 6 bits, 7
bits, 8 bits, and 10 bits?
7. What is the minimum number of bits required to represent
each of the following decimal numbers: 10, 1,000, 100,000, and
1,000,000?
7. Convert the binary value, 1011010100101101, to a
hexadecimal equivalent.
9. Convert the following decimal numbers to 8-bit binary
values. For negative numbers, use the 2’ complement
formulation.
10. Express each of the following signed numbers (2s
complement format) in decimal:
7. DEVRY ECET 105 Week 2 iLab Soldering Techniques and the
Electronic Die Kit NEW
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I. OBJECTIVES
1. To learn the basics of soldering.
2. To produce mechanically and electrically sound solder joints.
3. To assemble the Electronic Die Kit.
II. PARTS LIST
Equipment:
Digital Die Kit
Tools:
1 – Soldering Iron
1 – Pair Long-Nose Pliers
1 – Diagonal cutter
1 – Solder and hookup wire
1 – Wire stripper
III. PROCEDURE
1. Preparation
2. Prepare a well-ventilated and clear workspace with ample
lighting.
3. Ensure that the workspace includes a mat to work on in
8. order to prevent the burning of the table or materials during
the process.
4. Use a tray, egg crate, or vegetable/fruit tray for all (but
especially the small) parts to avoid losing them. Attach the tray
with double-sided tape to your bench or desktop.
5. Have a waste basket or desktop trash receptacle handy.
6. Ensure that the sponge that accompanies the soldering iron
is sufficiently damp. The level of dampness needed is judged by
wetting the sponge and then squeezing out the excess water
until the sponge can be held in the hand with no noticeable
water dripping from it.
CAUTION:
In order to avoid injury to the eyes, goggles or other eye
protection must be worn AT ALL TIMES during the circuit
assembly and soldering process.
A soldering iron at temperature is very hot. It is a fire hazard. It
is a health hazard. Caution must be taken at all times to ensure
that contact with the skin does not occur.
6. Plug in the soldering iron and wait approximately five
minutes for the iron to heat to a proper temperature. The
temperature of the iron may be tested by lightly rubbing the tip
of the iron against the moist sponge. If a majority of water is
evaporated, then the iron is ready for use. The tip should be
kept clean and tinned for soldering. The sponge is used to wipe
away excess solder and materials. Tinning means that there is
always a thin layer of solder on the tip.
7. Procure and prepare the dice kit for soldering. Inventory the
parts and materials and ensure that each part fits the circuit
board correctly by checking the parts on the board WITHOUT
soldering them to the board. Put them in the tray until ready to
install.
8. Prepare the tools that you will need: soldering iron, rosin
9. core solder, desolder wick, safety glasses, long-nose pliers, and
wire cutters.
1. Assembling the Electronic Die Kit
2. Start with the seven 220 ohm resistors. Note that the color
bands are red-red-brown-gold.
2. With your long-nose pliers, bend the legs of all seven of the
resistors so that they form 90-degree angles.
3. Insert the 220 ohm resistors into R1, R2, R3, R4, R5, R6, and
R7 of your printed circuit board through the side where you see
the labels. Bend the lead on the side away from the component
part, not next to the resistor body, but on the other side of the
pliers. Otherwise, you may break the connection inside the
resistor. Ensure that all components, with the exception of the
IC socket, are not fully inserted in the board, but have small
gaps between them and the circuit board to avoid excessive
heating.
4. Prepare to solder the legs of the resistors to the bottom side
of the printed circuit board. Turn the board upside down.
Caution must be taken to ensure that the “eyelet” solder pads
on the board are not stressed with either hands or the tip of the
iron during the heating process. The eyelets are easily
dislodged and, if damaged, may result in irreparable damage to
the circuit board.
In soldering, firmly touch the tip of the iron to the pad AND the
lead you want to solder. Ensure that only one wire and one pad
(one connection) is heated at a time. When the connection has
been heated sufficiently (it should take only a few seconds),
touch the solder to the pad, opposite from the tip of the iron,
and allow a small amount of solder to flow onto the connection.
The parts should not move while you are heating them or they
10. will not form a good joint. Sloppy or careless heating may cause
multiple connections to be soldered together, causing damage
to the circuit board.
5. Care must be taken as to not apply too much solder because
this will result in a convex-shaped connection and, possibly, a
cold solder joint. Ideally, the solder should be melted by the
connection, not the iron.
6. Remove the iron after ensuring that the solder has spread
over the pad and that the lead is sufficiently secured. A
resulting concave shape should be observed at the connection.
Have your team member or instructor verify proper
connection.
7. Trim the excess leads, pointing into a paper or plastic waste
bag or basket. Metal clippings may fly far, fall into computer
keyboards, or otherwise pose as a shorting hazard.
8. Insert the two, 0.1μF ceramic capacitors into C1 and C2.
9. Solder the legs of the capacitors to the bottom side of the
printed circuit board and carefully cut off the excess leads.
1. Insert the 7805, 5-volt regulator into U1 following the
drawing on the printed circuit board. Push the component
down carefully until it is fully set. DO NOT force the IC all the
way onto the board. Push the part partially down and allow the
leads to spread out. The result should be that the part stands off
the board as shown. Solder and carefully cut excess leads.
2. Insert the 8-pin, IC socket into U2 following the drawing on
the printed circuit board. Solder two pins on diagonally
opposite corners. (Hold one pin with the heat sink clip or paper
clip while soldering the other.) Inspect and confirm that all pins
are in the correct holes in the PCB and the socket is seated on
the board. Solder each pin and repair any bridging before
continuing.
2. Insert the momentary switch into S1 following the drawing
on the printed circuit board and solder the two contact pins.
11. 3. Insert the seven red LEDs into D1, D2, D3, D4, D5, D6, and D7
following the drawing on the printed circuit board. PLEASE
NOTE that the longer lead of the LEDs is the anode and should
go into the hole marked with a + sign.
4. Insert the 9V battery connector into P1 and solder. You may
insert the battery leads from the bottom. This will make a
neater assembly should you decide to put the Dice in a case. It is
VERY IMPORTANT that the red wire is soldered into V+ and the
black wire is soldered into V-.
5. Have a team member or your instructor inspect your board
when you have finished.
6. Completing and Testing the Kit
7. Inspect the Atmel ATTINY85-20PU microcontroller.
Straighten any severely bent pins, very slowly; otherwise, they
could break. Align the IC on your breadboard so that the dot in
the top lefthand corner of the IC is at the same end as the notch
in the IC socket.
Insert the pins on one side, but do not press in, making sure
that each pin is started in its socket. Gently press the IC from
the other side against the pins started until the pins on the
other side easily start in their sockets. Double check that no pin
is bent under or is outside of its intended socket location. Press
the IC into the socket, firmly but gently.
2. Attach the 9V battery firmly to the battery connector.
3. The die kit should resemble Figure 4.1 when assembly is
completed. The Atmel ATTINY85-20PU has been shipped with a
program already stored so that the die may be tested by
connecting the 9V battery to the connector, then pressing and
holding the momentary switch and releasing it. While the
switch is pressed, the LEDs will blink in a random pattern.
When the switch is released, a randomly generated number
between 1 and 6 will be displayed on the LED die. Note any
performance issues.
12. Hints:
If the die is not working on the first try, turn it off by
unplugging the battery. Check for warm/hot components.
If the regulator U1 is hot, you have a short somewhere. Look for
solder shorts, incorrectly inserted components, and leads that
may be touching adjacent leads. Remove the shorting
connection and try again.
13. DEVRY ECET 105 Week 3 Homework NEW
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1. Determine the output X for the 2-input AND gate with the
input waveforms shown.
2. Determine the output X for the 2-input OR gate with the input
waveforms shown.
3. Determine the output X for the 2-input Exclusive-OR gate
with the input waveforms shown
4. Determine the output X for the 2-input NAND gate with the
input waveforms shown.
5. Is the output from the NAND gate shown in Problem 4 active-
HIGH or active-LOW? Why?
6. Download from a semiconductor manufacturer’s website
(such as ti.com) the data sheet for a DIP packaged quad NOR
gate (74x02). What pins does this chip use for the inputs to the
first gate?
7. Draw a logic circuit that performs the following Boolean
expression: Y = A * B.
8. Draw a logic circuit that performs the following Boolean
expression:
9. Which gate is represented by the truth table below?
14. 10. Use a truth table to determine the function of the gate
shown below.
15. DEVRY ECET 105 Week 3 iLab Introduction to Digital Logic
Gates NEW
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I. OBJECTIVES
To understand basic logic functions (AND, OR, and NOT) and
their complement used in Boolean algebra and digital logic
design.
To test simple logic small-scale integration (SSI) integrated
circuit (IC) devices.
II. PARTS LIST
Equipment:
IBM PC or Compatible with Windows 2000 or
Higher
Parts:
1 – 74LS00 Quad 2-Input NAND Gate IC
1 – 74LS02 Quad 2-Input NOR Gate IC
1 – 74LS04 Hex INVERTER Gate IC
1 – 74LS08 Quad 2-Input AND Gate IC
1 – 74LS32 Quad 2-Input OR Gate IC
1 – 74LS86 Quad 2-Input XOR Gate IC
1 – Set of Four Single-Pole-Double-Throw (SPDT)
Switches, DIP Style
1 – 330 Ω resistor
1 – Light emitting diode (LED), red
16. III. PROCEDURE
OR Gate Operation
Using the Internet or the campus library, acquire a hard copy of
a data sheet for the 74LS32 quad 2-input OR gate. (HINT: Look
at ti.com for possible help.) One of the OR gates is shown below
in Figure 5.1.
Figure 5.1 – 2-Input OR Gate
Fill in the Table 5.1 for ALL possible logic conditions, based on
the information found on the data sheet.
Input (Pin 1) Input (Pin 2) Output (Pin 3)
Table 5.1 - 2-Input OR Gate Theoretical Truth Table
Write the Boolean expression below for the relationship
between the device inputs (labeled as A and B) and output
(labeled as Y).
OUTPUT Y = ____________________________
Construct the circuit shown in Figure 5.2 (a layout of the
breadboard is shown in Figure 5.3). Be sure that the flat side of
the LED (called the cathode) is connected to ground and that
the 74LS32 is connected to power and ground (Pins 14 and 7,
respectively).
Figure 5.2 – OR Gate Test Circuit
Top View
Side View
Figure 5.3 – Breadboard Layout for Figure 5.2
Connect the circuit to verify the logic gate operation recording
the input and output voltages. Fill in Table 5.2below for ALL
possible logic conditions.
Input (Pin 1) Input (Pin 2) Output (Pin 3)
Table 5.2 - 2-Input OR Gate Measured Truth Table
Do the results match the manufacturer’s truth
17. table? __________ (YES or NO)
AND Gate Operation
Acquire a hard copy of a data sheet for the 74LS08 quad 2-input
AND gate.
Figure 5.4 – 2-Input AND Gate
Fill in the truth table below for ALL possible logic conditions
based on the information found on the data sheet.
Input (Pin 1) Input (Pin 2) Output (Pin 3)
Table 5.3 - 2-Input AND Gate Theoretical Truth Table
Write the Boolean expression below for the relationship
between the device inputs (labeled as A and B) and output
(labeled as Y).
OUTPUT Y = ____________________________
Construct the circuit shown in Figure 5.5 by replacing the
74LS32 from Figure 5.2 with a 74LS08.
Figure 5.5 - 2-Input AND Gate Test Circuit
Connect the circuit to verify the logic gate operation recording
the input and output voltages. Fill in the truth table below for
ALL possible logic conditions.
Input (Pin 1) Input (Pin 2) Output (Pin 3)
Table 5.4 - 2-Input AND Gate Measured Truth Table
Do the results match the manufacturer’s truth
table? __________ (YES or NO)
NAND Gate Operation
Acquire a hard copy of a data sheet for the 74LS00 quad 2-input
NAND gate.
Figure 5.6 – 2-Input NAND Gate
Fill in Table 5.5 for ALL possible logic conditions, based on the
information found on the data sheet.
Input (Pin 1) Input (Pin 2) Output (Pin 3)
Input (Pin 1) Input (Pin 2) Output (Pin 3)
Input (Pin 1) Input (Pin 2) Output (Pin 3)
18. Table 5.5 - 2-Input NAND Gate Theoretical Truth Table
Write the Boolean expression below for the relationship
between the device inputs (labeled as A and B) and output
(labeled as Y).
OUTPUT Y = ____________________________
Construct the circuit shown in Figure 5.7 by replacing the
74LS08 from Figure 5.5 with a 74LS00.
Figure 5.7 – 2-Input NAND Gate Test Circuit
Connect the circuit to verify the logic gate operation recording
the input and output voltages. Fill in the truth table below for
ALL possible logic conditions.
Input (Pin 1) Input (Pin 2) Output (Pin 3)
Table 5.6 - 2-Input OR Gate Measured Truth Table
Do the results match the manufacturer’s truth
table? __________ (YES or NO)
Exclusive-OR Gate Operation
Acquire a hard copy of a data sheet for the 74LS86 quad 2-input
exclusive-OR (XOR) gate.
Figure 5.8 – 2-Input XOR Gate
Fill in the truth table below for ALL possible logic conditions,
based on the information found on the data sheet.
Input (Pin 1) Input (Pin 2) Output (Pin 3)
Table 5.7 - 2-Input XOR Gate Theoretical Truth Table
Write the Boolean expression below for the relationship
between the device inputs (labeled as A and B) and output
(labeled as Y).
OUTPUT Y = ____________________________
Construct the circuit shown in Figure 5.9 by replacing the
74LS00 from Figure 5.7 with a 74LS86.
Figure 5.9 – 2-Input XOR Gate Test Circuit
Connect the circuit to verify the logic gate operation recording
the input and output voltages. Fill in the truth table below for
ALL possible logic conditions.
19. Input (Pin 1) Input (Pin 2) Output (Pin 3)
Table 5.8 - 2-Input OR Gate Measured Truth Table
Do the results match the manufacturer’s truth
table? __________ (YES or NO)
NOR Gate Operation
Acquire a hard copy of a data sheet for the 74LS02 quad 2-input
NOR gate.
Figure 5.10 – 2-Input NOR Gate
Fill in the truth table below for ALL possible logic conditions,
based on the information found on the data sheet.
Input (Pin 2) Input (Pin 3) Output (Pin 1)
Table 5.9 - 2-Input NOR Gate Theoretical Truth Table
Write the Boolean expression below for the relationship
between the device inputs (labeled as A and B) and output
(labeled as Y).
OUTPUT Y = ____________________________
Construct the circuit shown in Figure 5.11. Note that the pin
numbers for inputs and outputs have changes from Figure 5.9
(output is now Pin 1, inputs are on Pins 2 and 3).
Figure 5.11 – 2-Input NOR Gate Test Circuit
Connect the circuit to verify the logic gate operation recording
the input and output voltages. Fill in the truth table below for
ALL possible logic conditions.
Input (Pin 2) Input (Pin 3) Output (Pin 1)
Table 5.10 - 2-Input NOR Gate Measured Truth Table
Do the results match the manufacturer’s truth
table? __________ (YES or NO)
NOT Gate Operation
Acquire a hard copy of a data sheet for the 74LS04 hex NOT
gate.
Figure 5.12 – NOT Gate
Fill in the truth table below for ALL possible logic conditions,
based on the information found on the data sheet.
Input (Pin 2) Input (Pin 3) Output (Pin 1)
20. Table 5.11 - NOT Gate Theoretical Truth Table
Write the Boolean expression below for the relationship
between the device input (labeled as A) and output (labeled as
Y).
OUTPUT Y = ____________________________
Construct the circuit shown in Figure 5.13. Note that the pin
numbers for inputs and outputs have changes from Figure 5.11
(output is now Pin 2, input is on Pin 1).
Figure 5.13 – 2-Input NOR Gate Test Circuit
Connect the circuit to verify the logic gate operation recording
the input and output voltages. Fill in the truth table below for
ALL possible logic conditions.
Input (Pin 1) Output (Pin 2)
Table 5.12 - NOT Gate Measured Truth Table
Do the results match the manufacturer’s truth
table? __________ (YES or NO)
TROUBLESHOOTING
Describe any problems encountered and how those problems
were solved.
21. DEVRY ECET 105 Week 4 Homework NEW
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1. Draw a logic circuit that performs the following Boolean
expression:
2. Determine the Boolean expression for the circuit shown
below.
3. The Boolean expression for an AND gate is . Does the
expression also describe an AND gate? Prove your answer.
4. Write the Boolean expression for the logic circuit shown
below.
5. Develop the truth table for the circuit shown in Problem 4.
6. Develop the truth table for the circuit shown below.
7. Develop the Boolean expression for the circuit shown in
Problem 6.
8. Draw a logic circuit using only NAND gates to implement the
following Boolean expression: Y =AB + C.
9. Develop a logic circuit, using only NAND gates, to implement
a circuit to meet the requirements of the truth table shown
below.
10. Determine the Boolean description for the circuit shown
below.
22. DEVRY ECET 105 Week 4 iLab Logic Circuit Design,
Simplification, Simulation, and Verification NEW
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Objectives:
To design a digital logic circuit using a truth table and sum-of-
product (SOP) formulation.
To use the MultiSim program to simplify, simulate, and test the
circuit operation.
To build and test the logic circuit to verify that the system
performs as expected.
Results:
Built a circuit board which would turn on the LED light and
used multisim and tools which would simplify to do so. Verified
the truth table to check and see if the vales are accurate.
23. DEVRY ECET 105 Week 5 Homework NEW
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1. Determine the decimal value of each of the following
unsigned binary numbers:
2. Determine the decimal value of each of the following signed
binary numbers displayed in the 2’s complement form:
3. Determine the outputs (Cout, Sout) of a full-adder for each of
the following inputs:
4. The circuit below is an attempt to build a half-adder. Will the
Cout and Sout function properly? Demonstrate your rationale.
5. Determine the outputs for the circuit shown below. Assume
that C0 = 0 for all cases.
6. Derive the Boolean equation for A = B, when A and B are 4-bit
numbers.
7. Complete the timing diagram below for a 2-bit adder. (10
points)
8. Answer the following:
What is the frequency of a periodic waveform with a period of
1.0 µsec?
How many bits are required to represent decimal numbers
from -256 to +255?
What is the largest positive number that can be represented by
10 signed bits?
9. The full-adder shown below is tested under all input
conditions as shown. Is the circuit operating correctly? If not,
what is the most likely fault?
10. Using a 4-bit adder/subtractor, carry out the binary
24. operations for 9 – 3 and 3 – 9. What can you conclude about the
answers and the carry out bit (C4)?
25. DEVRY ECET 105 Week 5 iLab Designing Adders and
Subtractors NEW
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Objectives:
The objectives are to reinforce the concepts of binary
addition/subtraction while using the Quartus II Programmable
Logic Tool as well as getting used to the program. We were also
supposed to build and test a simple adder/subtractor using the
eSOC III Board.
Observations/Measurements:
Describe any problems you had with this week’s assignment.
1. In the simulation run of the four-bit adder, when we
performed the addition 5 + 3, we did not immediately have an
output of 8 on SOUT. What could be the cause of this?
2. If we changed the count period to 1000 nS for A and B, would
this correct the anomalies in Question 1? Why or why not?
3. How fast can your 4-bit adder/subtractor determine the sum
or difference of two numbers?
4. Use the simulation timing diagram to compare the worst case
time to do an operation with your adder/subtractor with the
worst case using the 74LS283. State which operation takes the
longest and list the time required for both devices.
26. DEVRY ECET 105 Week 6 Homework NEW
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1. When a HIGH is on the output of the decoding circuit below,
what is the binary code appearing on the inputs?
2. Write the Boolean equations for each of the following codes if
an active-LOW decoder output is required. The first decode is
shown as an example.
3. What are the active outputs of a BCD-to-7 segment decoder
with an input of 0100?
4. A 7-segment decoder/driver drives the display below. Using
the waveforms shown, determine the sequence of digits that
appear on the display.
5. Construct a truth table for an active-LOW output BCD (1-of-
10) decoder.
6. Derive the truth table for the Y output in the diagram below.
7. Derive the Boolean equation for the Y output in Problem 6.
8. For the multiplexer shown below, determine the output for
the following input state.
D0 = 0, D1 = 1, D2 = 1, D3 = 0, S0 = 1, S1 = 0.
9. Determine the function of the circuit shown below.
10. Write the Boolean equation for the circuit shown in
Problem 9.
27. DEVRY ECET 105 Week 6 iLab Decoders and Multiplexers NEW
Check this A+ tutorial guideline at
http://www.uopassignments.com/ecet-105-devry/ecet-
105-week-6-ilab-decoders-and-multiplexers-recent
For more classes visit
http://www.uopassignments.com
Objectives:
To learn about the operation of a BCD-to-seven-segment
decoder
To learn about the operation of a seven-segment display
To learn about the operation of multiplexers
To build and test a multiplexed display circuit using both
discrete components and the eSOC III board
Questions:
Why are the 330 Ω resistors required for the discrete logic
circuit,but not for the MultiSim simulated circuit or the eSOC III
circuit?
Create a partial truth table showing the requirements for a
seven-segment decoder to output a hexadecimal digit. This
requires four input bits and six output states, A – F. For each
output state, show the segments a-g. The output states for the
inputs 0 – 9 are the same as for the 74LS47 (see focus.ti.com).
Use capital letters A, C, E, F and lower case for b and d.
Why is the seven-segment display driven with an active-LOW
signal using discrete logic and an active-HIGH with the eSOC
board?
28. DEVRY ECET 105 Week 7 Homework NEW
Check this A+ tutorial guideline at
http://www.uopassignments.com/ecet-105-devry/ecet-
105-week-7-homework-recent
For more classes visit
http://www.uopassignments.com
1. Sketch the Q output for the waveforms shown. Assume that Q
starts LOW.
2. Sketch the Q output for the circuit shown below. Assume that
Q starts LOW.
3. Sketch the Q output for the circuit shown below. Assume that
Q starts LOW.
4. Sketch the Q output for the circuit shown below. Assume that
Q starts LOW.
5. Sketch the Q output for the circuit shown below. Assume that
Q starts LOW.
6. Sketch the Q output for the circuit shown below. Assume that
Q starts LOW.
7. Sketch the Q output for the circuit shown below. Assume that
Q starts LOW.
8. Sketch the Q0 and Q1 outputs for the circuit shown below.
Assume that both Q0 and Q1 start LOW.
9. What is the output frequency for Q1 in the circuit shown
below?
10. What is the output frequency for Q2 in the circuit shown
below?
29. DEVRY ECET 105 Week 7 iLab Add-Subtractor using Flip-Flops
NEW
Check this A+ tutorial guideline at
http://www.uopassignments.com/ecet-105-devry/ecet-
105-week-7-ilab-add-subtractor-using-flip-flops-recent
For more classes visit
http://www.uopassignments.com
I. OBJECTIVES
To test the operation of a 74LS74 D flip-flop and compare the
operation with the predicted behavior
To test the operation of a 74LS112 J-K flip-flop and compare the
operation with the predicted behavior
To measure propagation delays of a 74LS112 J-K flip-flop
To build and test an enhanced adder-subtractor
II. PARTS LIST
Equipment:
IBM PC or Compatible with Windows 2000 or Higher
Quartus II Design Software—Version 9.1
Frequency Generator
Oscilloscope
Parts:
2 – 330 Ω resistors, ¼ W 2 – Red LEDs
1 – 74LS74 dual D flip-flop 1 – Green LED
1 – 74LS112 dual J-K flip-flop 1 – SPDT Switch, DIP
configuration
1 – eSOC III FPGA Board
30. III. PROCEDURE
A. Test the 74LS74 D Flip-Flop
Build the D flip-flop circuit shown in Figure 7.1. The LEDs are
wired as active-LOW since the flip-flop can supply more current
in a low state than in a high state. This means that the green
LED is on when is HIGH and the red LED indicates Q is HIGH.
Remember to attach VCC to pin 14 and ground to pin 7.
Using the circuit, verify that the operation follows the truth
table for this device.
What happens when both and are set low?
Build the J-K flip-flop circuit shown in Figure 7.2. Remember to
attach VCC to pin 16 and ground to pin 8.
Using the circuit, verify that the operation follows the truth
table for this device.
Increase the pulse generator output to 1.0 MHz. Set the
switches so that all of the flip-flop inputs are high and remove
the LEDs and resistors. Using the oscilloscope, measure the
propagation times for the Q output from the active clock edge.
Record the value below.
Using Quartus II, modify the circuit from Lab 5 as shown in
Figure 7.3 by adding three 7474 D-flip-flip chips. Note that a
clear function has been added and that the flip-flop presets are
inactive since they are tied to +5V (labeled VCC).
Perform a simulation to verify the correct operation of the
circuit. Note that in this case, the CLOCK signal is not a periodic
signal; the CLOCK signal is a discrete signal occurring on a
switch closure.
Assign pins to the inputs and outputs. Use the DIP switches for
your inputs (0-3 for A, 8-11 for B, 7 for CLEAR, 15 for ADDSUB),
one of the debounced pushbuttons for CLOCK and the red LEDs
for outputs (RD0-4).
31. Download you program to the eSOC III board and test the
operation of the circuit.
Photograph your final circuit for submission (online) or
demonstrate your circuit to your professor (onsite or blended).
Why is the condition when both and are LOW considered
illegal?
How do the values you measured for tPHL and tPLH compare
with values specified in the 74LS112 data sheet? You may need
to go online to find this value.
Why were the LEDs removed before making the propagation
delay measurements?
32. DEVRY ECET 105 Week 7 iLab Add-Subtractor using Flip-Flops
NEW
Check this A+ tutorial guideline at
http://www.uopassignments.com/ecet-105-devry/ecet-
105-week-7-ilab-add-subtractor-using-flip-flops-recent
For more classes visit
http://www.uopassignments.com
I. OBJECTIVES
To test the operation of a 74LS74 D flip-flop and compare the
operation with the predicted behavior
To test the operation of a 74LS112 J-K flip-flop and compare the
operation with the predicted behavior
To measure propagation delays of a 74LS112 J-K flip-flop
To build and test an enhanced adder-subtractor
II. PARTS LIST
Equipment:
IBM PC or Compatible with Windows 2000 or Higher
Quartus II Design Software—Version 9.1
Frequency Generator
Oscilloscope
Parts:
2 – 330 Ω resistors, ¼ W 2 – Red LEDs
1 – 74LS74 dual D flip-flop 1 – Green LED
1 – 74LS112 dual J-K flip-flop 1 – SPDT Switch, DIP
configuration
1 – eSOC III FPGA Board
33. III. PROCEDURE
A. Test the 74LS74 D Flip-Flop
Build the D flip-flop circuit shown in Figure 7.1. The LEDs are
wired as active-LOW since the flip-flop can supply more current
in a low state than in a high state. This means that the green
LED is on when is HIGH and the red LED indicates Q is HIGH.
Remember to attach VCC to pin 14 and ground to pin 7.
Using the circuit, verify that the operation follows the truth
table for this device.
What happens when both and are set low?
Build the J-K flip-flop circuit shown in Figure 7.2. Remember to
attach VCC to pin 16 and ground to pin 8.
Using the circuit, verify that the operation follows the truth
table for this device.
Increase the pulse generator output to 1.0 MHz. Set the
switches so that all of the flip-flop inputs are high and remove
the LEDs and resistors. Using the oscilloscope, measure the
propagation times for the Q output from the active clock edge.
Record the value below.
Using Quartus II, modify the circuit from Lab 5 as shown in
Figure 7.3 by adding three 7474 D-flip-flip chips. Note that a
clear function has been added and that the flip-flop presets are
inactive since they are tied to +5V (labeled VCC).
Perform a simulation to verify the correct operation of the
circuit. Note that in this case, the CLOCK signal is not a periodic
signal; the CLOCK signal is a discrete signal occurring on a
switch closure.
Assign pins to the inputs and outputs. Use the DIP switches for
your inputs (0-3 for A, 8-11 for B, 7 for CLEAR, 15 for ADDSUB),
one of the debounced pushbuttons for CLOCK and the red LEDs
for outputs (RD0-4).
34. Download you program to the eSOC III board and test the
operation of the circuit.
Photograph your final circuit for submission (online) or
demonstrate your circuit to your professor (onsite or blended).
Why is the condition when both and are LOW considered
illegal?
How do the values you measured for tPHL and tPLH compare
with values specified in the 74LS112 data sheet? You may need
to go online to find this value.
Why were the LEDs removed before making the propagation
delay measurements?