NETWORK ANALYSIS AND SYNTHESIS GRAPH THEORY

NETWORK ANALYSIS AND SYNTHESIS
B. Tech EE III Semester
Course Code: BTEEC302
Prepared By
Dr. K Hussain
Associate Professor & Head
Dept. of EE, SITCOE

CONTENTS
• Network Topology: Graph, Tree, Branches, Chords
• Equilibrium Equation on Loop Basis & Node Basis
• Number of Network Equations Required
• Choice between Nodal Analysis & Loop Analysis
• Source Transformation
• Network Mutual Inductance & Dot Conventions
• Concept of Super Mesh & Super Node
• Concept of Duality & Dual Networks

Network Analysis and Synthesis
Graph Theory

Network graph is simply called as graph. It consists of a set of nodes
connected by branches.
Any electric circuit or network can be converted into its equivalent graph by
replacing the passive elements and voltage sources with short circuits and the
current sources with open circuits.
Graph:
That means, the line segments in the graph represent the branches
corresponding to either passive elements or voltage sources of electric circuit.
A branch is a line segment that connects two nodes.
In graphs, a node is a common point of two or more branches. Sometimes,
only a single branch may connect to the node.
Network Topology is concerned with a mathematical discipline known as
graph theory with special reference to electrical circuits.
The 'graph' referred to here is not a conventional graph, but is a
collection of points (nodes) and connecting lines (branches).
5

Example:
Let us consider the
following
electric circuit.
In the above circuit, there are four principal nodes and those are labelled
with 1, 2, 3, and 4.
An equivalent graph corresponding to the
above electric circuit is shown in the
following figure.
There are seven branches in the above circuit, among which one branch
contains a 20 V voltage source, another branch contains a 4 A current source
and the remaining five branches contain resistors having resistances of 30 Ω,
5 Ω, 10 Ω, 10 Ω and 20 Ω respectively
6

In the above graph, there are four nodes and those are labelled
with 1, 2, 3 & 4 respectively. These are same as that of principal
nodes in the electric circuit.
In this case, we got one branch less in the
graph because the 4 A current source is
made as open circuit, while converting the
electric circuit into its equivalent graph.
From this Example, we can conclude the following points:
The number of nodes present in a graph will be equal to the
number of principal nodes present in an electric circuit.
The number of branches present in a graph will be less than
or equal to the number of branches present in an electric
circuit.
There are six branches in the above graph
and those are labelled with a, b, c, d, e & f
respectively.
7

Connected Graph
Unconnected Graph
Directed Graph
Undirected Graph
Connected Graph:
If there exists at least one branch between any of the two nodes
of a graph, then it is called as a connected graph. That means,
each node in the connected graph will be having one or more
branches that are connected to it. So, no node will present as
isolated or separated.
The graph shown in the previous Example (Figure) is
a connected graph. Here, all the nodes are connected by three
branches.
Types of Graphs:
8

Unconnected Graph
If there exists at least one node in the graph that remains
unconnected by even single branch, then it is called as
an unconnected graph. So, there will be one or more isolated
nodes in an unconnected graph.
Consider the graph shown in the following figure.
In this graph, the nodes 2, 3, and 4 are
connected by two branches each. But,
not even a single branch has been
connected to the node 1. So, the node
1 becomes an isolated node. Hence,
the above graph is an unconnected
graph.
9

In the above graph, the direction of current flow is represented
with an arrow in each branch. Hence, it is a directed graph.
Directed Graph
If all the branches of a graph are represented with arrows, then
that graph is called as a directed graph. These arrows indicate
the direction of current flow in each branch. Hence, this graph is
also called as oriented graph.
Consider the graph shown in the
following figure.
10

Undirected Graph
If the branches of a graph are not represented with arrows, then that
graph is called as an undirected graph. Since, there are no directions of
current flow, this graph is also called as an unoriented graph.
The graph that was shown in the first Example is an unoriented graph,
because there are no arrows on the branches of that graph.
Subgraph and its Types
A part of the graph is called as a subgraph. We get subgraphs by
removing some nodes and/or branches of a given graph. So, the number
of branches and/or nodes of a subgraph will be less than that of the
original graph. Hence, we can conclude that a subgraph is a subset of a
graph.
Following are the two types of subgraphs.
Tree
Co-Tree
11

Tree is a connected subgraph of a given graph, which contains all the nodes of
a graph. But, there should not be any loop in that subgraph. The branches of a
tree are called as twigs.
Tree
Consider the following connected subgraph of
the graph, which is shown in the figure.
This connected subgraph contains all the four
nodes of the given graph and there is no loop.
Hence, it is a Tree.
This Tree has only three branches out of six
branches of given graph. Because, if we consider
even single branch of the remaining branches of
the graph, then there will be a loop in the above
connected subgraph. Then, the resultant
connected subgraph will not be a Tree.
From the above Tree, we can conclude that the number of branches that are
present in a Tree should be equal to n - 1 where ‘n’ is the number of nodes of
the given graph.
12

Co-Tree
Co-Tree is a subgraph, which is formed with the branches that are
removed while forming a Tree. Hence, it is called as Complement of a
Tree.
For every Tree, there will be a corresponding Co-Tree and its branches
are called as links or chords. In general, the links are represented with
dotted lines.
The Co-Tree corresponding to the above Tree is shown in the following
figure.
This Co-Tree has only three nodes instead of four nodes of the given
graph, because Node 4 is isolated from the above Co-Tree. Therefore,
the Co-Tree need not be a connected subgraph. This Co-Tree has
three branches and they form a loop.
13

L=B−(N−1)
L=B−N+1
Where,
L is the number of links.
B is the number of branches present in a given graph.
N is the number of nodes present in a given graph.
If we combine a Tree and its corresponding Co-Tree, then we will get
the original graph as shown below.
The Tree branches d, e & f are
represented with solid lines.
The Co-Tree branches a, b & c are
represented with dashed lines.
The number of branches that are present in a co-tree will be equal to
the difference between the number of branches of a given graph and
the number of twigs. Mathematically, it can be written as
14

An N-node network contains a number of trees, each with (N-1) branches; if B is
the number of branches in the network, and L is the number of links in the co-
tree, the relationship between them is B = L + (N - 1)
For example, in a four-node (N = 4), six-branch (B = 6) network, there are a
number of trees each containing (N - 1) = 3 branches, and the number of links in
each co-tree is
L = B - (N - 1) = 6 - (4 - 1) = 3
If we re-position any one of the links from the co-tree in the tree, we will form a
loop in the tree.
Figure: Examples of trees and cotrees within the
graph of figure (b).
Figure: The circuit in
(a) has the graph in (b).
15

Matrices Associated with Network Graphs
Following are the three matrices that are used in Graph theory.
Incidence Matrix
Fundamental Loop Matrix
Fundamental Cut set Matrix
16

Incidence Matrix
An Incidence Matrix represents the graph of a given electric
circuit or network. Hence, it is possible to draw the graph of that
same electric circuit or network from the incidence matrix.
We know that graph consists of a set of nodes and those are
connected by some branches. So, the connecting of branches to
a node is called as incidence.
Incidence matrix is represented with the letter A. It is also called
as node to branch incidence matrix or node incidence matrix.
If there are ‘n’ nodes and ‘b’ branches are present in a directed
graph, then the incidence matrix will have ‘n’ rows and ‘b’
columns. Here, rows and columns are corresponding to the
nodes and branches of a directed graph. Hence, the order of
incidence matrix will be n × b.
17

The elements of incidence matrix will be having one of these
three values, +1, -1 and 0.
If the branch current is leaving from a selected node, then the
value of the element will be +1.
If the branch current is entering towards a selected node, then
the value of the element will be -1.
If the branch current neither enters at a selected node nor leaves
from a selected node, then the value of element will be 0.
Procedure to find Incidence Matrix
Follow these steps in order to find the incidence matrix of
directed graph.
Select a node at a time of the given directed graph and fill the
values of the elements of incidence matrix corresponding to that
node in a row.
Repeat the above step for all the nodes of the given directed
graph. 18

Example: Consider the following directed graph.
The incidence matrix corresponding to the above directed graph
will be
The rows and columns of the above
matrix represents the nodes and
branches of given directed graph.
The order of this incidence matrix is 4 × 6.
By observing the above incidence matrix, we can conclude that
the summation of column elements of incidence matrix is equal
to zero. That means, a branch current leaves from one node and
enters at another single node only.
19

If the given graph is an un-directed type, then convert it into a
directed graph by representing the arrows on each branch of it.
We can consider the arbitrary direction of current flow in each
branch.
Note:
20

Fundamental Loop Matrix
Fundamental loop or f-loop is a loop, which contains only one link
and one or more twigs. So, the number of f-loops will be equal to
the number of links.
graph, then the number of links present in a co-tree, which is
corresponding to the selected tree of given graph will be b-n+1.
So, the fundamental loop matrix will have ‘b-n+1’ rows and ‘b’
columns. Here, rows and columns are corresponding to the links of
co-tree and branches of given graph. Hence, the order of
fundamental loop matrix will be (b - n + 1) × b.
Fundamental loop matrix is represented with letter B. It is also
called as fundamental circuit matrix and Tie-set matrix.
This matrix gives the relation between branch currents and link
currents.
21

The elements of fundamental loop matrix will be having one of these
The value of element will be +1 for the link of selected f-loop.
The value of elements will be 0 for the remaining links and twigs, which
are not part of the selected f-loop.
If the direction of twig current of selected f-loop is same as that of f-
loop link current, then the value of element will be +1.
If the direction of twig current of selected f-loop is opposite to that of f-
loop link current, then the value of element will be -1.
Procedure to find Fundamental Loop Matrix
Follow these steps in order to find the fundamental loop matrix of given
directed graph.
Select a tree of given directed graph.
By including one link at a time, we will get one f-loop. Fill the
values of elements corresponding to this f-loop in a row of
fundamental loop matrix.
Repeat the above step for all links.
22

Example:
Take a look at the following Tree of directed graph, which is
considered for incidence matrix.
The above Tree contains three branches d, e & f.
Hence, the branches a, b & c will be the links of the Co-Tree
corresponding to the above Tree. By including one link at a time to
the above Tree, we will get one f-loop.
So, there will be three f-loops, since there are three links.
These three f-loops are shown in the following figure.
23

In the above figure, the branches, which are represented with
colored lines form f-loops. We will get the row wise element
values of Tie-set matrix from each f-loop.
The rows and columns of the above matrix represents the links
and branches of given directed graph. The order of this incidence
matrix is 3 × 6.
The number of Fundamental loop matrices of a directed graph
will be equal to the number of Trees of that directed graph.
Because, every Tree will be having one Fundamental loop matrix.
So, the Tieset matrix of the above considered Tree will be
24

Fundamental Cut-set Matrix
Fundamental cut set or f-cut set is the minimum number of
branches that are removed from a graph in such a way that the
original graph will become two isolated subgraphs. The f-cut set
contains only one twig and one or more links. So, the number of f-
cut sets will be equal to the number of twigs.
Fundamental cut set matrix is represented with letter C. This
matrix gives the relation between branch voltages and twig
voltages.
graph, then the number of twigs present in a selected Tree of
given graph will be n-1. So, the fundamental cut set matrix will
have ‘n-1’ rows and ‘b’ columns. Here, rows and columns are
corresponding to the twigs of selected tree and branches of given
graph.
Hence, the order of fundamental cut set matrix will be (n-1) × b.
25

The elements of fundamental cut set matrix will be having one of these
The value of element will be +1 for the twig of selected f-cutset.
The value of elements will be 0 for the remaining twigs and links, which
are not part of the selected f-cutset.
If the direction of link current of selected f-cut set is same as that of f-
cutset twig current, then the value of element will be +1.
If the direction of link current of selected f-cut set is opposite to that of f-
cutset twig current, then the value of element will be -1.
Procedure to find Fundamental Cut-set Matrix
Follow these steps in order to find the fundamental cut set matrix of
given directed graph.
Select a Tree of given directed graph and represent the links with
the dotted lines.
By removing one twig and necessary links at a time, we will get one
f-cut set. Fill the values of elements corresponding to this f-cut set in
a row of fundamental cut set matrix.
Repeat the above step for all twigs.
26

Example:
Consider the same directed graph , which we discussed in the
section of incidence matrix. Select the branches d, e & f of this
directed graph as twigs. So, the remaining branches a, b & c of this
directed graph will be the links.
The twigs d, e & f are represented
with solid lines and links a, b & c are
represented with dotted lines in the
following figure.
By removing one twig and necessary links at a time, we will get
one f-cut set. So, there will be three f-cut sets, since there are
three twigs. These three f-cut sets are shown in the following
figure (next slide).
27

These three f-cut sets are shown in the following figure.
We will be having three f-cut sets by removing a set of twig and links of
C1, C2 and C3. We will get the row wise element values of fundamental cut
set matrix from each f-cut set.
So, the fundamental cut set matrix of the above
considered Tree will be
28

The rows and columns of the above matrix represents the twigs and
branches of given directed graph.
The order of this fundamental cut set matrix is 3 × 6.
The number of Fundamental cut set matrices of a directed graph will be
equal to the number of Trees of that directed graph.
Because, every Tree will be having one Fundamental cut set matrix.
29

Solution of Equilibrium Equations
There are two methods of solving equilibrium equations given as
follows.
1. Elimination Method: By eliminating variables until an
equation with a single variable is achieved and then by the
method of substitution.
2. Determinant Method: By the method known as Cramer’s
rule.

The student is expected to understand the following at the
end of the lesson.
• Use KVL at meshes or loops to formulate circuit equations.
• Create matrix from circuit equations.
• Solve for Unknown Mesh Currents using Cramer's Rule.
Cramer’s Rule

Example 1: Determine the currents I1 and I2 for the given circuit by using
Cramer’s rule.
Solution:
First, rearrange the circuit with proper
labels.
Apply Mesh Analysis and Simplify by Cramer’s Rule to find the unknown values
of Currents i1 and i2.
Now, we will write the KVL equations of
unknown values for the given circuit
Apply KVL on Mesh (1).
6 = 14i1 + 10(i1–i2)
6 = 24i1 – 10i2 ….. → Eq (1)

Also, Apply KVL on Mesh (2).
-5 = 10 i2 + 10(i2 – i1)
-5 = – 10 i1 + 20 i2 ….. → Eq (2)
Here, we got two equations, i.e.,
24 i1 – 10 i2 = 6
– 10 i1 + 20 i2 = -5
Now, we will solve these two equations by
Cramer’s rule to find the unknown values
(of currents), which are i1 and i2.
Solving by Cramer’s rule:
Step 1:
First of all, write the above equations in the matrix form. i.e.,
Step 2:
Now, write the coefficient matrix of the above equations and call it ∆. Make
sure it is square, i.e., Number of Rows x Number of Columns.

Step 3:
Now find the determinant |∆| of the coefficient matrix ∆ by the following
method.
Step 4:
Now find the coefficient determinant of Δ1 by the same method as mentioned
above, but replace the first column of Δ with the “Answer column”

Step 5:
Now find the coefficient determinant of Δ2, just replace the second column with
the “Answer Column” which is,
Step 6:
As Cramer’s rule tells that i1= Δ1 / Δ and i2 = Δ2 / Δ.
Now, Find i1 and i2 by Cramer’s rule.
i1= 0.1842 A or 184.2 mA
and
i2 = 0.1579 A or 157.9 mA

Example 2: Use Mesh Analysis to determine the three mesh currents in the
circuit below. Use Cramer’s rule for simplification.
Solution:
First of all, apply the KVL on each mesh one by
one, and write its equations.
-7+1(i1–i2) +6+2(i1–i3) = 0
1(i2– i1) + 2i2 + 3(i2– i3) = 0
2(i3– i1) – 6+3(i3– i2) +1i3 = 0
Simplifying,
3i1 – i2 – 2i3 = 1 … Eq….. (1)
– i1 + 6i2 – 3i3 = 0 … Eq….. (2)
-2i1 – 3i2 + 6i3 = 6 … Eq….. (3)
Now, write the above equations in the matrix form.
3i1– i2– 2i3 = 1
–i1+ 6i2– 3i3 = 0
-2i1– 3i2+ 6i3 = 6

Now, we will find the coefficient determinant of ∆.
∆ = [+3 (6 x 6) – (- 3 x –3)] – (-1) [(-1 x 6)-(-2 x –3)] + (-2) [(-1 x –3) – (-2 x 6)]
∆ = 81 -12 -30 = 39
Now, find the ∆1 by the same way as explained above. But, just replace the first
column of the matrix with the “Answer Column”.
= +1(36-9) – (–1)(0+18) +(–2)(0-36) = 27 + 18 + 72
∆1 = 117

= +3 (0 +18) -1[(-6)-(+6)] –2(-6-0)
= 54+12+12 = 78
∆2 = 78
Finally, find the last ∆3. Just replace the third column with the “Answer column”
= +3 [(6 x 6) – (-3 x 0)] – (-1)[(-1 x 6) – (-2 x 0)] + 1[(-1) x (-3) – (-2) x (6)]
= 108 + 6 + 15
∆3 = 117
Again, find the ∆2 with the same method as explained earlier.
Just replace the second column of the matrix with the “Answer column”

Now, solve and find the unknown values of current,
i.e. i1, i2 and i3.
Therefore,
i1 = ∆1/∆= 117/39
i1 = 3A
and i2,
i2 = = ∆2/∆ = 78/39
i2 = 2A
And finally, i3;
i3 = ∆3/∆ = 117/39
i3 = 3A.
As, Cramer’s rule says that, variables i.e.,
i1 = ∆1/∆1, i2 = ∆2/∆ and i3 = ∆3/∆

Methods of Analysis
42
• Nodal analysis
• Mesh analysis
• Nodal and mesh analyses by inspection
• Nodal versus mesh analysis

Nodal Analysis
• Steps to Determine Node Voltages:
1. Select a node as the reference node. Assign
voltage v1, v2, …vn-1 to the remaining n-1 nodes.
The voltages are referenced with respect to the
reference node.
2. Apply KCL to each of the n-1 nonreference nodes.
Use Ohm’s law to express the branch currents in
terms of node voltages.
3. Solve the resulting simultaneous equations to
obtain the unknown node voltages.
43

Figure 1
44
Common symbols for indicating a reference node,
(a) common ground, (b) ground, (c) chassis.

Figure 2
45
Typical circuit for nodal analysis

46
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47
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Example 1
• Calculate the node voltage in the circuit shown in Fig. (a)
48

Example 1
• At node 1
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• At node 2
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Example 1
• In matrix form:
51
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Example 2
• Determine the voltage at the nodes in Fig. (a)
53

Example 2
• At node 1,
54
24
3
3
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1
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Example 2
• At node 2
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0
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Example 2
• At node 3
56
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2
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Example 2
• In matrix form:
57

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Nodal Analysis with Voltage Sources
• Case 1: The voltage source is connected
between a nonreference node and the
reference node: The nonreference node
voltage is equal to the magnitude of voltage
source and the number of unknown
nonreference nodes is reduced by one.
• Case 2: The voltage source is connected
between two nonreferenced nodes: a
generalized node (supernode) is formed.
58

Nodal Analysis with Voltage Sources
5
6
0
8
0
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59
Fig. A circuit with a supernode.

• A supernode is formed by enclosing a (dependent
or independent) voltage source connected
between two nonreference nodes and any
elements connected in parallel with it.
• The required two equations for regulating the
two nonreference node voltages are obtained by
the KCL of the supernode and the relationship of
node voltages due to the voltage source.
60

Example 3
• For the circuit shown in Fig, find the node
voltages.
1 2
1 2
1 2
2 7 0
2 7 0
2 4
2
i i
v v
v v
   
   
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61
i1 i2

Example 4
62
Find the node voltages in the circuit of Fig.

Example 4
• At suopernode 1-2,
63
20
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10
6
21
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Example 4
• At supernode 3-4,
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Mesh Analysis
• Mesh analysis: another procedure for
analyzing circuits, applicable to planar circuit.
• A Mesh is a loop which does not contain any
other loops within it
65

• Steps to Determine Mesh Currents:
1. Assign mesh currents i1, i2, .., in to the n meshes.
2. Apply KVL to each of the n meshes. Use Ohm’s
law to express the voltages in terms of the mesh
currents.
3. Solve the resulting n simultaneous equations to
get the mesh currents.
66

• Apply KVL to each mesh. For mesh 1,
• For mesh 2,
68
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


• Solve for the mesh currents.
• Use i for a mesh current and I for a branch
current. It’s evident from Fig. that
69
















2
1
2
1
323
331
V
V
i
i
RRR
RRR
2132211 ,, iiIiIiI 

Example 5
• Find the branch current I1, I2, and I3 using
mesh analysis.
70

Example 5
• For mesh 1,
• For mesh 2,
• We can find i1 and i2 by substitution method
or Cramer’s rule. Then,
71
123
010)(10515
21
211


ii
iii
12
010)(1046
21
1222


ii
iiii
2132211 ,, iiIiIiI 
1 2
1 2
1
2
3 2 1
2 1
1
2
i i
i i
Solving
two equations
i
i
 
  



Example 6
• Use mesh analysis to find the current I0 in the
circuit of Fig.
72

Example 6
• Apply KVL to each mesh. For mesh 1,
• For mesh 2,
73
126511
0)(12)(1024
321
3121


iii
iiii
02195
0)(10)(424
321
12322


iii
iiiii

Example 6
• For mesh 3,
• In matrix from Eqs. (1) to (3) become
we can calculate i1, i2 and i3 by Cramer’s rule,
and find I0.
74
02
0)(4)(12)(4
,A,nodeAt
0)(4)(124
321
231321
210
23130




iii
iiiiii
iII
iiiiI




























0
0
12
211
2195
6511
3
2
1
i
i
i

Nodal and Mesh Analysis by Inspection
75
(a)For circuits with only resistors and
independent current sources
(b)For planar circuits with only resistors and
independent voltage sources
The analysis equations can be
obtained by direct inspection

• In the Fig. (a), the circuit has two non-
reference nodes and the node equations
76





 

















2
21
2
1
322
221
232122
2121121
)(
)(
I
II
v
v
GGG
GGG
MATRIX
vGvvGI
vvGvGII

• In general, the node voltage equations in
terms of the conductances is
77





































NNNNNN
N
N
i
i
i
v
v
v
GGG
GGG
GGG





2
1
2
1
21
22221
11211
or simply
Gv = i
where G : the conductance matrix,
v : the output vector, i : the input vector

• The circuit has two nonreference nodes and
the node equations were derived as
78
















2
1
2
1
323
331
v
v
i
i
RRR
RRR

• In general, if the circuit has N meshes, the
mesh-current equations as the resistances
term is
79





































NNNNNN
N
N
v
v
v
i
i
i
RRR
RRR
RRR





2
1
2
1
21
22221
11211
or simply
Rv = i
where R : the resistance matrix,
i : the output vector, v : the input vector

Nodal Versus Mesh Analysis
• Both nodal and mesh analyses provide a systematic
way of analyzing a complex network.
• The choice of the better method dictated by two
factors.
– First factor : nature of the particular network. The key is to
select the method that results in the smaller number of
equations.
– Second factor : information required.
80

Supermesh Currents
On occasion there will be current sources in the network to which mesh
analysis is to be applied.
In such cases one can convert the current source to a voltage source (if a
parallel resistor is present) and proceed as before or utilize a supermesh
current and proceed as follows.
Start as before and assign a mesh current to each independent loop,
including the current sources, as if they were resistors or voltage sources.
Then mentally (redraw the network if necessary) remove the current
sources (replace with open-circuit equivalents), and apply Kirchhoff’s
voltage law to all the remaining independent paths of the network using
the mesh currents just defined.
Any resulting path, including two or more mesh currents, is said to be the
path of a supermesh current.
Then relate the chosen mesh currents of the network to the independent
current sources of the network, and solve for the mesh currents.

Q. Using mesh analysis, determine the currents of the network
of Fig.
Solution:
First, the mesh currents for the
network are defined, as shown in
Fig.(a)
Then the current source is mentally removed,
as shown in Fig. (b), and Kirchhoff’s voltage law is applied to
the resulting network.
The single path now including the effects
of two mesh currents is referred to as the
path of a supermesh current.
Applying Kirchhoff’s law:
Fig (b) Defining the supermesh current
Fig (a) Defining the mesh currents for the
network of Fig.

In the above analysis, it might appear that when the current source was
removed, I1 =I2.
However, the supermesh approach requires that we stick with the original
definition of each mesh current and not alter those definitions when
current sources are removed.
and
Applying determinants:
The result is two equations and two unknowns:
Node a is then used to relate the mesh currents and the current source
using Kirchhoff’s current law:

Supernode:
On occasion there will be independent voltage sources in the network to
which nodal analysis is to be applied.
In such cases we can convert the voltage source to a current source (if a
series resistor is present) and proceed as before, or we can introduce the
concept of a supernode and proceed as follows.
Start as before and assign a nodal voltage to each independent node of
the network, including each independent voltage source as if it were a
resistor or current source.
Then mentally replace the independent voltage sources with short-circuit
equivalents, and apply Kirchhoff’s current law to the defined nodes of the
network.
Any node including the effect of elements tied only to other nodes is
referred to as a supernode (since it has an additional number of terms).
Finally, relate the defined nodes to the independent voltage sources of the
network, and solve for the nodal voltages.

Determine the nodal voltages V1 and V2 of Fig. 2 using the
concept of a supernode.
Example 2:
Solution:
Replacing the independent voltage source of 12 V with a
short-circuit equivalent will result in the network of Fig. 2.
The result is a single
supernode for which Kirchhoff’s
current law must be applied.
Be sure to leave the other
defined nodes in place and use
them to define the currents
from that region of the network.

In particular, note that the current I3 will leave the supernode
at V1 and then enter the same supernode at V2.
It must therefore appear twice when applying Kirchhoff’s
current law, as shown below:
Then
and

Relating the defined nodal voltages to the independent
voltage source, we have
which results in two equations and two unknowns:
Substituting:
So that
and

The current of the network can then be determined as follows:
A careful examination of the network at the beginning of the
analysis would have revealed that the voltage across the
resistor R3 must be 12 V and I3 must be equal to 1.2 A.

Star-Delta Transformation

Wye-Delta Transformations
Situations often arise in circuit analysis when the resistors are neither in
parallel nor in series.
They are used in three-phase networks, electrical filters, and matching
networks.
Our main interest here is in how to identify them when they occur as
part of a network and how to apply wye-delta transformation in the
analysis of that network.
Figure 2
Two forms of the same network: (a)  , (b) .
Figure 1
Two forms of the same network: (a) Y,
(b) T.
Example: Circuit with neither Parallel nor
Series

Delta to Wye
ConversionSuppose it is more convenient to work with a wye network in a place
where the circuit contains a delta configuration. We superimpose a
wye network on the existing delta network and find the equivalent
resistances in the wye network.
To obtain the equivalent resistances in the wye network, we compare
the two networks and make sure that the resistance between each pair
of nodes in the  (or  ) network is the same as the resistance between
the same pair of nodes in the Y (or T) network.
For terminals 1 and 2 in Figs. (1) and (2), for
example,
(1
)
(2a
)

(2b
)
(2c
)
(3)
Similarly
Subtracting Eq. (2c) from Eq. (2a), we
get
Adding Eqs. 2(b) and (3) gives
and subtracting Eq. (3) from Eq. (2b) yields
Subtracting Eq. (4) from Eq. (2a), we obtain
(4)
(5)
(6)

We do not need to memorize Eqs. (4) to (6). To transform
a network to Y, we create an extra node n as shown in Fig.
3 and follow this conversion rule:
Each resistor in the Y network is the product of the
resistors in the two adjacent  branches, divided by the
sum of the three  resistors.
One can follow this rule and obtain Eqs. (4) to (6) from Fig.
3.
Fig. 3

Wye to Delta Conversion
To obtain the conversion formulas for transforming a wye
network to an equivalent delta network, we note from Eqs.
(4) to (6) that
Dividing Eq. (7) by each of Eqs. (4) to (6) leads to the
following equations:
(7)
(8)
(9)
(10)

From Eqs. (8) to (10) and Fig. 3, the conversion rule for Y to  is as
follows:
Each resistor in the  network is the sum of all possible products
of Y resistors taken two at a time, divided by the opposite Y
resistor.
The Y and  networks are said to be balanced when
Under these conditions, conversion formulas become
(11)
(12)

Solution
:
Using Eqs. (4) to (6), we obtain
The equivalent Y network is shown in Fig.
(b).
Figure : (a) original  network
Example: Convert the  network in Fig. (a) to an equivalent Y network.
Figure : (b) Y equivalent

For the bridge network in Fig.(a), find Rab and i.Problem:
Solutio
n:
This circuit is either parallel nor series.
So use star-Delta transformation in the
circuit.
In this circuit, we are going to convert
star in to delta (shown in fig 2)

ohmsRa
35
50
1700
50
20*5050*1010*20



ohmsRb
170
10
1700
10
20*5050*1010*20



ohmsRc
85
20
1700
20
20*5050*1010*20



After finding these values, then the circuit will
be
24 ohms and Ra are in parallel, then
30 ohms and Rb are in parallel, then
ohms2372.14
59
840
59
35*24

ohms5.25
200
5100
200
170*30

14.2372 ohms and 25.5 ohms are in series, then eq. value= 39.2372
ohms

Then the circuit becomes
240V 39.7272 85
13
The resistances 39.7372 and
85 are in parallel, then the eq.
value is
ohms07828.27
857372.39
85*7372.39



Then the circuit becomes 240V 27.07828
13
Therefore,
The Total resistance= 13+27.07828=40.07828
ohms
The current = I
=
AmpsAmps 6988.5
07828.40
240


Magnetic Circuits & Dot Convention

• MAGNETIC CIRCUITS
• FARADAY’S LAWS
• SELF AND MUTUAL INDUCTANCE
• COUPLING COEFFICIENT (K)
• DOT CONVENTION
101
CONTENTS

• To understand the basic concept of self inductance
and mutual inductance.
• To understand the concept of coupling coefficient
and dot convention determination in circuit analysis.
102
OBJECTIVES

MAGNETIC CIRCUITS
Electrical current flowing along a wire creates a magnetic field
around the wire, as shown in Fig.
The direction of that field that can be determined using the
“right hand rule”.
That magnetic field can be visualized by showing lines of
magnetic flux, which are represented with the symbol .

• Faraday discovered is that current flowing through the coil not
only creates a magnetic field in the iron, it also creates a
voltage across the coil that is proportional to the rate of change
of magnetic flux  in the iron.
Faraday’s law of electromagnetic induction:
• The sign of the induced emf is always in a direction that
opposes the current that created it, a phenomenon referred to
as Lenz’s law.
• That voltage is called an electromotive force, or emf, and is
designated by the symbol e.

• In the magnetic circuit of Fig, the driving force, analogous to
voltage, is called the magneto motive force (mmf), designated by
F.
Magneto motive force (mmf )F = Ni (ampere − turns)
• The magneto motive force is created by wrapping N turns of
wire, carrying current i.

• The magnetic flux is proportional to the mmf driving force and
inversely proportional to a quantity called reluctance R, which is
analogous to electrical resistance, resulting in the “Ohm’s law” of
magnetic circuits given by

Magnetic Field Intensity (H):
With N turns of wire carrying current i, the mmf created in the
circuit is Ni ampere-turns.
With l representing the mean path length for the magnetic
flux, the magnetic field intensity is

Comparison between Electric Circuit and Magnetic Circuit

First Law: EMF is induced in a coil whenever magnetic field linking
that coil is changed.
Lenz’s Law: This law states that the induced EMF due to
change of flux linkage by a coil will produce a current in the
coil in such a direction that it will produce a magnetic field
which will oppose the cause, that is the change in flux
linkage.
Second Law: The magnitude of the induced EMF is
proportional to the rate of change of flux linkage.
Faraday’s Laws

• When two loops with or without contacts between them affect
each other through the magnetic field generated by one of
them, is called magnetically coupled.
113
SELF AND MUTUAL INDUCTANCE
Example: Transformer
An electrical device designed on the basis of the
concept of magnetic coupling.
Used magnetically coupled coils to transfer energy
from one circuit to another.

• It is called self inductance because it relates the voltage induced
in a coil by a time varying current in the same coil.
114
Self Inductance
i(t)
Φ
+
V
_
Fig. 1
• Consider a single inductor with N number of turns when
current,
i flows through the coil, a magnetic flux,  is produces
around it.

• According to Faraday’s Law, the voltage, v induced in the coil is
proportional to N number of turns and rate of change of the
magnetic flux, ;
)1.......(
dt
d
Nv


)2.......(
dt
di
di
d
dt
d 

115
But a change in the flux  is caused by a change in
current, i.
Hence;

Thus, (2) into (1) yields;
)4.......(
or
)3.......(
dt
di
Lv
dt
di
di
d
Nv



  )5........(H
di
d
NL


116
The unit is in Henrys (H)
From equation (3) and (4), the self inductance L is defined
as;

• When two inductors or coils are in close proximity to each other,
magnetic flux caused by current in one coil links with the other
coil, therefore producing the induced voltage.
117
Mutual Inductance
• Mutual inductance is the ability of one inductor to induce a
voltage across a neighboring inductor.

• Case 1:
Two coil with self – inductance L1 and L2 which are in close
proximity which each other (Fig. 2). Coil 1 has N1 turns, while coil
2 has N2 turns.
118
i1(t)
Φ12+
V1
_
+
V2
_
Φ11
L2L1
N1 turns N2 turns
Fig. 2
Consider the following two cases:

• Magnetic flux 1 from coil 1 has two components;
* 11 links only coil 1.
*  12 links both coils.
)7.......(1
1
1
1
11
11
dt
di
L
dt
di
di
d
Nv 

119
Thus; Voltage induces in coil 1
Hence; 1 = 11 + 12
……. (6)

Voltage induces in coil 2
)8.......(1
21
1
1
12
22
dt
di
M
dt
di
di
d
Nv 

120
Subscript 21 in M21
means the mutual
inductance on coil 2
due to coil 1

• Case 2:
Same circuit but let current i2 flow in coil 2.
121
i2(t)
Φ21+
V1
_
+
V2
_Φ22
L2L1
N1 turns N2 turns
Fig. 3
The magnetic flux 2 from coil 2 has two components:
*22 links only coil 2.
* 21 links both coils.
Hence; 2 = 21 + 22 …….
(9)

Thus;
Voltage induced in coil 2
)10.......(2
2
2
2
22
22
dt
di
L
dt
di
di
d
Nv 

)11.......(2
12
2
2
21
11
dt
di
M
dt
di
di
d
Nv 

122
Subscript 12 in M12
means the Mutual
Inductance on coil 1
due to coil 2
Voltage induced in coil 1

The EMF induced in a coil due to change in flux linkage
when a changing current flows through the coil is called self-
induced EMF.
When a second coil is brought near a coil producing
changing flux, EMF will be induced in the second coil due to
change in current in the first coil. This is called mutually
induced EMF.
Self-induced EMF and Mutually induced EMF

Self-Inductance of a Coil
L is called the coefficient of self inductance or simply self inductance of the coil.

Mutual Inductance
Consider two coils having N1 and N2 number of turns placed near each
other as shown in Fig.
(1)

Similarly, if we calculate the induced EMF in coil 1, due to change in current
in coil 2, we can find the induced EMF e1 in coil 1 as
Now, multiplying the expression for M as in (1) and (2) above,
(2)

• Since the two circuits and two current are the same:
MMM  1221
128
• Mutual inductance M is measured in Henrys (H)

• It is measure of the magnetic coupling between two coils.
129
COUPLING COEFFICIENT (k)
Range of k: 0 ≤ k ≤ 1
•k = 1 means the two coils are PERFECTLY
COUPLED.
•k > 0.5 means the two coils are TIGHTLY
COUPLED.
•k < 0.5 means the two coils are LOOSELY
COUPLED.
•k = 0 means the two coils are NOT
COUPLED.

• k depends on the closeness of two coils, their core, their
orientation and their winding.
21LL
M
k 
21LLkM 
130
The coefficient of coupling, k is given by;
OR

• Required to determine polarity of “mutual” induced voltage.
131
DOT CONVENTION
• A dot is placed in the circuit at one end of each of the two
magnetically coupled coils to indicate the direction of the
magnetic flux if current enters that dotted terminal of the
coil.

132
Φ12
Φ21
Φ22Φ11
Coil 2Coil 1

• Dot Convention is stated as follows:
133
If a current LEAVES the dotted terminal of one coil, the
reference polarity of the mutual voltage in the second coil is
NEGATIVE at the dotted terminal of the second coil.
If a current ENTERS the dotted terminal of one coil, the
reference polarity of the mutual voltage in the second coil is
POSITIVE at the dotted terminal of the second coil.
OR

The following dot rule may be used:
134
ii. if one current enters by a dotted terminals while the
other leaves by a dotted terminal, the sign on the M –
terms will be opposite to the signs on the L – terms.
i. when the assumed currents both entered or both leaves
a pair of couple coils by the dotted terminals, the signs
on the M-terms will be same as L – terms.

Example 1:
135
i1(t)
+
V1
_
+
V2 (t) = M di1/dt
_
L2
L1
M
Once the polarity of the mutual voltage is already known, the
circuit can be analyzed using mesh method.
Application of the dot convention:
The sign of the mutual voltage v2 is determined by the
reference polarity for v2 and the direction of i1.
Since i1 enters the dotted terminal of coil 1 and v2 is positive
at the dotted terminal of coil 2, the mutual voltage is M di1/dt.

• Example 2:
136
i1(t)
+
V1
_
+
V2 (t) = -M di1/dt
_
L2
L1
M
Current i1 enters the dotted terminal of coil 1 and v2 is
negative at the dotted terminal of coil 2.
The mutual voltage is –Mdi1/dt

• Same reasoning applies to the coil in example 3 and
example 4.
• Example 3:
• Example 4:
137
i2(t)
+
V1= -M di2/dt
_
+
V2 (t)
_
L2
L1
M
i2(t)
+
V1= M di2/dt
_
+
V2 (t)
_
L2
L1
M

138
Dot Convention for coils in series
MLLL 221 
MLLL 221 
i
L2L1
M
i
(+)
i
L2L1
M
i
(-)
Series –
Aiding
connection
Series –
Opposing
connection

Example :The total inductance of two coils connected in series
cumulatively is 1.6H and connected differentially is 0.4H. The self
inductance of one coil is 0.6H. Calculate (a) the mutual inductance and (b)
the coupling coefficient.
Solution:
Given,
Subtract second eqn. from first eqn.
Substitute L1 and M values in any one of the eqns.
Substitute L1, L2 and M values in M eqn.

Network Analysis & Synthesis
Duality & Dual Networks

The duality principle asserts a parallelism between pairs of
characterizing equations and theorems of electric circuits.
The concept of duality is a time-saving, effort-effective
measure of solving circuit problems.
The two equations are the same, except that we must
interchange the following quantities: (1) voltage and current,
(2) resistance and conductance, (3) capacitance and
inductance.
Thus, it sometimes occurs in circuit analysis that two
different circuits have the same equations and solutions,
except that the roles of certain complementary elements are
interchanged. This interchangeability is known as the
principle of duality.
Duality

TABLE Dual Pairs
Resistance R Conductance G
Inductance L Capacitance C
Voltage V Current i
Voltage source Current source
Node Mesh
Series path Parallel path
Open circuit Short circuit
KVL KCL
Thevenin Norton
The usefulness of the duality principle is self-evident. Once
we know the solution to one circuit, we automatically have
the solution for the dual circuit.
To find the dual of a given circuit, we do not need to write
down the mesh or node equations.
We can use a graphical technique.

Given a planar circuit, we construct the dual circuit by taking
the following three steps:
1. Place a node at the center of each mesh of the given
circuit. Place the reference node (the ground) of the dual
circuit outside the given circuit.
2. Draw lines between the nodes such that each line
crosses an element. Replace that element by its dual.
3. To determine the polarity of voltage sources and
direction of current sources, follow this rule:
A voltage source that produces a positive (clockwise) mesh
current has as its dual a current source whose reference
direction is from the ground to the nonreference node.

In case of doubt, one may verify the dual circuit by writing the nodal or
mesh equations.
The mesh (or nodal) equations of the original circuit are similar to the
nodal (or mesh) equations of the dual circuit.
The duality principle is illustrated with the following two examples.
Example 1: Construct the dual of the circuit
in Fig.(a)
Solution:
As shown in Fig. (a), we first locate nodes 1 and
2 in the two meshes and also the ground node 0
for the dual circuit. We draw a line between one
node and another crossing an element.
We replace the line joining the nodes by the duals
of the elements which it crosses.
For example, a line between nodes 1 and 2 crosses a 2-H inductor, and
we place a 2-F capacitor (an inductor’s dual) on the line.
Fig. (a)

A line between nodes 1 and 0 crossing the 6-V voltage source will
contain a 6-A current source.
By drawing lines crossing all the elements, we construct the dual circuit
on the given circuit as in Fig. (a).
The dual circuit is redrawn in Fig. (b) for clarity.
Figure (a) Construction of the dual
circuit of Fig.
Figure (b) Dual circuit redrawn

Practice Problem
Draw the dual circuit of the one in Fig.(a)
Figure (a) For Practice
Problem
Figure (b) Dual of the circuit in Fig. (a)

Example 2: Obtain the dual of the circuit in Fig.
Solution:
The dual circuit is constructed on
the original circuit as in Fig.
We first locate nodes 1 to 3 and the reference node 0. Joining nodes 1 and
2, we cross the 2-F capacitor, which is replaced by a 2-H inductor.
Joining nodes 2 and 3, we cross the resistor, which is replaced by a resistor.
We keep doing this until all the elements are crossed.
The result is in Fig. (a). The dual circuit is redrawn in Fig. (b).

Figure For Example: (a) construction of the dual circuit of Fig. (b) dual circuit
redrawn.
To verify the polarity of the voltage source and the direction of the current
source, we may apply mesh currents and (all in the clockwise direction) in the
original circuit in Fig.
The 10-V voltage source produces positive mesh current so that its dual is a
10-A current source directed from 0 to 1. Also, in Fig. has as its dual v3 3 V in
Fig. (b).

Practice Problem
For the circuit in Fig., obtain the dual circuit.
Figure (a) For Practice
Problem
Figure (b) Dual of the circuit in Fig. (a)

NETWORK ANALYSIS AND SYNTHESIS GRAPH THEORY

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