When manufacturing higher technology circuit boards, there are many variables that could increase the costs of your parts or increase the lead time. The goal of this webinar is to demonstrate how design choices add cost and time to the manufacturing process of printed circuit boards. While we all understand that hi-speed/high technology PCBs need to have these complex features in order to deliver their intended result,in many cases these features can be left out during the development and prototype stages in order to help the designer prove out ideas quicker. In this webinar, our goal is to help everyone understand what to expect in terms of delivery time for features,such as the material selection, vias, castellated edges, and embedded resistors that they incorporate into their circuit boards. For more information on our printed circuit board solutions,visit http://www.epectec.com/pcb/.

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04.24.2020
How PCB Design Choices Affect Overall
Cost From Your PCB Fabricator

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Agenda
 Intro – HDI PCBs
 Via Types – How they are made
 Filled Vias – It’s more complicated than it looks
 Castellated Edges/Half Plated Holes
 Cavities, Air Pockets, and Heat Sinks
 Hybrids – PCBs with mixed dielectrics
 Materials – Type and other factors
 Inspection AS9100 – What it takes
 Summary

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HDI Printed Circuit Boards

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HDI – High Density Interconnect PCB
 HDI is a PCB with a higher wiring density
per area, finer lines and spacing, smaller
vias, higher aspect ratios, and pads than
conventional PCBs.
 HDI boards contain blind and/or buried
vias and often contain microvias of
0.006” or less in diameter.
 To produce HDI boards, investment in
laser direct imaging, laser drilling,
vacuum controlled pressure plugging,
alkaline permanganate desmear, and
advanced planarization equipment is a
must.

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Via Types

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Via Types
 Need Laser Drilling Equipment to accurately control the depth of the
hole with such a small diameter.

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Via – Definitions
 IPC definition of a microvia = a hole with an aspect ratio of 1:1
– They usually are:
1. Filled with epoxy resin (b-stage) during a sequential lamination process step.
2. Filled with non-conductive or conductive material other than copper as a
separate processing step.
3. Plated closed with electroplated copper.
4. Screen printed closed with a copper paste.
 A stacked microvia is usually filled with electroplated copper to make
electrical interconnections between multiple HDI layers and provide
structural support for the outer level(s) of the microvia or for a
component mounted on the outermost copper pad.

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Lamination Cycles
Every buried or
stacked via requires
a lamination cycle.
Think Delivery…
75% Processes Every Time
2
Hours
1
Hour

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Blind and Buried Vias
 It’s all about lamination and plating cycles.
 6 Layer Example:
– Each Cycle Requires
• Drill & Hole Prep
• Plate
• Deburr
• Via Fill
• Image/Etch/AOI
• Repeat
– Standard 6 Layer
• Image/Etch/AOI (A)
• Laminate
• Drill
1
2
2
3
A
A

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Blind versus Buried
 3 sets of blind vias
 Only one lamination cycle
 Control depth laser drill
 One exception
– Dissimilar laminates
 Buried, staggered, or stacked vias
all require more lamination cycles.

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Filled Vias
 It’s more complicated than you think…

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Old School
 Many companies still use these
methods today.

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Processes Needed – 3 ways
 Drilling of only the vias that
need filling
 Cleaning: plasma and brushing
 Electroless copper
 Apply dry resist
 Imaging of ONLY the via holes
 Electrolytic plating
 Strip dry resist
 Baking: 150°C for 2 hours
 Via plugging with resin
 Baking: 150°C for 1.5 hours
 Planarize the panel
 Drilling the remainder of the
holes
 Cleaning: plasma and brushing
 Electroless copper
 Apply dry resist
 Imaging of ONLY the via holes
 Electrolytic plating
 Drilling of all vias
 Cleaning: plasma and brushing
 Electroless copper
 Electrolytic plating
 Baking: 150°C for 2 hours
 Build a fixture so to only fill the
holes that need filling
 Via plugging with resin
 Baking: 150°C for 1.5 hours
 Planarize the panel
 Electroless copper
 Apply dry resist
 Imaging of the circuitry
 Electrolytic plating
 Drilling of all vias
 Cleaning: plasma and brushing
 Electroless copper
 Electrolytic plating
 Baking: 150°C for 2 hours
 Fluid nozzle fill of only the
holes – Requires CNC
programming
 Via plugging with resin
 Baking: 150°C for 1.5 hours
 Planarize the panel
 Electroless copper
 Apply dry resist
 Imaging of the circuitry
 Electrolytic plating
 All 3 add at least 6-8 hours

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Proper Filled Vias
 >10 mil vias – Easy to Fill
 <10 mil vias – Easier to Plate Shut

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Castellated Edges/Half Plated Holes

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Castellated Edges/Half Plated Holes
 The process is very specialized, and
everyone thinks that they have a secret
sauce.
 Pre-Plate Route
 Feeds and Speeds
 Tool Sharpness
 Customers need to specify what is
acceptable.

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What happens if you try and go cheap?
 You can’t just plate a standard PTH and then try and mechanically
rout through the plating or this happens.

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Cavities, Air Pockets, and Heat Sinks

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 Required tight tolerance machining
 Traditional PCB CNC equipment is
not suitable for controlled depth
tight tolerance machining.
 OR – no flow pre-preg, which
requires intricate machining
 How to help?
– Specify a radius
– Minimize 90% edges on internal
features
Cavities and Air Pockets

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Heat Sinks
 Heat sink made separate
 Attach using no flow precut prepreg
 Need a lamination press
 How to help?
– Work with your fabricator when
choosing the type of prepreg to be
used
– Make sure that your heat sink and
your PCB laminate can withstand
the temperature of lamination

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Hybrid PCBs

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Hybrid PCBs
 2 different materials in the same stack-up.

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Materials

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Materials
 Many Choices
– FR-4 (Epoxy)
– PTFE
– Ceramic
– Polyimide
– PTFE/Glass
– Hydrocarbon/Ceramic
– High Temp FR-4
– FR-4/Phenolic
 Copper Weight
 Weave Type

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IPC-4101 – Slash Sheet
 Gives your fabricator flexibility

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Inspection AS9100

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AS9100 Inspection - Bubble Drawing
Is it really needed?

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AS9100 Inspection
 InspectionXpert Software
 Balloon your part drawings and extract the characteristics in one step.
Your tolerances are automatically applied, and the spec limits are
calculated.
 Reduces time and cost to complete AS9100 reports and improves
accuracy.
 Import the CMM data into a project and have the measurement results
auto-assign to the corresponding feature. Then publish the data
directly to your inspection report.

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A few more things to know….
 Teflon – Drill hit counts reduce 50% (additional cost)
 PTFE – Needs to be in press soon after etch (can’t sit overnight)
 ENEPIG – Most fabricators outsource this (adds time)
– Very expensive and plates out without enough use
 Embedded Resistors – Bigger is better for tolerance
– 25 Ohm material – with a +/-1 mil etch tolerance
• 10 mil x 10 mil: 9/11 x 25 = 20.45 Ohms
• 100 mil x 100 mil: 99/101 x 25 = 24.8 Ohms

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Summary

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Summary
 Design choices factor into the cost and
delivery of PCBs.
 Not all vias are the same.
 Material choices – anything just not
everything
 When delivery is paramount – can you
make it easier.
 Working with your fabricator EARLY is
critical in meeting all your cost and
delivery targets.

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Upcoming Webinars
 Go to…
https://www.epectec.com/webinar/
– May 29th
• Do You Really Need Lithium or Will
Nickel Metal Hydride Suffice?
– August – TBD
– November 20th
• Reducing Risk in Your Custom
Cable Assembly

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Our Products
Battery Packs Flex & Rigid-Flex PCBs Cable Assemblies Printed Circuit Boards
RF Products User Interfaces Flexible Heaters EC Fans & Motors

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Q&A
 Questions?
– Enter any questions you may have
in the Control Panel
– If we don’t have time to get to it, we
will reply via email

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Thank You
Check out our website at www.epectec.com.
For more information email sales@epectec.com.
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