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Chapter3.1 3-mikroprocessor


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Chapter3.1 3-mikroprocessor

  1. 1. Addressing Modes A Course in Microprocessor Electrical Engineering Department University of Indonesia
  2. 2. Data Addressing Modes <ul><li>Fig. 3.1 illustrates the MOV instruction and defines the direction of data flow </li></ul><ul><li>Fig. 3.2 shows all possible data variations of the data-addressing modes using the MOV instruction </li></ul><ul><li>Register addressing: MOV CX,DX or MOV ECX,EDX </li></ul><ul><li>Immediate addressing: MOV AL,22H or MOV EAX,12345678H </li></ul><ul><li>Direct addressing: MOV CX,LIST </li></ul>
  3. 3. Data Addressing Modes (cont’d) <ul><li>Base-plus-index addressing: MOV [BX+DI], CL or MOV [EAX+EBX],CL </li></ul><ul><li>Register relative addressing: MOV AX,[BX+4] or MOV AX,ARRAY[BX] </li></ul><ul><li>Base relative-plus-index addressing: MOV AX,ARRAY[BX+DI] or MOV AX,[BX+DI+4] </li></ul><ul><li>Scaled-index addressing: MOV EDX,[EAX+4*EBX] </li></ul>
  4. 4. Register Addressing <ul><li>It is the most common form and is the easiest to apply </li></ul><ul><li>Microprocessor contains 8-bit, 16-bit, 32-bit registers </li></ul><ul><ul><li>Never mix an 8-bit register with a 16-bit register, 16-bit register with a 32-bit register, etc., because this results in an error when assembled </li></ul></ul><ul><li>Table 3.1 shows many variations of register move instructions </li></ul><ul><li>Fig. 3.3 shows the operation of the MOV BC,CX instruction </li></ul>
  5. 5. Register Addressing <ul><li>Example 3.1 shows a sequence of assembled instructions that copy various data between 8-, 16-, and 32-bit registers </li></ul>
  6. 6. Immediate Addressing <ul><li>The term immediate implies that the data immediately follow the hexadecimal op-code in the memory </li></ul><ul><ul><li>Immediate are constant data </li></ul></ul><ul><ul><li>The MOV immediate instruction transfers a copy of the immediate data into a register or a memory location </li></ul></ul><ul><li>Fig. 3.4 shows the source data (sometimes preceded by #) overwrite the destination data </li></ul><ul><ul><li>The instruction copies the 13456H into register AX </li></ul></ul>
  7. 7. Register Addressing <ul><li>Example 3.2 shows various immediate instructions in a short program that places a 0000H into the 16-bit registers AX, BX, CX </li></ul>
  8. 8. Direct Data Addressing <ul><li>There two basic forms of direct data addressing: </li></ul><ul><ul><li>direct addressing, which applies to a MOV between a memory location and AL, AX or EAX </li></ul></ul><ul><ul><li>displacement addressing, which applies to almost any instruction in the instruction set </li></ul></ul><ul><li>Direct Addressing: MOV AL,DATA (Fig. 3.5 ) </li></ul><ul><ul><li>Table 3.3 lists the three direct addressed instruction </li></ul></ul><ul><ul><li>A MOV instruction is 3-byte long instruction </li></ul></ul>
  9. 9. Direct Data Addressing <ul><li>Displacement Addressing: MOV CL,DATA </li></ul><ul><ul><li>almost identical with direct addressing except that the instruction is four bytes wide </li></ul></ul>
  10. 10. Register Indirect Addressing <ul><li>It allows data to be addressed at any memory location through an offset address held in any of the following register: BP, BX, DI, and SI </li></ul><ul><ul><li>MOV AX,[BX] Fig. 3.6 </li></ul></ul><ul><li>Data segment is used by default with register indirect addressing or any other addressing mode that uses BX, DI, or SI to address memory </li></ul><ul><ul><li>If register BP addresses memory, the stack segment is used by default </li></ul></ul>
  11. 11. Register Indirect Addressing <ul><li>Sometimes, indirect addressing requires specifying the size of the data with the special assembler directive BYTE PTR, WORD PTR or DWORD PTR </li></ul><ul><ul><li>These indicate the size of the memory data addressed by the memory pointer (PTR) </li></ul></ul><ul><li>Indirect addressing allows a program to refer to a tabular data located in the memory sys-tem (Fig. 3.7 & Example 3.6 ) </li></ul>
  12. 12. Base-Plus-Index Addressing <ul><li>It indirectly addresses memory data </li></ul><ul><ul><li>In 8086 - 80286, this use a base register (BP or BX, holds the beginning location of a memory array) and an index register (DI or SI, ) to indirectly addresses memory </li></ul></ul><ul><ul><li>In 80386 and above, this type of addressing allows the combination of any two 32-bit extended registers except #SP </li></ul></ul><ul><ul><ul><li>MOV DL, [EAX+EBX] </li></ul></ul></ul><ul><li>Figure 3.8 shows the sample instruction of locating data with this scheme </li></ul>
  13. 13. Base-Plus-Index Addressing (cont’d) <ul><li>The major use of this type of addressing is to address elements in a memory array </li></ul><ul><ul><li>Fig. 3.9 shows the use of BX (base) and DI (index) to access an element in an array of data) </li></ul></ul><ul><ul><li>Study Table 3.6 and Example 3.7 as well </li></ul></ul>
  14. 14. Register Relative Addressing <ul><li>In its, the data in a segment of memory are addressed by adding the displacement to the contents of a base register and index register (BP, BX, DI, or SI) </li></ul><ul><ul><li>Fig. 3.10 shows the operation of the MOV AX,[BX+ 1000H] instruction </li></ul></ul><ul><li>The displacement can be a number added to the register within the [ ], as in MOV AL,[DI+2] , or it can be a displacement subtracted from the register, as in MOV AL,[SI-1] </li></ul>
  15. 15. Register Relative Addressing (cont’d) <ul><li>It is possible to address array data with register relative addressing such as one does with base-plus-index addressing </li></ul><ul><ul><li>See Fig. 3.11 and study the example 3.8 </li></ul></ul>
  16. 16. Base Relative-Plus-Index Addressing <ul><li>This mode often addresses a two-dimension-al array of memory data </li></ul><ul><ul><ul><li>It is the least-used addressing mode (i.e., too complex for frequent use in a program) </li></ul></ul></ul><ul><ul><ul><li>Fig . 3.12 shows how the instruction MOV AX, [BX+SI+100H] </li></ul></ul></ul><ul><li>Addressing arrays with base relative-plus-index addressing </li></ul><ul><ul><ul><li>the displacement addresses the file </li></ul></ul></ul><ul><ul><ul><li>the base register addresses a record </li></ul></ul></ul><ul><ul><ul><li>the index register addresses an element of a record </li></ul></ul></ul><ul><li>Study Example 3.9 and Fig. 3.13 </li></ul>
  17. 17. Scaled-Index Addressing <ul><li>This type of addressing is unique to the 80386 - Pentium Pro </li></ul><ul><ul><li>It uses two 32-bit registers (a base register and an index register) to access the memory </li></ul></ul><ul><ul><li>The second register (index) is multiplied by a scaling factor (either 1X, 2X, 4X, or 8X) </li></ul></ul><ul><ul><li>MOV AX,[EDI+2*ECX] </li></ul></ul><ul><ul><li>See Example 3.10 and Table 3.9 </li></ul></ul>
  18. 18. Data Structures <ul><li>A data structure is used to specify how information is stored in a memory array; it can be quite useful with application that use arrays </li></ul><ul><ul><li>The start of a structure is identified with the STRUC directive and ended with the ENDS </li></ul></ul><ul><ul><li>See Example 3.11 </li></ul></ul><ul><li>When data are addressed in a structure, use the structure name and the field name to select a field from the structure (Example 3.12 ) </li></ul>
  19. 19. Program Memory Addressing <ul><li>Program memory-addressing modes (JMP and CALL) consist of three distinct forms: direct, relative, and indirect </li></ul><ul><li>Direct Program Memory Addressing </li></ul><ul><ul><li>The instruction store the address with the op-code </li></ul></ul>
  20. 20. Program Memory-Addressing Modes <ul><li>Program memory-addressing modes (JMP and CALL) consist of three distinct forms: direct, relative, and indirect </li></ul><ul><li>Direct Program Memory Addressing </li></ul><ul><ul><li>The instructions store the address with the op-code </li></ul></ul><ul><ul><li>See Fig. 3.14 </li></ul></ul><ul><ul><li>It is called a far jump because it can jump to any memory location for the next instruction </li></ul></ul>
  21. 21. Program Memory Addressing Modes (contd) <ul><li>Relative Program Memory Addressing </li></ul><ul><ul><li>The term relative means “relative to the IP” </li></ul></ul><ul><ul><li>See Fig. 3.15 </li></ul></ul><ul><ul><li>JMP instruction is a one-byte instruction with a one-byte or two-byte displacement that adds to the instruction pointer </li></ul></ul><ul><ul><li>Relative JMP and CALL instructions contain either an 8-bit or a 16-bit signed displacement that allows a forward memory reference or a reverse memory reference </li></ul></ul>
  22. 22. Program Memory Addressing Modes (contd) <ul><li>Indirect Program Memory Addressing </li></ul><ul><ul><li>Table 3.10 lists some acceptable indirect program jump instructions, which can use any 16-bit register, any relative register, and any relative register with a displacement </li></ul></ul><ul><ul><li>If a 16-bit register holds the address of a JMP instruction, the jump is near </li></ul></ul><ul><ul><li>If a relative register holds the address, the jump is also considered an indirect jump </li></ul></ul><ul><ul><li>Fig. 3.16 shows a jump table that is stored beginning at memory location TABLE </li></ul></ul>
  23. 23. Stack Memory-Addressing Modes <ul><li>Stack holds data temporarily and stores return addresses for procedures </li></ul><ul><ul><li>The stack memory is LIFO memory </li></ul></ul><ul><ul><li>Use PUSH instruction to place data onto stack </li></ul></ul><ul><ul><li>Use POP instruction to remove data from stack </li></ul></ul><ul><li>The stack memory is maintained by two registers: SP or ESP, and SS </li></ul><ul><ul><li>Study Fig. 3.17 </li></ul></ul><ul><ul><li>The PUSHA and POPA either push or pop all of the register, except the segment register, on the stack (see example 3.14 ) </li></ul></ul>