Brain-inspired Computing

1. Jawar Singh
Professor
Indian Institute of Technology Patna, Bihar
jawar@iitp.ac.in
Devices and Circuits for In-memory and Brain
Inspired Computing

2. Natural Intelligence Vs Artificial
Intelligence
~15KW ~200KW ~300KW
1997 2011 2016
IBM Deep Blue Vs. Kasparov IBM Watson Vs Ken and Brad Google AlphaGo Vs Lee Sedol
~20W

3. Motivation
Nuclear Reactor
 Human brain with less
than 20W of power
consumption offers a
processing capability that
exceeds the petaflops
mark.
 Thus, outperforms state-
of-the-art supercomputers
by several orders of
magnitude in terms of
energy efficiency and
volume.
P. A. Merrolla et. al., Science 345 (2014)

4. Today’s Computing Architecture
Intel’s Technology Brief
https://www.intel.com/content/www/us/en/research/neuromorphic-computing-loihi-2-technology-brief.html

5.  The energy-efficiency of the biological brain in comparison to the state-of- the-art silicon
computing solutions has fascinated the researchers.
 Human brain with less than 20W of power consumption offers a processing capability that
exceeds the petaflops mark, and thus outperforms state-of-the-art supercomputers by
several orders of magnitude in terms of energy efficiency and volume.
 For example, the Bluegene supercomputer consumed mega-watts of power for simulating
the activity of cat’s brain.
 Deep learning algorithm for AlphaGo a board game was implemented via Supercomputer
that consumes MW power
 For much more complex tasks including cognition, control, movement, and decision
making, being rendered simultaneously by the human brain with just less than 20W.
Motivation

6. Brain Inspired Vs Von-Neumann
Computing
Von-Neumann
Computing
V
s

7. TrueNorth from IBM emulates the neuronal function comprises of 5.4x109 transistors, occupying 4.3 cm2area in Samsung’s 28-
nm process technology that consumes less than 70mW. It shows that the conventional computing architectures lack energy
efficiency and there is a demand for alternatives computing architectures. The TrueNorth has 4096 cores and each having
1.2x106transistors for 265 neurons, hence, to realize a biological neuron approximately 104 transistors are needed.
IBM’s TrueNorth
Remarkable power efficiency of human brain which comprises of 1011 neurons and 1015 synapses consumes ~ 20W
Quest of Alternative Computing

8. IBM’s TrueNorth: Salient Features
Remarkable power efficiency of human brain which comprises of 1011 neurons and 1015 synapses consumes ~ 20W
Quest of Alternative Computing
 The TrueNorth chip uses digital neurons and digital synapses
made of a 1-b transposable 8-transistor SRAM cell.
 In particular, one TrueNorth chip integrates 4096 neuro-synaptic
cores with 1 million digital neurons and 256 million SRAM
synapses that were fabricated in the 28-nm node.
 The TrueNorth chip demonstrated 70-mW power consumption to
perform real-time (30 frames/s) object recognition with very low
clock frequency ( ~ kHz).

9. Quest of Alternative Computing

10. Intel’s Loihi-2
Recently Loihi has evaluated for a wide
range of applications:
 Adaptive robot arm control
 Visual-tactile sensory perception
 Learning and recognizing new odors
and gestures
 Fast database similarity research
 Solving hard optimization problems
such as railway scheduling
All these applications consumes less than 1W compared to tens of KW that standard CPU & GUP solutions

11. 11
Fig. 28: Hodgkin-Huxley
Model
 Electrical circuit representation of the Hodgkin-Huxley model.
 Specific voltage dependent ion-channels that controls the flow of ions
through the membrane.
 Ion-channels are voltage dependent and their opening and closing
depends on voltage across the membrane.
Fig. 29: Simplified RC Model
[22] L. Hodgkin and A. F. Huxley. A quantitative description of membrane current and its application to conduction and excitation in nerve. The Journal of physiology,
117(4):500–544, 1952.
[23] S. Dutta et al., “Leaky integrate and fire neuron by charge-discharge dynamics in floating-body MOSFET,” Sci. Rep., Aug. 2017.
(a)
(b)
(c)
HH and Simplified RC Model

12. Integrate-and-fire neuron circuits that use CMOS technology generally require
number of transistors, which lead to a large device area and high power
consumption.
Fig. 30: Circuit diagram of
the integrate-and-fire neuron.
[24] G. Indiveri, "A low-power adaptive integrate-and-fire neuron circuit," Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.,
Bangkok, Thailand, 2003. 12
CMOS Based Neurons

13. Equilibrium
Leaky Integration
Fire
Reset
[23] S. Dutta et al., “Leaky integrate and fire neuron by charge-discharge dynamics in floating-body MOSFET,” Sci. Rep., vol. 7, no. 1, p. 8257, Aug. 2017.
PD-SOI MOSFET based LIF neuron
13
MOSFET as Silicon Neuron-LIF

14. Neuromorphic Computing Device: Synapse
 Depression and Facilitation
analogues to biological synapse-
learning behavior
 Synaptic efficacy or synaptic
weight is the modulated channel
transconductance of the device

15. Methodology: Brain-inspired Computing
 Applied pulses with fixed pulse width and different polarity leading to
increase/decrease the synaptic weight (trapping/de-trapping of holes that
modulates conductance of channel).
 In addition, these synaptic learning properties are highly rely on the
interval between input pulses (spatio-temporal nature).
 These properties allow us to conclude that they offer very similar learning
characteristics with a biological synapse and paves the way for designing a
neuromorphic computing hardware

16. In-memory Computing

17. Computing Architectures
Virtually all computers today are based on VN architecture
Von Neumann Architecture Harvard Architecture

18. Traditional Computing Vs In-memory Computing
Abu Sebastian, et. al., Nature Nanotechnology, 2020

19. Energy Efficiency for AI and ML Applications
For example, in AI and ML an important computation is a MAC operation ( y = Σ wi xi, where xi
represents an input pixel value of an image, and wi represents a learned filter weight).
A single-integer MAC operation might require just ~3.2 pJ of energy. However, if a weight value
wi is stored in off-chip DRAM and brought to the processor for computation, ~640 pJ of energy
is required just to fetch the filter value, and the energy of the memory request overwhelms that
of the computation.

20. Multiply and Accumulate MVM Operation
Analog vector and matrix operations. Using a bitline to perform an analog sum of products operation.
The total current pulled from the supply voltage represents the result of
the computation.

21. In-memory Computing

22. In-memory Computing: Basic Operations (SRAM)
Abu Sebastian, et. al., Nature Nanotechnology, 2020

23. In-memory Computing: Basic Operations (DRAM)
Abu Sebastian, et. al., Nature Nanotechnology, 2020

24. Summary
 For implementation of brain-inspired approach, simple, elegant, and
energy efficient models for neuron and synapse are highly
anticipated.
 For implementation of in-memory computing approach,
identification of right memory element and architecture are highly
anticipated.

25. Technology Innovation Hub

26. Activities of Technology Innovation Hub- IIT Patna
Idea
Research
TIH
Funding Start-up
Evaluation
Market
Revenue
Returns
Returns
NIDHI-EIR
Scheme
NIDHI Prayas
Scheme
DIAL Scheme
Visit Us: https://tih.iitp.ac.in/

27. Model and Value Proposition
Technology
Development:
Open call for
proposals and
providing
funding to
research
projects
Hiring PhD/
Postdoctoral
students
Increase in
CPS Research
Base
PhDs/Post-
docs/
Researchers
in
SVTA CPS
Technologies
Providing
Faculty
fellowship
s/ Chair
professors
Center of
Excellence
TIH IIT Patna
is having a
Center for
Excellence
on AI
TIH IIT Patna
to promote
CPS-TBI in
SVTA
HRD and Skill
Development
1) Started B
Tech program
on AI and Data
Sciences
2) New MTech
program on AI
3) Providing
Internship
opportunities
4) FDP, summer,
winter schools,
certification
courses
International
Collaboration
IIT Patna researchers
have collaborations
with many foreign
universities; MOU
signing is in process;
joint MTech (CS)
program with Wright
State University, USA
Job Creation:
Through Skill
Development
and Startups
Innovation
and Startup
Ecosystem
Tie-up with IIT
Patna IC, call
for start-up
proposals,
arranging CPS-
GCC-Grand
Challenge and
Competition
CPS-Promotion and
Acceleration of Young and
Aspiring technology
entrepreneurs, CPS-Start-
ups & Spin-off companies
establishment

28. Schemes to Galvanize Start-up Ecosystem
Schemes Benefits Stages
Nidhi-EIR TIH IIT Patna will facilitate fellowship grants to
budding entrepreneurs for pursuing a promising
technology business idea. Selected entrepreneurs
are eligible for maximum grant up to Rs. 30,000
per month for a period of 12 months.
Beneficiaries are expected to
develop a proof of concept of their
idea by the end of the 12 month
period.
Nidhi-Prayas • NIDHI- PRAYAS Program aims at providing
prototype funding to convert idea into
prototype to young and aspiring innovators.
• The maximum funding support to an
innovator/startup will be upto 10 lakhs,
however the final amount is subject to the
approval of Monitoring committee of a
PRAYAS centre
• Innovators should use the
PRAYAS grant primarily convert
their ideas into prototype of a
product that has potential for
commercialization.
• The IP generated if any, should
vest with the Innovator or the
Start up.
Dedicated Innovation
AcceLerator (DIAL)
• Funding support of INR 30 Lakhs – INR 1 Crore
(wherever applicable)
• Guidance from mentors & experts on
business concepts related to
commercialization.
• Access to co-working spaces and lab facilities
subject to policies of IIT Patna Vishlesan I-Hub
Foundation.
• Startup companies who with
certified MVP (Minimum Viable
Product). OR
• Have launched product in the
market. OR
• Are at an early scaling stage.

29. Thanks !
For any queries please write to me:
dr.jawar@gmail.com
You may follow me on Twitter
@drjawarsingh