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The Architecture of VENUS Data
Acquisition System for WAQM
Project
By - Surya Raj
Functional Block Diagram
Sensors
Signal
Conditioning
` Data
Processing
Power
Supply
DAQ Device
Electrical
Signal to
Voltage
Filter
NetworkingData
Monitoring
Input
MUX
PGA
Digital
Filter
SPIADC
2
Schematic
3
Sensor Output to Voltage
Input Specs
1. 4 to 20 mA dc (6 Ch)
2. 0 to 10 V dc (6 Ch)
I2V: 4-20 mA (in) -> 0.4-2V (out) V2V: 0-10 V (in) -> 0-2.09 V (out)
4
Schematic
5
Input Filters
6
Differential-mode signal –3 dB cutoff frequency ,
fDIF = 1 / [2π · (RF1 + RF2) · (CDIF1 + CCM1|| CCM2)] ≈ 3.4K Hz
Common-mode signal –3 dB cutoff frequency ,
fCM = 1 / (2π · RF1 · CCM1) = 1 / (2π · RF2 · CCM2) ≈ 34M Hz
Schematic
7
Power Supply
Input
(FPGA)
Output (ADC)
Specifications:
Available Input: 3.3 V, up to1A (FPGA)
Required Output: 5 V & 3.3 V (ADC)
8
System Component Placement
9
->PCB ->Analog Plane ->Digital Plane ->Power Supply ->AGND=DGND
Thank You!!
10

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The architecture of venus data acquisition system for waqm project