Scott Buttars has over 30 years of experience in electronics manufacturing. He has held various engineering and management roles at companies such as Intel, Radisys, Zelpro Assembly Solutions, and OECO/Meggitt. Buttars has expertise in process development, quality metrics, new product introductions, and equipment selection. He is also involved in professional organizations like SMTA and has authored publications and presented papers at industry conferences.
1. SCOTT BUTTARS
7699 SW Bayberry Drive
Aloha, Oregon 97007
Phone: 503-356-1201 (home)
503-314-5478 (cell)
EXPERIENCE:
OECO/MEGGITT March 2014-Dec 2014 Milwaukee OR
Senior Process Engineer
Originally hired at OECO on a 3 moth contract to help with several key new product introductions in the
SMT area. During this time I created the placement programs for their MyData placement machine and
developed DEK screen printer process. I profiled the ovens to determine the correct profile using the ECD
Mole. I also helped to develop rework processes for some of the more difficult parts and performed and
contracted preventive maintenance for all SMT equipment and set up SPC for the area. My contract was
extended indefinitely after the 3 months were up and at that time I worked with the creation and updating
of work instructions as well as worked in MRB to disposition materials and write rework instructions and
create rework production orders for problem materials. During this time I became proficient at using their
SAP, Master Control, and QCBD software to manage documentation and material movements.
ZELPRO Assembly Solutions February 2013 – November 2013 Wilsonville,
OR
Operations Manager
Responsibilities include managing personnel, scheduling, development of manufacturing
processes, taking customer orders, equipment selection and working with the customers to resolve all
issues. I was responsible for all aspects of the manufacturing operation. Implemented oven profiling and
created new profiles for all products.
INTEL CORPORATION July 2005 – May 2012 Hillsborro, OR
Senior Process Engineer
Responsibilities include process integration in the Assembly Module Engineering group. In this role, I
was expected to define and develop board assembly solutions for all components on any given platform.
Specifically, ensuring that the SMT yield and the reliability meets or exceeds platform technology
specifications for CPU sockets, Chip sets, other components and that OEM/ODM are able to implement
Intel’s recommendations with equivalent results. As part of this roll I developed build plans, supported
the builds and reported out the results showing that these requirements were met using statistical analysis
to show that the sample size built met the yield at the confidence levels required. For the critical SMT
process parameters multivariate DOEs were run to show the process window and any process interactions.
RADISYS CORPORATION December 1998 – July 2005 Hillsborro, OR
Staff Process/Supplier Engineer
Responsibilities include all aspects of Design for Manufacturing (DFM) including
facilitating the DFM team and updates to the document on an intranet Web site. New
process development that has included bottom side reflow, selective wave solder, jet
adhesive dispensing and lead-free solder both reflow and wave. Initially was responsible
for quality metrics and improvement for the SMT line and later acted as project
manager for new product introductions.
COMPAQ COMPUTER CORP July 1988 -Nov 1998 Houston, TX
Senior Manufacturing Engineer
Responsibilities include engineering support for three high-speed high volume surface mount lines
dedicated to the production of the Micro-Processor Boards used in system products. This includes the
following equipment: Fuji CP4, CP6, IP2, IP3, GSP2, DEK screen printer. Was part of the team that
selected DEK Stencil Printers and was assigned as the vendor interface. Other equipment responsibilities
included wave soldering, rework equipment and solder paste. I supervised Engineering Interns and
Temporary Employees and acted as facilitator for ISO Process Control, Set-Up reduction, Fine Pitch/BGA
Process Improvement teams and Systems Product Corrective Action Team. Was a participant in the
implementation of Statistical Process Control (SPC) and use of Design of Experiment (DOE) as tools for
process improvement. Selected and installation a Selective Soldering System, implementation of a No-
Clean VOC free wave soldering process.
2. IOMEGA CORPORATION February 1984 – July 1988 Roy UT
Process Engineer/Group Leader
I initially worked in the Process Engineering Group as a Tool Designer while completing my college
requirements. Accepted a position as Process Engineer in PCA Process Engineering department, and then
later was promoted to Group leader directing one other Engineer and three Engineering technicians.
Helped set up a fully automated surface mount production line which included Universal Instruments
screen printing, component placement, infrared reflow and wave soldering equipment. Major
responsibilities included process development, plant layout, statistical process control, SMT rework
processes and design development/review.
EDUCATION:
WEBER STATE UNIVERSITY 1981 -1985 Ogden UT
Manufacturing Engineering Technology
OTHER PROFESIONAL ACTIVITIES:
I have served as an officer for the Oregon Surface Mount Technology Association (SMTA) Chapter since
2003 and served as president for 3 years during which we were awarded chapter of the year 2 times. I
received the Excellence in Leadership Award at SMTAI. This year I am serving once again as chapter
president.
I have been a major contributor to all three revisions of the IPC-7095 Design and Assembly Process
Implementation for BGAs and IPC-7093 Design and Assembly Process Implementation
For Bottom Termination SMT Components
I have written various articles that have been published including two in SMT and Circuits Assembly
magazines. One of these articles on Design for Manufacturing was translated and published in China.
I have written and presented numerous papers at both NEPCON West and SMTAI trade conferences. I
presenting at SMTAI on the impact of Intermetalic compounds on solder joint reliability in 2012.
I currently hold two patent.