1. ANALOG FOR ALL
A Preview
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2. ANALOG FOR ALL
30 HOURS OF THEORY
PRINTED NOTES
CIRCUIT DOWNLOADS
APPLICATION EXAMPLES
REAL DESIGN EXAMPLE
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3. WHAT’s NEW
Introduction to ADC architectures
Introduction to PLL/DLL
Bandgap reference/ V2I converters
Buck/boost regulators/ LDOs
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4. What you need to know to start this course
Ohms Law
Kirchoff’s current law (KCL)
Kirchoff’s voltage law (KVL)
Fourier & Laplace transforms – if you have a vague recollection,
that is fine!
Differential equations – again, a distant memory will suffice!
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Not much!
5. Where you will get to by end of this course
Understand the founding principles of active circuits
Break complex circuits into simple building blocks
Synthesize analog circuits for realizing functionality
Map top level requirements to specs related to op amps and
design for them
two-
In particular, you will be able to design a two-stage op amp
with a specified frequency response, transient response, noise
spec
= Analog Copyright: Sahyogee with >1 year experience!
designer Tech Solutions, 2012 5
6. Different flavours of Analog Design
Op amps
Building block - the “gates” of analog
Challenges include design for low noise, low power, high
bandwidth
Data converters (ADCs and DACs)
How the DSP gets to see the “real world”
Challenges include speed, power, resolution, noise, linearity
Clocking circuits (PLL, DLL, Duty cycle correction)
Manipulate clocks
Challenges include design for frequency range, phase noise, etc
6
7. Different flavours of Analog Design
Prog.
Analog signal processing (Filters, Prog. Gain amps)
Critical signal processing in the analog domain
Challenges include design for linearity & noise
Power management (Regulators, POR circuits)
Create the desired voltages to drive ICs
Challenges include high current drive, good noise rejection
High speed interfaces
Delivering huge bandwidth of digital data from IC to IC
Challenges include speed, signal integrity
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8. Our target for the course
VOUT
VIN
RLOAD CLOAD
Realize the ideal buffer!
VOUT/VIN is exactly 1 (well, almost!) (RESOLUTION
RESOLUTION)
RESOLUTION
Should not load VIN
Almost any loading on VOUT (LOADLOAD)
LOAD
Should support the specified frequency range of VIN for a
specified capacitive loading at the output (BANDWIDTH
BANDWIDTH)
BANDWIDTH
?? How close are we Solutions, 2012ideal buffer ??
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to the 8
9. Train of thought
Background theory on frequency Visualize circuits
response, transient response, Laplace powerfully over three
domain analysis domains
Appreciate need for an
(R,C)
Passives (R,C) & Sources active component in
Analog design
MOSFET as a component
characterized by its I-V curves (No
I-
device physics)
Achieving signal gain with a single
MOSFET
College level
Increase Gain vs. Ease of Biasing –
The classic conundrum in Analog
design
The Unity gain buffer – the Source Our first “practical” circuit
follower
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10. Train of thought
Differential amplifier – decoupling Flex our analysis
the biasing and high gain issues, muscles to analyze a
achieving high gain triple cascode amp in
minutes
The need for an ideal current source
and how to achieve it – and with
Get very
comfortable this, the conundrum is back!
reading the
language of Solving the conundrum once again - The workhorse of
Analog ckts The 5-pack amp
5- analog IC design
Our first glimpse of
5-
The 5-pack as a unity gain buffer feedback
Picking up the tools
Poles,
Poles, zeros, Pole splitting for analyzing
Junior analog frequency response
engineer
Deducing the transient response from
pole/zero locations
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11. Train of thought
Noise in amplifiers
Learning to make amps
Feedback and Frequency response of dance to your tune in
Board level feedback: Phase margin, Stability, frequency domain
analysis compensation
toolset under
our belt Learning to make
Transient response of feedback: amplifiers dance to your
Settling versus phase margin tune in time domain
Real design problem: Design of a 2- 2-
You have Putting it all together
stage amp and achieving biasing,
mastered a
new art!! You transient settling, stability, noise
can CREATE!
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