8085 instruction-set part 1
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Instruction set of 8085 with programming example , including MCQ questions
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8085 instruction-set part 1
- 1. 8085 Instruction Set R.S. SHIRBAVIKAR 1
- 40. PSW (Program Status word) - Flag unaffected * affected 0 reset 1 set S Sign (Bit 7) Z Zero (Bit 6) AC Auxiliary Carry (Bit 4) P Parity (Bit 2) CY Carry (Bit 0) 8085 Instruction Set 40
- 57. 8085 Instruction Set 57 circular Left shift
- 58. CIRCULAR RIGHT SHIFT 58
- 72. Summary – Data transfer MOV Move MVI Move Immediate LDA Load Accumulator Directly from Memory STA Store Accumulator Directly in Memory LHLD Load H & L Registers Directly from Memory SHLD Store H & L Registers Directly in Memory 8085 Instruction Set 72
- 73. Summary Data transfer An 'X' in the name of a data transfer instruction implies that it deals with a register pair (16-bits); LXI Load Register Pair with Immediate data LDAX Load Accumulator from Address in Register Pair STAX Store Accumulator in Address in Register Pair XCHG Exchange H & L with D & E XTHL Exchange Top of Stack with H & L 8085 Instruction Set 73
- 74. Summary - Arithmetic Group Add, Subtract, Increment / Decrement data in registers or memory. ADD Add to Accumulator ADI Add Immediate Data to Accumulator ADC Add to Accumulator Using Carry Flag ACI Add Immediate data to Accumulator Using Carry SUB Subtract from Accumulator SUI Subtract Immediate Data from Accumulator SBB Subtract from Accumulator Using Borrow (Carry) Flag SBI Subtract Immediate from Accumulator Using Borrow (Carry) Flag INR Increment Specified Byte by One DCR Decrement Specified Byte by One INX Increment Register Pair by One DCX Decrement Register Pair by One DAD Double Register Add; Add Content of Register Pair to H & L Register Pair 8085 Instruction Set 74
- 75. Summary Logical Group This group performs logical (Boolean) operations on data in registers and memory and on condition flags. These instructions enable you to set specific bits in the accumulator ON or OFF. ANA Logical AND with Accumulator ANI Logical AND with Accumulator Using Immediate Data ORA Logical OR with Accumulator OR Logical OR with Accumulator Using Immediate Data XRA Exclusive Logical OR with Accumulator XRI Exclusive OR Using Immediate Data 8085 Instruction Set 75
- 76. The Compare instructions compare the content of an 8-bit value with the contents of the accumulator; CMP Compare CPI Compare Using Immediate Data The rotate instructions shift the contents of the accumulator one bit position to the left or right: RLC Rotate Accumulator Left RRC Rotate Accumulator Right RAL Rotate Left Through Carry RAR Rotate Right Through Carry Complement and carry flag instructions: CMA Complement Accumulator CMC Complement Carry Flag STC Set Carry Flag 8085 Instruction Set 76
- 77. Summary - Branch Group Unconditional branching JMP Jump CALL Call RET Return Conditions NZ Not Zero (Z = 0) Z Zero (Z = 1) NC No Carry (C = 0) C Carry (C = 1) PO Parity Odd (P = 0) PE Parity Even (P = 1) P Plus (S = 0) M Minus (S = 1) Conditional branching 8085 Instruction Set 77
- 78. Summary - Stack PUSH Push Two bytes of Data onto the Stack POP Pop Two Bytes of Data off the Stack XTHL Exchange Top of Stack with H & L SPHL Move content of H & L to Stack Pointer 8085 Instruction Set 78
- 79. I/0 instructions IN Initiate Input Operation OUT Initiate Output Operation 8085 Instruction Set 79
- 80. Summary -Machine Control instructions EI Enable Interrupt System DI Disable Interrupt System HLT Halt NOP No Operation 8085 Instruction Set 80
- 81. Which is the microprocessor comprises: a. Register section b. One or more ALU c. Control unit d. All of these 2) What is the store by register? a. data b. operands c. memory d. None of these 3) Accumulator based microprocessor example are: a. Intel 8085 b. Motorola 6809 c. A and B d. None of these 4) A set of register which contain are: a. data b. memory addresses c. result d. all of these 5) There are primarily two types of register: a. general purpose register b. dedicated register c. A and B d. none of these 6) Name of typical dedicated register is: a. PC b. IR c. SP d. All of these 8085 Instruction Set 81
- 82. In which of these modes, the immediate operand is included in the instruction itself? a) register operand mode b) immediate operand mode c) register and immediate operand mode d) none of the mentioned 8085 Instruction Set 82
- 83. In register address mode, the operand is stored in a) 8-bit general purpose register b) 16-bit general purpose register c) si or di d) all of the mentioned 8085 Instruction Set 83
- 84. In register address mode, the operand is stored in a) 8-bit general purpose register b) 16-bit general purpose register c) si or di d) all of the mentioned 8085 Instruction Set 84
- 85. . Which category of microprocessor instructions detect the status conditions in registers and accordingly exhibit the variations in program sequence on the basis of detected results? a. Transfer Instructions b. Operation Instructions c. Control Instructions d. All of the above 8085 Instruction Set 85
- 86. . Which category of microprocessor instructions detect the status conditions in registers and accordingly exhibit the variations in program sequence on the basis of detected results? a. Transfer Instructions b. Operation Instructions c. Control Instructions d. All of the above 8085 Instruction Set 86
- 87. The push and pop instructions belonging to the category of transfer instructions of microprocessor perform data transformation between _______. a. two registers b. processor register and memory stack c. processor register and interface register d. interface register and memory word 8085 Instruction Set 87
- 88. The push and pop instructions belonging to the category of transfer instructions of microprocessor perform data transformation between _______. a. two registers b. processor register and memory stack c. processor register and interface register d. interface register and memory word 8085 Instruction Set 88
- 89. Which addressing mode execute its instructions within CPU without the necessity of reference memory for operands? a. Implied Mode b. Immediate Mode c. Direct Mode d. Register Mode 8085 Instruction Set 89
- 90. Which addressing mode execute its instructions within CPU without the necessity of reference memory for operands? a. Implied Mode b. Immediate Mode c. Direct Mode d. Register Mode 8085 Instruction Set 90
- 91. Flag register is an 8-bit register having __________ 1-bit flip- flops. A. 3 B. 4 C. 5 D. 6 8085 Instruction Set 91
- 92. What is true about Program counter? A. It is an 8-bit register, which holds the temporary data of arithmetic and logical operations. B. When an instruction is fetched from memory then it is stored in the program counter C. It provides timing and control signal to the microprocessor D. It is a 16-bit register used to store the memory address location of the next instruction to be executed. 8085 Instruction Set 92
- 93. What is true about Program counter? A. It is an 8-bit register, which holds the temporary data of arithmetic and logical operations. B. When an instruction is fetched from memory then it is stored in the program counter C. It provides timing and control signal to the microprocessor D. It is a 16-bit register used to store the memory address location of the next instruction to be executed. 8085 Instruction Set 93
- 94. This signal indicates that another master is requesting the use of the address and data buses. A. READY B. HOLD C. HLDA D. INTA 8085 Instruction Set 94
- 95. This signal indicates that another master is requesting the use of the address and data buses. A. READY B. HOLD C. HLDA D. INTA 8085 Instruction Set 95
- 96. Which of the following is true about Control and status signals? A. These signals are used to identify the nature of operation. B. There are 3 control signal and 3 status signals. C. Three status signals are IO/M, S0 & S1. D. All of the above 8085 Instruction Set 96
- 97. Which of the following is true about Control and status signals? A. These signals are used to identify the nature of operation. B. There are 3 control signal and 3 status signals. C. Three status signals are IO/M, S0 & S1. D. All of the above 8085 Instruction Set 97
- 98. MVI K, 20F is an example of? A. Immediate addressing mode B. Register addressing mode C. Direct addressing mode D. Indirect addressing mode 8085 Instruction Set 98
- 99. The microprocessor ___________ those instructions from the memory A. Fetch B. Decode C. Execute D. None of the above 8085 Instruction Set 99
- 100. WRITE A PROGRAM TO ADD THE CONTENT OF MEMORY LOCATION D00H AND D001H STORE ITS RESULT IN MEMORY LOCATION D005 8085 Instruction Set 100
- 108. 8085 Instruction Set 108 Write a program to add two hexadecimal & decimal numbers.
- 118. 8085 Instruction Set 118 105) The register section is related to______ of the computer: a. Processing b. ALU c. Main memory d. None of these 106) In Microprocessor one of the operands holds a special register called: lculator Dedicated Accumulator None of these 107) Which register is a temporary storage location: general purpose register dedicated register A and B ne of these 108) PC stands for: Program counter ints counter Paragraph counter Paint counter
- 119. 8085 Instruction Set 119 105) The register section is related to______ of the computer: a. Processing b. ALU c. Main memory d. None of these 106) In Microprocessor one of the operands holds a special register called: lculator Dedicated Accumulator None of these 107) Which register is a temporary storage location: general purpose register dedicated register A and B ne of these 108) PC stands for: Program counter ints counter Paragraph counter Paint counter
- 120. 8085 Instruction Set 120 113) How many parts of single address computer instruction : 2 3 4 114) Single address computer instruction has two parts: The operation code The operand A and B ne of these 115) LA stands for: Load accumulator ast accumulator Last accumulator None of these
- 121. 8085 Instruction Set 121 113) How many parts of single address computer instruction : 2 3 4 114) Single address computer instruction has two parts: The operation code The operand A and B ne of these 115) LA stands for: Load accumulator ast accumulator Last accumulator None of these
- 122. 8085 Instruction Set 122 116) Which are the flags of status register: Over flow flag Carry flag Half carry flag Zero flag terrupt flag Negative flag All of these
- 123. 8085 Instruction Set 123 117) The carry is operand by: c D S O 118) The sign is operand by: s D C O 119) The zero is operand by: z D S O 120) The overflow is operand by: o D S C
- 124. 8085 Instruction Set 124 121) _________ Stores the instruction currently being executed: Instruction register Current register Both a and b ne of these 122) In which register instruction is decoded prepared and ultimately executed: Instruction register rrent register Both a and b None of these 123) The status register is also called the____: a. Condition code register b. Flag register c. A and B d. None of these
- 125. 8085 Instruction Set 125 121) _________ Stores the instruction currently being executed: Instruction register Current register Both a and b ne of these 122) In which register instruction is decoded prepared and ultimately executed: Instruction register rrent register Both a and b None of these 123) The status register is also called the____: a. Condition code register b. Flag register c. A and B d. None of these
- 126. 8085 Instruction Set 126 132) The left side of any binary number is called: Least significant digit Most significant digit dium significant digit low significant digit 133) MSD stands for: Least significant digit Most significant digit dium significant digit low significant digit
- 127. 8085 Instruction Set 127 132) The left side of any binary number is called: Least significant digit Most significant digit dium significant digit low significant digit 133) MSD stands for: Least significant digit Most significant digit dium significant digit low significant digit
- 128. 8085 Instruction Set 128 WE stands for: Write enable Wrote enable ite envy None of these 144) MAR stands for: Memory address register Memory address recode cro address register None of these 145) MDR stands for: Memory data register Memory data recode cro data register None of these
- 129. 8085 Instruction Set 129 WE stands for: Write enable Wrote enable ite envy None of these 144) MAR stands for: Memory address register Memory address recode cro address register None of these 145) MDR stands for: Memory data register Memory data recode cro data register None of these
- 130. 8085 Instruction Set 130 DMA stands for: a. Direct memory access b. Direct memory allocation c. Data memory access d. Data memory allocation 148) The ____ place the data from a register onto the data bus: a. CPU b. ALU c. Both A and B d. None of these
- 131. 8085 Instruction Set 131 DMA stands for: a. Direct memory access b. Direct memory allocation c. Data memory access d. Data memory allocation 148) The ____ place the data from a register onto the data bus: a. CPU b. ALU c. Both A and B d. None of these
- 132. 8085 Instruction Set 132 151) The external device is connected to a pin called the ______ pin on the processor chip. Interrupt ansfer Both None of these 152) Which interrupt has the highest priority? INTR Trap RST6.5 none of these 153) In 8085 name the 16 bit registers? Stack pointer program counter a & b none of these
- 133. 8085 Instruction Set 133 151) The external device is connected to a pin called the ______ pin on the processor chip. Interrupt ansfer Both None of these 152) Which interrupt has the highest priority? INTR trap RST6.5 none of these 153) In 8085 name the 16 bit registers? Stack pointer ogram counter a & b none of these
- 134. THANK YOU 134