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A QUAD TWO-LEVEL I NVERTER CONFIGURATION FOR
FOUR-POLE I NDUCTION-MOTOR DRIVE WITH SINGLE DC
-LINK
ABSTRACT
A multilevel inverter topology for a four-pole induction-motor drive is
presented in this paper, which is constructed using the induction-motor stator
winding arrangement. A single dc source with a less magnitude when compared
with conventional five-level inverter topologies is used in this topology. Therefore,
power balancing issues (which are major challenges in conventional multilevel
inverters) are minimized. As this configuration uses a single dc source, it provides
a path for zero-sequence currents because of the zero- sequence voltages present in
the output, which will flow through the motor phase winding and power electronic
switches.
To minimize these zero-sequence currents, sine–triangle pulse width
modulation (SPWM) is used, which will shift the lower order harmonics near to
switching frequency in the linear modulation region. However, in the case of over
modulation, harmonic voltages will be introduced close to the fundamental
frequency. In this regard, a modified SPWM technique is proposed in this paper to
operate the drive in the over modulation region up to the modulation index of 2
/√3. The proposed quad two-level inverter topology is experimentally verified with
a laboratory prototype on a four-pole 5-hp induction motor. Experimental results
show the effectiveness of the proposed topology in the complete linear modulation
region and the over modulation region.
Head office: 3nd
floor, Krishna Reddy Buildings, OPP: ICICI ATM, Ramalingapuram, Nellore
www.pvrtechnology.com, E-Mail: pvrieeeprojects@gmail.com, Ph: 81432 71457
Block diagram for proposed system
DESIGNING SOFTWARE AND TOOLS:
MAT LAB /SIMULATION Software and sim power systems tools are used. Mainly control
system tools, power electronics and electrical elements tools are used.
Head office: 3nd
floor, Krishna Reddy Buildings, OPP: ICICI ATM, Ramalingapuram, Nellore
www.pvrtechnology.com, E-Mail: pvrieeeprojects@gmail.com, Ph: 81432 71457
CONCLUSION
In this paper, a multilevel inverter topology has been presented for a four-pole induction-motor
drive. The disconnected two IVPWCs are fed from four two-level inverters. All these four two-
level inverters are connected to a single dc source minimizing the power balancing issues. The
magnitude of dc source voltage requirement is also very less compared with that of conventional
five-level inverter topologies. This topology uses only two-level inverters; hence, it is free from
capacitor voltage balancing issues. The proposed topology is experimentally verified with a 5-hp
four-pole induction motor using a laboratory prototype. Gating pulses are generated using the
SPWM technique for the linear modulation region and for the over modulation region using the
modified SPWM technique. In the case of any switch failure of the middle two inverters, the
topology can be operated as a three-level inverter up to the modulation index of 0.5. This will
increase the reliability of the system during fault condition when compared with conventional
NPC or FC topologies. This topology does not require any major design modifications of the
induction motor except the disconnection of IVPWCs. This concept can also be applied to obtain
a higher number of voltage levels for the induction motor with a higher number of poles, which
requires more two-level inverters.
Head office: 3nd
floor, Krishna Reddy Buildings, OPP: ICICI ATM, Ramalingapuram, Nellore
www.pvrtechnology.com, E-Mail: pvrieeeprojects@gmail.com, Ph: 81432 71457

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A quad two level inverter configuration for four-pole induction-motor drive with single dc link

  • 1. A QUAD TWO-LEVEL I NVERTER CONFIGURATION FOR FOUR-POLE I NDUCTION-MOTOR DRIVE WITH SINGLE DC -LINK ABSTRACT A multilevel inverter topology for a four-pole induction-motor drive is presented in this paper, which is constructed using the induction-motor stator winding arrangement. A single dc source with a less magnitude when compared with conventional five-level inverter topologies is used in this topology. Therefore, power balancing issues (which are major challenges in conventional multilevel inverters) are minimized. As this configuration uses a single dc source, it provides a path for zero-sequence currents because of the zero- sequence voltages present in the output, which will flow through the motor phase winding and power electronic switches. To minimize these zero-sequence currents, sine–triangle pulse width modulation (SPWM) is used, which will shift the lower order harmonics near to switching frequency in the linear modulation region. However, in the case of over modulation, harmonic voltages will be introduced close to the fundamental frequency. In this regard, a modified SPWM technique is proposed in this paper to operate the drive in the over modulation region up to the modulation index of 2 /√3. The proposed quad two-level inverter topology is experimentally verified with a laboratory prototype on a four-pole 5-hp induction motor. Experimental results show the effectiveness of the proposed topology in the complete linear modulation region and the over modulation region. Head office: 3nd floor, Krishna Reddy Buildings, OPP: ICICI ATM, Ramalingapuram, Nellore www.pvrtechnology.com, E-Mail: pvrieeeprojects@gmail.com, Ph: 81432 71457
  • 2. Block diagram for proposed system DESIGNING SOFTWARE AND TOOLS: MAT LAB /SIMULATION Software and sim power systems tools are used. Mainly control system tools, power electronics and electrical elements tools are used. Head office: 3nd floor, Krishna Reddy Buildings, OPP: ICICI ATM, Ramalingapuram, Nellore www.pvrtechnology.com, E-Mail: pvrieeeprojects@gmail.com, Ph: 81432 71457
  • 3. CONCLUSION In this paper, a multilevel inverter topology has been presented for a four-pole induction-motor drive. The disconnected two IVPWCs are fed from four two-level inverters. All these four two- level inverters are connected to a single dc source minimizing the power balancing issues. The magnitude of dc source voltage requirement is also very less compared with that of conventional five-level inverter topologies. This topology uses only two-level inverters; hence, it is free from capacitor voltage balancing issues. The proposed topology is experimentally verified with a 5-hp four-pole induction motor using a laboratory prototype. Gating pulses are generated using the SPWM technique for the linear modulation region and for the over modulation region using the modified SPWM technique. In the case of any switch failure of the middle two inverters, the topology can be operated as a three-level inverter up to the modulation index of 0.5. This will increase the reliability of the system during fault condition when compared with conventional NPC or FC topologies. This topology does not require any major design modifications of the induction motor except the disconnection of IVPWCs. This concept can also be applied to obtain a higher number of voltage levels for the induction motor with a higher number of poles, which requires more two-level inverters. Head office: 3nd floor, Krishna Reddy Buildings, OPP: ICICI ATM, Ramalingapuram, Nellore www.pvrtechnology.com, E-Mail: pvrieeeprojects@gmail.com, Ph: 81432 71457