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Short Circuit Instabilities in Silicon IGBTs and SiC Power MOSFETs

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Paula Diaz Reigosa

One of the most typical stresses that the device must withstand is related to short-circuit events, which occur randomly during the component’s life. Silicon-based IGBTs are good candidates for limiting the external current in case of a short-circuit event, however their robustness is frequently limited due to instabilities. In this Ph.D. thesis, the short-circuit performance of silicon-based IGBTs has been extensively evaluated, but since Wide-Band Gap (WBG) devices, such as SiC MOSFETs, are rapidly growing as a potential substitute of silicon-based technologies, its robustness with respect to short circuit is also addressed.

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Short-Circuit Instabilities in Silicon IGBTs and Silicon Carbide Power MOSFETs September 21, 2017 Paula Díaz Reigosa pdr@et.aau.dk Department of Energy Technology Aalborg University Denmark
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Outline 1. Introduction 2. The short-circuit performance in IGBTs 3. TCAD sensitivity study 4. The short-circuit oscillation phenomenon 5. The short-circuit performance in SiC power MOSFETs 6. Conclusions and future research
56 SC Instabilities in IGBTs and SiC MOSFETs 3Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Introduction Which is the motivation to study the performance of power semiconductor devices under abnormal conditions? Power semiconductor devices do not always achieve their typical design target of lifetime (i.e, 20-30 years). Application Stress conditions + Catastrophic failure =
56 SC Instabilities in IGBTs and SiC MOSFETs 3Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Introduction Which is the motivation to study the performance of power semiconductor devices under abnormal conditions? Power semiconductor devices do not always achieve their typical design target of lifetime (i.e, 20-30 years). Not only wear out failures but also random failures must be understood to guarantee maintenance-free power electronics. Application Stress conditions + Catastrophic failure =
56 SC Instabilities in IGBTs and SiC MOSFETs 3Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Introduction Which is the motivation to study the performance of power semiconductor devices under abnormal conditions? Power semiconductor devices do not always achieve their typical design target of lifetime (i.e, 20-30 years). Not only wear out failures but also random failures must be understood to guarantee maintenance-free power electronics. The device must be tested at its limits with the aim of discovering failure mechanisms that will occur in the field. Application Stress conditions + Catastrophic failure =
56 SC Instabilities in IGBTs and SiC MOSFETs 4Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Introduction Failures in power electronics Failures Early failures Random failures (catastrophic) Wear out failures Root cause Poor design and manufacturing mistakes Severe overloads Instabilities Aging Predictability Somehow predictable Somehow predictable Unpredictable Predictable Problem-solving approach Trial and error/ agressive testing StatisticsControl/ Thermal design Physics of Failure (PoF) Examples in IGBTs Solder layer defects Thermal runaway Oscillations during short-circuits Bond-wire lift-off
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction 5SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Introduction Short-circuit type I Normal operation of a three-phase voltage-source inverter The inverter is initially operating correctly Z1 Z2 Z3 VDC load ON OFF VGE, HS VGE, LS VCE, LS iC t t t t High Side (HS) Low Side (LS)
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction 6SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Introduction Short-circuit type I: Turn-on What is a short circuit? A fault occurs - e.g. a false switching operation or a failure of the device itself Both switches of the same branch are conducting The low side switch withstands high current and voltage at the same time Z1 Z2 Z3 VDC load ON VGE, HS VGE, LS VCE, LS iC ON ton t t t t High Side (HS) Low Side (LS)
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction 7SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Introduction Short-circuit type I: On-state During the short-circuit event, two situations can happen: Fails: due to high power dissipation or some sort of instability (tfail ). Z1 Z2 Z3 VDC load ON VGE, HS VGE, LS VCE, LS iC ON tfail t t t t High Side (HS) Low Side (LS)
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction 7SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Introduction Short-circuit type I: On-state During the short-circuit event, two situations can happen: Fails: due to high power dissipation or some sort of instability (tfail ). Survives: withstands the over stress and it is successfully turned off by the gate driver (tSC). Z1 Z2 Z3 VDC load ON VGE, HS VGE, LS VCE, LS iC ON tSC t t t t High Side (HS) Low Side (LS)
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction 8SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Introduction Short-circuit type I: Off-state After the short-circuit event, the device can still fail: The low side device withstands the SC (ton) but fails later by thermal runaway (tfail ) Z1 Z2 Z3 VDC load ON VGE, HS VGE, LS VCE, LS iC ON ton tfail t t t t High Side (HS) Low Side (LS)
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction 9SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Introduction Short-circuit type I: Instability Instabilities can occur during the short-circuit event: Oscillations can be observed Diverging oscillations can lead to the device destruction during short-circuit Z1 Z2 Z3 VDC load ON VGE, HS VGE, LS VCE, LS iC ON ton t t t t High Side (HS) Low Side (LS)
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I 10Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Introduction Motivation Ringing during short circuit Full and safe short-circuit test Conditions: VCE = 900 V; Pulse width = 10 µs; T= 25◦ C Low side of a half-bridge power module VGE VCE IC 10 µs 900V 5 kA
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I 11Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Introduction Motivation Ringing during short circuit Oscillations Conditions: VCE = 800 V; Pulse width = 10 µs; T= 25◦ C High side of a half-bridge power module VGE 10 µs 800V IC VCE 4 kA
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs 12Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Experimental Test Bench
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs 12Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Experimental Test Bench The 2.4-kV / 10-kA NDT at CORPE Capable of Repetitive Short Circuit (RSC) testing of medium-to-high power Si and SiC modules Capable of heating plate temperature control from -40◦ C to 250◦ C Highly automated testing and safety protection with remote control FPGA User PC Driver Driver Scope busbar busbar Series Protection VCE DUT ETH ETH RS232 CDC IC E G C VGE VDC L DUT Series Protection tSC Max. 2.4 kV 4xIGBTs (3kA/3.3kV) LT = 50 nH 10xCap. (500 µF)
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs 12Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Experimental Test Bench The 2.4-kV / 10-kA NDT at CORPE Capable of Repetitive Short Circuit (RSC) testing of medium-to-high power Si and SiC modules Capable of heating plate temperature control from -40◦ C to 250◦ C Highly automated testing and safety protection with remote control
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs 13Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Experimental Test Bench The dynamic substrate test bench at ABB Capable of Repetitive Short Circuit (RSC) testing of High-Voltage semiconductors mounted on a substrate Capable of temperature control from room temperature up to 175◦ C Highly automated testing (LabVIEW) and safety protection Programmable Logic Controller (PLC) Gate drivers Substrate press Oscilloscope PC Capacitor bank Bus inductance 3 x 160 µF Max. 6.5 kV 50 nH...1 µH
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench 14Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Chip technology The 3.3-kV planar IGBT Conditions: VCE = 1800 V; Pulse width = 10 µs; T = 25◦ C Different collector doping: strong vs. weak anode Strong anode → No oscillations 0 1 2 3 VCE[kV] Weak anode Strong anode 0 200 400 600 800 IC[A] 0 2 4 6 8 10 12 −40 −20 0 20 40 time [µs] VGE[V] P+ N- EE G P+ P+ N+ N+ C EE G N+ P + N+ N+ enhancement P+ N+ Planar IGBT
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench 15Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Chip technology The 3.3-kV trench IGBT Conditions: VCE = 1200 V; Pulse width = 10 µs; T = 25◦ C Trench technology worsens oscillations Failure at VCE = 1.5 kV 0 1 2 3 VCE[kV] VDC = 1.2 kV VDC = 1.5 kV 0 200 400 600 800 1,000 IC[A] 0 2 4 6 8 10 12 −40 −20 0 20 40 Failure time [µs] VGE[V] P+ N- P+ N- EE G E EG P+ N+ P+ N+ P+ P+ N+ N+ C C EE G E E G P + N+ P+ N + N+ P + N+ N+ enhancement P+ N+ N+ enhancement Planar IGBT Trench IGBT
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench 16Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Chip technology The 3.3-kV planar BIGT (Bi-Mode Insulated Gate Transistor) Conditions: VCE = 1800 V; Pulse width = 10 µs; T = 25◦ C BIGT → significant improvement The BIGT differs from the IGBT in the collector design 0 1 2 3 VCE[kV] 0 200 400 600 800 IC[A] 0 2 4 6 8 10 12 −20 0 20 40 time [µs] VGE[V] P+ N- P+ N- EE G E EG P+ N+ P+ N+ P+ P+ N+ N+ C C P+ N- P+ N- EE G E E G P + N+ P+ N + N+ P + N+ N+ enhancement C P+ N+ N+ enhancement C P+ N - EE G N+ G C P N N+ P+ N - EE G P P + N + N + ++ +N+ P + N+ N+ Pilot IGBT RC-IGBT N+ short Planar IGBT Trench IGBT Enhanced-Planar IGBT Enhanced-Trench IGBT Planar BIGT N+ short
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench 16Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Chip technology The 3.3-kV trench BIGT (Bi-Mode Insulated Gate Transistor) Conditions: VCE = 1800 V; Pulse width = 10 µs; T = 25◦ C BIGT → significant improvement The BIGT differs from the IGBT in the collector design 0 1 2 3 VCE[kV] −200 0 200 400 600 800 IC[A] 0 2 4 6 8 10 12 −20 0 20 40 time [µs] VGE[V] P+ N- P+ N- EE G E P+ N+ P+ P+ N+ N+ C P+ N- P+ N- EE G E P + N+ N+ P + N+ N+ enhancement C P+ N+ N+ en P+ N - EE G N+ G C P N N+ E P++ +N+ P + N+ Pilot IGBT N+ short Planar IGBT Trenc Enhanced-Planar IGBT Enhanced- Planar BIGT P+ N - E E G P + N+ P +N + N + enhancement E G N+ P +N + N+ N+ N+ short N+ short
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology 17Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Testing conditions 0 0.5 1 1.5 2 VCE[kV] T = 25◦ C T = 100◦ C 0 200 400 600 IC[A] 0 2 4 6 8 10 12 −20 0 20 40 time [µs] VGE[V] Influence of testing conditions: Temperature effect Conditions: T = 25◦ C; T = 100◦ C Device tested: 3.3-kV enhanced-planar IGBT (SPT+ ) High temperature → lower oscillations
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology 18Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Testing conditions 0 1 2 3 VCE[kV] 0 200 400 600 800 IC[A] VDC = 1.9 kV VDC = 1 kV 0 2 4 6 8 10 12 −20 0 20 40 time [µs] VGE[V] Influence of testing conditions: DC-link voltage effect Conditions: VDC = 1 kV; VDC = 1.9 kV Device tested: 3.3-kV enhanced-planar IGBT (SPT+ ) High DC-link voltage → no oscillations
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology 19Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Testing conditions 0 0.2 0.4 0.6 0.8 1 VCE[kV] VGE = 17 V VGE = 15 V 0 200 400 600 IC[A] 0 2 4 6 8 10 12 −40 −20 0 20 40 time [µs] VGE[V] Influence of testing conditions: Gate-voltage effect Conditions: VGE = 15 V; VGE = 17 V Device tested: 3.3-kV enhanced-planar IGBT (SPT+ ) Low VGE → no oscillations
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions 20Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Layout influence Comparison among three different manufacturers Conditions: VCE = 400 V; T= 25◦ C; VGE = 15 V Device tested: 1.7 kV/1 kA trench IGBT power module Manufacturer A and B show oscillations Manufacturer A Manufacturer B -0.5 0 0.5 1 1.5 2 2.5 3 -15 -10 -5 0 5 10 15 20 25 0 1 2 3 4 0 200 400 600 800 -0.5 0 0.5 1 1.5 2 2.5 3 -15 -10 -5 0 5 10 15 20 25 0 1 2 3 4 200 400 600 800 Time [µs] VCE[V] IC[kA] VGE[V] Time [µs] 0 VCE[V] VGE[V] IC[kA] Gate zoom-inGate zoom-in IC VGE VCE VGE IC VCE
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions 21Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Layout influence Comparison among three different manufacturers Conditions: VCE = 400 V & VCE = 900 V Device tested: 1.7 kV/1 kA trench IGBT power module Manufacturer C does not oscillate Manufacturer C Manufacturer C -0.5 0 0.5 1 1.5 2 2.5 3 -15 -10 -5 0 5 10 15 20 25 0 1 2 3 4 0 200 400 600 800 -0.5 0 0.5 1 1.5 2 2.5 3 -15 -10 -5 0 5 10 15 20 25 0 1 2 3 4 200 400 600 800 Time [µs] VCE[V] IC[kA] VGE[V] Time [µs] 0 VCE[V] VGE[V] IC[kA] Gate zoom-inGate zoom-in IC VGE VCE VGE IC VCE -0.5 0 0.5 1 1.5 2 2.5 3 -15 -10 -5 0 5 10 15 20 25 0 1 2 3 4 0 200 400 600 800 VCE[V] IC[kA] VGE[V] Time [µs] VGE IC VCE 0 2 4 6 8 10 12 -15 -10 -5 0 5 10 15 20 25 0 1 2 3 4 5 6 200 400 600 800 1000 1200 1400 VCE[V] IC[kA] VGE[V] Time [µs] VCE IC VGE
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions 22Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Layout influence Layout sensitivity analysis: w/o Kelvin emitter Different layouts on DCB (Direct Copper Bond) substrates High Side (HS) Low Side (LS) Gate return path (HS) Gate return path (LS) Gate path (HS) Gate path (LS) IGBT Diode IGBTDiode DC - DC +Output 1 3 2 4 5 6 1 3 2 4 5 6 High Side (HS) Low Side (LS) Gate return path (HS) Gate return path (LS) Gate path (HS) Gate path (LS) DC - DC +Output IGBT Diode IGBT Diode IGBT Diode IGBT Diode Gate return path (LS) High Side (HS) Gate path (HS) 2 Output Output 5 DC + DC - 4 1 3 6 5 0 10 20 30 40 Gate path (1-2) Emitter path (2-3) Power loop (4-5) Layout 2 Layout 1 Layout 3 [nH] Layout 1 Layout 3 Layout 2
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions 23Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Layout influence High Side (HS) Low Side (LS) Gate return path (HS) Gate return path (LS) Gate path (HS) Gate path (LS) IGBT Diode IGBTDiode DC - DC +Output 1 3 2 4 5 6 1 3 2 4 5 6 High Side (HS) Low Side (LS) Gate return path (HS) Gate return path (LS) Gate path (HS) Gate path (LS) DC - DC +Output IGBT Diode IGBT Diode IGBT Diode IGBT Diode Gate return path (LS) High Side (HS) Gate path (HS) 2 Output Output 5 DC + DC - 4 1 3 6 5 0 10 20 30 40 Gate path (1-2) Emitter path (2-3) Power loop (4-5) Layout 2 Layout 1 Layout 3 [nH] 100 200 300 400 500 VCE[V] Layout 1 Layout 2 Layout 3 0 200 400 600 800 IC[A] −1 0 1 2 3 4 5 6 7 −10 0 10 20 time [µs] VGE[V] 50 100 150 200 250 VCE[V] Layout 1 Layout 1 + LG 0 200 400 600 IC[A] 0 1 2 3 4 5 6 −10 0 10 20 time [µs] VGE[V] 13 16 Layout sensitivity analysis: w/o Kelvin emitter Fast turn-on/off is not beneficial Large LG → oscillations
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity 24IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations IGBT design
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity 24IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations IGBT design Emitter Emitter Collector Collector X [um] X [um] Y[um] Y[um] Sensitivity analysis on the oscillating behaviour’s dependence Investigation strategy Planar IGBT: ease and computational time Trench IGBT: validate the hypothesis
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity 25IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations IGBT design Static I − V curve IC VCEV = 1 kVVCE(sat) IL SS SS SS SS ISC
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity 25IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations IGBT design Static I − V curve Electric field dominated by injected carriers (Neff < 0) The electron density is not homogeneous at the surface With increasing VCE , the electron flow becomes narrower increasing VCE increasing VCE 1000 V 1500 V 2000 V 2500 V
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design 26Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Layout Influence Short-circuit simulations with TCAD Layout influence: 1. Collector inductance, LC 2. Gate inductance, Lg 3. Emitter inductance, Le Rg = 1 Ω VGG VDC Le = 10 nH LC = 1.2 µ H Lg = 40 nH P+ N+ buffer N-base P-base N+ emitter EG C VCE VGE ig ic 15V 1 kV
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design 27Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Layout Influence Effect of collector inductance, LC The lesser LC → more robust The higher LC → increased undershoot The lesser LC → higher oscillation frequency 0 1 2 3VCE[kV] 0 100 200 300 400 IC[A] LC = 0.4 µH LC = 0.8 µH LC = 1 µH 1 2 3 4 5 6 7 8 9 10 12 14 16 18 time [µs] VGE[V]
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design 28Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Layout Influence Effect of gate inductance, Lg The lesser Lg → the more robust The higher Lg → higher oscillation amplitude The lesser Lg → higher oscillation frequency 0 1 2 3VCE[kV] 0 100 200 300 400 IC[A] Lg = 20 nH Lg = 50 nH Lg = 70 nH 1 2 3 4 5 6 7 8 9 10 12 14 16 18 time [µs] VGE[V]
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design 29Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Layout Influence Effect of emitter inductance, Le The larger Le → the more robust The higher Le → higher oscillation amplitude The lesser Le → smaller oscillation frequency 0 1 2 3VCE[kV] 0 100 200 300 400 IC[A] Le = 3 nH Le = 15 nH Le = 20 nH 1 2 3 4 5 6 7 8 9 10 12 14 16 18 time [µs] VGE[V]
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 30Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence DC-link voltage effect: VDC = 1 kV & VDC = 2 kV High VDC → no oscillations t0 t1 t2 t3 t4 t5 0 1 2 3 VCE[kV] 0 100 200 300 400 IC[A] VDC = 1 kV VDC = 2 kV 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V]
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 30Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence DC-link voltage effect: VDC = 1 kV & VDC = 2 kV High VDC → no oscillations t0 0 1 2 3 VCEkV] 0 100 200 300 IC[A] VDC = 1 kV VDC = 2 kV 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF EF
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 30Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence DC-link voltage effect: VDC = 1 kV & VDC = 2 kV High VDC → no oscillations t1 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] VDC = 1 kV VDC = 2 kV 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF EF
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 30Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence DC-link voltage effect: VDC = 1 kV & VDC = 2 kV High VDC → no oscillations t2 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] VDC = 1 kV VDC = 2 kV 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF EF
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 30Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence DC-link voltage effect: VDC = 1 kV & VDC = 2 kV High VDC → no oscillations t3 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] VDC = 1 kV VDC = 2 kV 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF EF
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 30Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence DC-link voltage effect: VDC = 1 kV & VDC = 2 kV High VDC → no oscillations t4 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] VDC = 1 kV VDC = 2 kV 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF EF
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 30Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence DC-link voltage effect: VDC = 1 kV & VDC = 2 kV High VDC → no oscillations A carrier accumulation effect is observed at the surface t5 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] VDC = 1 kV VDC = 2 kV 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricFIeld[V/cm] ElectronConcentration[cm-3] e EF EF
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 31Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence Gate voltage effect: VGE = 15 V & VGE = 13 V Low VGE → no oscillations t0 t1 t2 t3 t4 t5 0 1 2 3 VCE[kV] 0 100 200 300 400 IC[A] 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V]
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 31Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence Gate voltage effect: VGE = 15 V & VGE = 13 V Low VGE → no oscillations t0 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e only <3>{ incl udeg raphi cs[sc ale= 0.45] {pic/ VDC _sen sitivi ty_4. pdf} } EF
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 31Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence Gate voltage effect: VGE = 15 V & VGE = 13 V Low VGE → no oscillations t1 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 31Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence Gate voltage effect: VGE = 15 V & VGE = 13 V Low VGE → no oscillations t2 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 31Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence Gate voltage effect: VGE = 15 V & VGE = 13 V Low VGE → no oscillations t3 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 31Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence Gate voltage effect: VGE = 15 V & VGE = 13 V Low VGE → no oscillations t4 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 31Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence Gate voltage effect: VGE = 15 V & VGE = 13 V Low VGE → no oscillations A carrier accumulation effect is observed at the surface t5 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 32Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence Temperature effect: T = 100◦ C & T = 25◦ C Low T → oscillations come later t0 t1 t2 t3 t4 t5 0 1 2 3 VCE[kV] 0 100 200 300 400 IC[A] T = 100 ◦ C T = 25 ◦ C 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V]
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 32Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence Temperature effect: T = 100◦ C & T = 25◦ C Low T → oscillations come later t0 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] T = 100 ◦ C T = 25 ◦ C 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 32Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence Temperature effect: T = 100◦ C & T = 25◦ C Low T → oscillations come later t1 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] T = 100 ◦ C T = 25 ◦ C 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 32Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence Temperature effect: T = 100◦ C & T = 25◦ C Low T → oscillations come later t2 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] T = 100 ◦ C T = 25 ◦ C 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 32Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence Temperature effect: T = 100◦ C & T = 25◦ C Low T → oscillations come later A carrier accumulation effect is observed at the surface t3 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] T = 100 ◦ C T = 25 ◦ C 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] EF e
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence 33Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Initial Conclusions Oscillatory mode (1 kV) Rotated field (Kirk Effect) Weak electric field at the surface → charge accumulation At low electric fields, vdrift α E (Je = qnvn)
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence 33Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Initial Conclusions Non-oscillatory mode (2 kV) Rotated field (Kirk Effect) Weak electric field at the surface → charge accumulation At low electric fields, vdrift α E (Je = qnvn)
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 34Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 34Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC Time-domain approach 0 2 4 6 8 10 −10 −2 6 14 22 30 VCE IC VGE time [µs] VGE[V] 0 100 200 300 400 500 IC[A] 0 1 2 3 4 5 VCE[kV] 0 1 2 3 t0 t1 t2 t3 t4 t5 VCE[kV] 14 15 16 A B VGE[V] −5 0 5 Ig[A] 300 350 400 IC[A] 5.1 5.15 5.2 5.25 5.3 5.35 5.4 5.45 0 400 800 time [µs] Ci[nF]
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 36Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC + N- E G P+ N+ C N+ P+ y ve << ve,sat E y Rotated field: low VCE vh << vh,sat ve,satvh,sat Accumulation of electrons ve<<ve,sat vh<<vh,sat ve,sat vh,sat Neffective [cm-3 ]Velocity [cm/s] Two mechanisms occurring during oscillations Phase A: Rotated field → Low velocity → Charge accumulation → High C
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 36Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC + N- E G P+ N+ C N+ P+ vh,sat E y ve << ve,sat E y : low VCE Non-rotated field: high VCE vh << vh,sat ve,satvh,sat ve,sat ve,sat vh,sat Neffective [cm-3 ] Velocity [cm/s] Two mechanisms occurring during oscillations Phase A: Rotated field → Low velocity → Charge accumulation → High C Phase B: Normal field → High velocity → No charge effects → Low C
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms 37Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Parametric Oscillations in IGBTs Rg = 1 Ω VGG VDC Le = 10 nH LC = 1.2 µH Lg = 40 nH P+ N+ buffer N-base P-base N+ emitter EG C VCE VGE ig ic Lg = 40 nH Rg C2 = 60 nF C1 = 90 nF V(A) = V (A’) A A’ VGG = 15 V 21 (a) 15V VA i Why the gate signal becomes amplified? The input capacitance behaves as a time-varying element
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms 37Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Parametric Oscillations in IGBTs Rg = 1 Ω VGG VDC Le = 10 nH LC = 1.2 µH Lg = 40 nH P+ N+ buffer N-base P-base N+ emitter EG C VCE VGE ig ic Lg = 40 nH Rg C2 = 60 nF C1 = 90 nF V(A) = V (A’) A A’ VGG = 15 V 21 (a) 15V VA i Why the gate signal becomes amplified? The input capacitance behaves as a time-varying element The IGBT together with the gate circuit creates a parametric oscillation
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms 37Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Parametric Oscillations in IGBTs Rg = 1 Ω VGG VDC Le = 10 nH LC = 1.2 µH Lg = 40 nH P+ N+ buffer N-base P-base N+ emitter EG C VCE VGE ig ic Lg = 40 nH Rg C2 = 60 nF C1 = 90 nF V(A) = V (A’) A A’ VGG = 15 V 21 (a) 15V VA i Why the gate signal becomes amplified? The input capacitance behaves as a time-varying element The IGBT together with the gate circuit creates a parametric oscillation An energy transfer between the varying capacitance and the series-connected gate inductance occurs
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms 37Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Parametric Oscillations in IGBTs Rg = 1 Ω VGG VDC Le = 10 nH LC = 1.2 µH Lg = 40 nH P+ N+ buffer N-base P-base N+ emitter EG C VCE VGE ig ic Lg = 40 nH Rg C2 = 60 nF C1 = 90 nF V(A) = V (A’) A A’ VGG = 15 V 21 (a) 15V VA i Why the gate signal becomes amplified? The input capacitance behaves as a time-varying element The IGBT together with the gate circuit creates a parametric oscillation An energy transfer between the varying capacitance and the series-connected gate inductance occurs A PSpice simulation proves the hypothesis
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms 38Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Parametric Oscillations in IGBTs Why the gate signal becomes amplified? 4 energy transfers between L and C Amplification: Large C → energy is stored in C (1 ; 3) Small C → energy is stored in L (2; 4) Switch (S): High C in 3 and small C in 2 i VA Amplification CsmallCbig 2;4 1;3Attenuation 1;3 2;4 −40 −20 0 20 40 S VA[V] 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 3.8 4 -1 -0.5 0 0.5 1 time [µs] i[A]
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms 39Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Parametric Oscillations in IGBTs How the gate signal becomes attenuated? 4 energy transfers between L and C Attenuation: Large C → energy is stored in L (2 ; 4) Small C → energy is stored in C (1; 3) Switch (S): High C in 2 and small C in 3 i VA Amplification CsmallCbig 2;4 1;3Attenuation 1;3 2;4 0 10 20 30 S VA[V] 2 2.2 2.4 2.6 2.8 3 3.2 3.4 −0.2 −0.1 0 0.1 0.2 time [µs] i[A]
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations 40Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Device Solutions to Mitigate Oscillations Optimization of the carrier profile Increase of the electric field at the surface Adjustment of the drift region doping → (SBL) High-injection-efficiency emitters → (Collector doping) Profiled lifetime control techniques Reduction of the electron injection from the MOS-channel dE dx = q s (ND + h − e) (1)
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations 41Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Device Solutions to Mitigate Oscillations Surface-Buffer Layer (SBL) Increase dE dx by inserting an n-doped buffer layer
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations 41Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Device Solutions to Mitigate Oscillations Surface-Buffer Layer (SBL) Increase dE dx by inserting an n-doped buffer layer No oscillations! Short Circuit Operation 0 1 2 3 VCE IC VCE[kV] 0 200 400 IC[A] 0 1 2 3 4 5 6 7 0 5 10 15 time [µs] VGE[V] Standard ND = 8e+13; D = 100
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations 41Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Device Solutions to Mitigate Oscillations Surface-Buffer Layer (SBL) Increase dE dx by inserting an n-doped buffer layer No oscillations! Short Circuit Operation 0 50 100 150 200 250 300 350 0 0.5 1 1.5 ·105 Surface buffer layer Y [µm] Electricfield[V/cm] 1011 1012 1013 1014 1015 1016 1017 Electrondensity[cm−3 ]
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations 42Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Device Solutions to Mitigate Oscillations Surface-Buffer Layer (SBL): trade-off Reduced blocking capability Reduced on-state losses Similar turn-off losses 3,000 3,500 4,000 4,500 0 0.2 0.4 0.6 0.8 1 VCE [V] IC[mA] Standard SBL 0 2 4 6 8 10 12 0 100 200 VCE [V] IC[A] Standard SBL
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations 43Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Device Solutions to Mitigate Oscillations Short Circuit Operation t4 0 1 2 3 VCE[kV] 0 100 200 300 400 IC[A] NA = 1e+17 cm−3 NA = 2e+17 cm−3 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] Effect of collector doping The doping the p+ collector has been increased The Efield is stronger at the emitter with larger γemitter No oscillations!
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations 43Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Device Solutions to Mitigate Oscillations Short Circuit Operation 0 100 200 300 0 20000 40000 60000 80000 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF EF Effect of collector doping The doping the p+ collector has been increased The Efield is stronger at the emitter with larger γemitter No oscillations!
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations 44Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Device Solutions to Mitigate Oscillations Effect of collector doping: trade-off Similar blocking capability Reduced on-state losses Increased turn-off losses 0 2 4 6 8 10 12 0 50 100 150 200 250 VCE [V] IC[A] NA = 1e+17 cm−3 NA = 2e+17 cm−3 0 100 200 300 0 100 200 300 Y [µm] Electricfield[V/cm] 1014 1015 1016 Electrondensity[cm−3 ]
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations 44Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Device Solutions to Mitigate Oscillations Effect of collector doping: trade-off Similar blocking capability Reduced on-state losses Increased turn-off losses 0 0.5 1 1.5 2 VCE[kV] 0 20 40 60 80 IC[A] 0 5 10 15 20 VGE[V] NA =1e+17 cm−3 NA =2e+17 cm−3 7.2 7.4 7.6 7.8 8 8.2 8.4 8.6 8.8 9 0 50 100 Time [µs] POFF[mW]
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions 45Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Conclusions Starting point conditions: IGBT short-circuit robustness limited by oscillations Different interpretations from the device or circuit design
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions 45Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Conclusions Starting point conditions: IGBT short-circuit robustness limited by oscillations Different interpretations from the device or circuit design Findings: Study the interaction between circuit and device Electric field fluctuations → Miller capacitance variations The IGBT together with the gate circuit creates a parametric oscillation
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions 45Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Conclusions Starting point conditions: IGBT short-circuit robustness limited by oscillations Different interpretations from the device or circuit design Findings: Study the interaction between circuit and device Electric field fluctuations → Miller capacitance variations The IGBT together with the gate circuit creates a parametric oscillation Solutions: Device designs to avoid weak electric field at the surface Application-related solutions.
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs 46Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Performance in SiC MOSFETs Single-chip SiC MOSFETS
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs 46Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Performance in SiC MOSFETs Single-chip SiC MOSFETS 300 350 400 450 500 VDS[V] 0 50 100 150 Tail current ID[A] 0 2 4 6 8 10 12 14 −10 0 10 20 time [µs] VGS[V] 19.5 20.5 What do we know about the SCSOA of SiC MOSFETs? Failure indicators in SiC MOSFETs: 1. Turn-off tail currents 2. Gate voltage drop with increasing short-circuit time Short-circuit time increase →
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs 47Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Performance in SiC MOSFETs Single-chip SiC MOSFETS What do we know about the SCSOA of SiC MOSFETs? Temperature influence (VDC = 400 V) 1. Turn-off tail currents → No effect 2. Gate voltage drop → More critical at high T 0 50 100 150 ID[A] 25◦ C 75◦ C 100◦ C 150◦ C 0 2 4 6 8 10 12 14 −10 0 10 20 time [µs] VGS[V] 19.5 20.5
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs 48Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Performance in SiC MOSFETs Single-chip SiC MOSFETS Failure of the 1.2 kV/ 36 A device under SC operation (I) Conditions: VDC = 600 V; Pulse width = 5 µs; T = 25◦ C Successful turn-off but thermal runaway failure 500 550 600 650 700 VDS[V] 0 50 100 150 Failure ID[A] −1 0 1 2 3 4 5 6 7 8 9 −10 0 10 20 tsc = 5 µs time [µs] VGS[V] 19.5 20.5
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs 49Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Performance in SiC MOSFETs Single-chip SiC MOSFETS Failure of the 1.2 kV/ 36 A device under SC operation (II) Conditions: VDC = 600 V; Pulse width = 7.2 µs; T = 150◦ C Gate-oxide degradation mechanism takes place at high T Permanent damage of the device 500 550 600 650 700 VDS[V] 0 50 100 150 Failure Degradation ID[A] 0 2 4 6 8 10 12 −10 0 10 20 Degradation tsc = 7.2 µs time [µs] VGS[V]
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET 50SiC Power Modules Conclusions Future research The SC Performance in SiC MOSFETs SiC Power Modules Failure of the 1.2 kV/ 300 A device under SC operation Conditions: VDC = 600 V; Pulse width = 3.2 µs; T = 25◦ C Successful turn-off but thermal runaway failure Failure 4 5 6 7 8 -100 0 100 200 300 400 500 600 700 800 900 -10 -5 0 5 10 15 20 25 30 35 40 VDS[V] VGS[V] me [µs] Failure (a) (b) VDS VGS 200 400 600 800 1000 1200 0 5 10 15 20 25 VDS[V] VGS[V] Failure Failure VDS VGS 200 400 600 800 1,000 VDS[V] 0 2 4 6 Failure ID[kA] −1 0 1 2 3 4 5 6 7 8 −10 0 10 20 time [µs] VGS[V] 18.5 20.5
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET 51SiC Power Modules Conclusions Future research The SC Performance in SiC MOSFETs SiC Power Modules Failure of the 1.2 kV/ 180 A device under SC operation Conditions: VDC = 800 V; Pulse width = 7.2 µs; T = 25◦ C Turn-off tail currents and gate-voltage degradation Failure 4 5 6 7 8 -100 0 100 200 300 400 500 600 700 800 900 -10 -5 0 5 10 15 20 25 30 35 40 VDS[V] VGS[V] e [µs] Failure a) (b) VDS VGS 8 10 12 14 16 -200 0 200 400 600 800 1000 1200 -10 -5 0 5 10 15 20 25 VDS[V] [µs] VGS[V] Failure Failure ) (b) VDS VGS 0 200 400 600 800 1000 1200 -10 0 10 20 30 40 50 VDS[V] VGS[V] VDS VGS Failure 400 600 800 1,000 1,200 VDS[V] 0 0.5 1 1.5 2 Failure ID[kA] −10 150 0 2 4 6 8 10 12 14 16 −10 0 10 20 Degradation time [µs] VGS[V]
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules 52Conclusions Future research Conclusions Problem: Experiments demonstrate that SiC MOSFETs withstand short circuit conditions to some extent (less than 10 µs ). Two type of failures: 1. Gate-oxide degradation 2. Thermal runaway failure
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules 52Conclusions Future research Conclusions Problem: Experiments demonstrate that SiC MOSFETs withstand short circuit conditions to some extent (less than 10 µs ). Two type of failures: 1. Gate-oxide degradation 2. Thermal runaway failure Interpretation: Two failure indicators have been identified: 1. Turn-off tail current 2. Gate-emitter voltage drop
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules 52Conclusions Future research Conclusions Problem: Experiments demonstrate that SiC MOSFETs withstand short circuit conditions to some extent (less than 10 µs ). Two type of failures: 1. Gate-oxide degradation 2. Thermal runaway failure Interpretation: Two failure indicators have been identified: 1. Turn-off tail current 2. Gate-emitter voltage drop Tentative solution: Cell density must be decreased.
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions 53Future research Future Research Silicon IGBTs Find optimum trade-off between SC robustness and efficient operation under normal conditions (Lstray , T, VDC, VGE , SBL, γemitter ). Modelling of self-heating effects under short circuit. Guideline to design IGBTs depending on its application, including abnormal operation. SiC power MOSFETs Understanding of the failure mechanisms in SiC power MOSFETs under short-circuit conditions. Optimization of the device cell to minimize temperature-related failure mechanisms.
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions 54Future research List of Publications Journal Papers J1. P.D. Reigosa, F. Iannuzzo, H. Luo and F. Blaabjerg, “A Short Circuit Safe Operation Area Identification Criterion for SiC MOSFET Power Modules,” in IEEE Transactions on Industry Applications, vol. 53, no. 3, pp. 2880-2887, May-June 2017. J2. P.D. Reigosa, D. Prindle, G. Paques, S. Geissmann, F. Iannuzzo, A. Kopta and M. Rahimo, “Comparison of Thermal Runaway Limits under Different Test Conditions Based on a 4.5 kV IGBT,” Microelectronics Reliability, pp. 524-529, Sept. 2016. J3. P.D. Reigosa, R. Wu, F. Iannuzzo and F. Blaabjerg, “Robustness of MW-Level IGBT Modules Against Gate Oscillations under Short Circuit Events,” Microelectronics Reliability, vol. 55, issue 9-10, pp. 1950-1955, Oct. 2015. J4. R. Wu, P.D. Reigosa, F. Iannuzzo, L. Smirnova, H. Wang and F. Blaabjerg, “Study on Oscillations during Short Circuit of MW-Scale IGBT Power Modules by Means of a 6-kA/1.1-kV Non-destructive Testing System,”IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 3, issue 3, pp. 756-765, Sept. 2015. J5. P.D. Reigosa, F. Iannuzzo, M. Rahimo, C. Corvasce and F. Blaabjerg, “Improving the Short-Circuit Reliability in IGBTs - How to Mitigate Oscillations,” submitted to IEEE Transactions on Power Electronics, in review, 2017. J6. P.D. Reigosa, F. Iannuzzo, M. Rahimo,and F. Blaabjerg, “Capacitive Effects in IGBTs Limiting their Reliability under Short Circuit,” accepted to Microelectronics Reliability, in review, 2017.
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions 55Future research List of Publications Conference Papers C1. P.D. Reigosa, H. Wang, F. Iannuzzo and F. Blaabjerg, “Approaching Repetitive Short Circuit Tests on MW-Scale Power Modules by means of an Automatic Testing Setup,” in Proc. of the IEEE Energy Conversion Congress and Exposition, Sept. 2016. C2. P.D. Reigosa, F. Iannuzzo, H. Luo and F. Blaabjerg, “Investigation on the Short Circuit Safe Operation Area of SiC MOSFET Power Modules,” in Proc. of IEEE Energy Conversion Congress and Exposition, Sept. 2016. C3. C.G. Suarez, P.D. Reigosa, F. Iannuzzo, I. Trintis and F. Blaabjerg, “Parameter Extraction for PSpice Models by means of an Automated Optimization Tool - An IGBT model Study Case,” in Proc. of PCIM Europe, May. 2016. C4. P.D. Reigosa, F. Iannuzzo, S.M. Nielsen and F. Blaabjerg, “New layout concepts in MW-scale IGBT modules for higher robustness during normal and abnormal operations,” in Proc. of APEC, pp. 288-294, March 2016. C5. R. Wu, P.D. Reigosa, F. Iannuzzo, H. Wang and F. Blaabjerg, “A Comprehensive Investigation on the Short Circuit Performance of MW-level IGBT Power Modules,” in Proc. of EPE-ECCE Europe, Sept. 2015. C6. P.D. Reigosa, R. Wu, F. Iannuzzo and F. Blaabjerg, “Evidence of turn-off gate voltage oscillations during short circuit of commercial 1.7 kV/1 kA IGBT power modules,” in Proc. of PCIM Europe, pp. 916-923, May 2015. C7. P.D. Reigosa, F. Iannuzzo and F. Blaabjerg, “Packaging Solutions for Mitigating IGBT Short-Circuit Instabilities,” in Proc. of PCIM Europe, pp., May 2017. C8. P.D. Reigosa, F. Iannuzzo and M. Rahimo, “TCAD Analysis of Short-Circuit Oscillations in IGBTs,” in Proc. of ISPSD, pp., May 2017.
56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions 56Future research Special Thanks to... Aalborg University: Prof. Francesco Iannuzzo Prof. Frede Blaabjerg Industrial partners: Dr. Munaf Rahimo, ABB Ltd. Semiconductors Switzerland PhD Committee: Prof. Kjeld Pedersen Prof. Ichiro Omura Dr. Caroline Andersson The Danish Strategic Research Council and Det Obelske Familiefond Center of Reliable Power Electronics (CORPE) My parents, my partner, my friends and all my colleagues from the Department of Energy Technology, Aalborg University.
Thank you for your attention!

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Short Circuit Instabilities in Silicon IGBTs and SiC Power MOSFETs

  • 1. Short-Circuit Instabilities in Silicon IGBTs and Silicon Carbide Power MOSFETs September 21, 2017 Paula Díaz Reigosa pdr@et.aau.dk Department of Energy Technology Aalborg University Denmark
  • 2. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Outline 1. Introduction 2. The short-circuit performance in IGBTs 3. TCAD sensitivity study 4. The short-circuit oscillation phenomenon 5. The short-circuit performance in SiC power MOSFETs 6. Conclusions and future research
  • 3. 56 SC Instabilities in IGBTs and SiC MOSFETs 3Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Introduction Which is the motivation to study the performance of power semiconductor devices under abnormal conditions? Power semiconductor devices do not always achieve their typical design target of lifetime (i.e, 20-30 years). Application Stress conditions + Catastrophic failure =
  • 4. 56 SC Instabilities in IGBTs and SiC MOSFETs 3Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Introduction Which is the motivation to study the performance of power semiconductor devices under abnormal conditions? Power semiconductor devices do not always achieve their typical design target of lifetime (i.e, 20-30 years). Not only wear out failures but also random failures must be understood to guarantee maintenance-free power electronics. Application Stress conditions + Catastrophic failure =
  • 5. 56 SC Instabilities in IGBTs and SiC MOSFETs 3Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Introduction Which is the motivation to study the performance of power semiconductor devices under abnormal conditions? Power semiconductor devices do not always achieve their typical design target of lifetime (i.e, 20-30 years). Not only wear out failures but also random failures must be understood to guarantee maintenance-free power electronics. The device must be tested at its limits with the aim of discovering failure mechanisms that will occur in the field. Application Stress conditions + Catastrophic failure =
  • 6. 56 SC Instabilities in IGBTs and SiC MOSFETs 4Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Introduction Failures in power electronics Failures Early failures Random failures (catastrophic) Wear out failures Root cause Poor design and manufacturing mistakes Severe overloads Instabilities Aging Predictability Somehow predictable Somehow predictable Unpredictable Predictable Problem-solving approach Trial and error/ agressive testing StatisticsControl/ Thermal design Physics of Failure (PoF) Examples in IGBTs Solder layer defects Thermal runaway Oscillations during short-circuits Bond-wire lift-off
  • 7. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction 5SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Introduction Short-circuit type I Normal operation of a three-phase voltage-source inverter The inverter is initially operating correctly Z1 Z2 Z3 VDC load ON OFF VGE, HS VGE, LS VCE, LS iC t t t t High Side (HS) Low Side (LS)
  • 8. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction 6SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Introduction Short-circuit type I: Turn-on What is a short circuit? A fault occurs - e.g. a false switching operation or a failure of the device itself Both switches of the same branch are conducting The low side switch withstands high current and voltage at the same time Z1 Z2 Z3 VDC load ON VGE, HS VGE, LS VCE, LS iC ON ton t t t t High Side (HS) Low Side (LS)
  • 9. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction 7SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Introduction Short-circuit type I: On-state During the short-circuit event, two situations can happen: Fails: due to high power dissipation or some sort of instability (tfail ). Z1 Z2 Z3 VDC load ON VGE, HS VGE, LS VCE, LS iC ON tfail t t t t High Side (HS) Low Side (LS)
  • 10. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction 7SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Introduction Short-circuit type I: On-state During the short-circuit event, two situations can happen: Fails: due to high power dissipation or some sort of instability (tfail ). Survives: withstands the over stress and it is successfully turned off by the gate driver (tSC). Z1 Z2 Z3 VDC load ON VGE, HS VGE, LS VCE, LS iC ON tSC t t t t High Side (HS) Low Side (LS)
  • 11. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction 8SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Introduction Short-circuit type I: Off-state After the short-circuit event, the device can still fail: The low side device withstands the SC (ton) but fails later by thermal runaway (tfail ) Z1 Z2 Z3 VDC load ON VGE, HS VGE, LS VCE, LS iC ON ton tfail t t t t High Side (HS) Low Side (LS)
  • 12. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction 9SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Introduction Short-circuit type I: Instability Instabilities can occur during the short-circuit event: Oscillations can be observed Diverging oscillations can lead to the device destruction during short-circuit Z1 Z2 Z3 VDC load ON VGE, HS VGE, LS VCE, LS iC ON ton t t t t High Side (HS) Low Side (LS)
  • 13. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I 10Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Introduction Motivation Ringing during short circuit Full and safe short-circuit test Conditions: VCE = 900 V; Pulse width = 10 µs; T= 25◦ C Low side of a half-bridge power module VGE VCE IC 10 µs 900V 5 kA
  • 14. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I 11Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Introduction Motivation Ringing during short circuit Oscillations Conditions: VCE = 800 V; Pulse width = 10 µs; T= 25◦ C High side of a half-bridge power module VGE 10 µs 800V IC VCE 4 kA
  • 15. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs 12Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Experimental Test Bench
  • 16. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs 12Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Experimental Test Bench The 2.4-kV / 10-kA NDT at CORPE Capable of Repetitive Short Circuit (RSC) testing of medium-to-high power Si and SiC modules Capable of heating plate temperature control from -40◦ C to 250◦ C Highly automated testing and safety protection with remote control FPGA User PC Driver Driver Scope busbar busbar Series Protection VCE DUT ETH ETH RS232 CDC IC E G C VGE VDC L DUT Series Protection tSC Max. 2.4 kV 4xIGBTs (3kA/3.3kV) LT = 50 nH 10xCap. (500 µF)
  • 17. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs 12Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Experimental Test Bench The 2.4-kV / 10-kA NDT at CORPE Capable of Repetitive Short Circuit (RSC) testing of medium-to-high power Si and SiC modules Capable of heating plate temperature control from -40◦ C to 250◦ C Highly automated testing and safety protection with remote control
  • 18. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs 13Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Experimental Test Bench The dynamic substrate test bench at ABB Capable of Repetitive Short Circuit (RSC) testing of High-Voltage semiconductors mounted on a substrate Capable of temperature control from room temperature up to 175◦ C Highly automated testing (LabVIEW) and safety protection Programmable Logic Controller (PLC) Gate drivers Substrate press Oscilloscope PC Capacitor bank Bus inductance 3 x 160 µF Max. 6.5 kV 50 nH...1 µH
  • 19. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench 14Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Chip technology The 3.3-kV planar IGBT Conditions: VCE = 1800 V; Pulse width = 10 µs; T = 25◦ C Different collector doping: strong vs. weak anode Strong anode → No oscillations 0 1 2 3 VCE[kV] Weak anode Strong anode 0 200 400 600 800 IC[A] 0 2 4 6 8 10 12 −40 −20 0 20 40 time [µs] VGE[V] P+ N- EE G P+ P+ N+ N+ C EE G N+ P + N+ N+ enhancement P+ N+ Planar IGBT
  • 20. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench 15Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Chip technology The 3.3-kV trench IGBT Conditions: VCE = 1200 V; Pulse width = 10 µs; T = 25◦ C Trench technology worsens oscillations Failure at VCE = 1.5 kV 0 1 2 3 VCE[kV] VDC = 1.2 kV VDC = 1.5 kV 0 200 400 600 800 1,000 IC[A] 0 2 4 6 8 10 12 −40 −20 0 20 40 Failure time [µs] VGE[V] P+ N- P+ N- EE G E EG P+ N+ P+ N+ P+ P+ N+ N+ C C EE G E E G P + N+ P+ N + N+ P + N+ N+ enhancement P+ N+ N+ enhancement Planar IGBT Trench IGBT
  • 21. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench 16Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Chip technology The 3.3-kV planar BIGT (Bi-Mode Insulated Gate Transistor) Conditions: VCE = 1800 V; Pulse width = 10 µs; T = 25◦ C BIGT → significant improvement The BIGT differs from the IGBT in the collector design 0 1 2 3 VCE[kV] 0 200 400 600 800 IC[A] 0 2 4 6 8 10 12 −20 0 20 40 time [µs] VGE[V] P+ N- P+ N- EE G E EG P+ N+ P+ N+ P+ P+ N+ N+ C C P+ N- P+ N- EE G E E G P + N+ P+ N + N+ P + N+ N+ enhancement C P+ N+ N+ enhancement C P+ N - EE G N+ G C P N N+ P+ N - EE G P P + N + N + ++ +N+ P + N+ N+ Pilot IGBT RC-IGBT N+ short Planar IGBT Trench IGBT Enhanced-Planar IGBT Enhanced-Trench IGBT Planar BIGT N+ short
  • 22. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench 16Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Chip technology The 3.3-kV trench BIGT (Bi-Mode Insulated Gate Transistor) Conditions: VCE = 1800 V; Pulse width = 10 µs; T = 25◦ C BIGT → significant improvement The BIGT differs from the IGBT in the collector design 0 1 2 3 VCE[kV] −200 0 200 400 600 800 IC[A] 0 2 4 6 8 10 12 −20 0 20 40 time [µs] VGE[V] P+ N- P+ N- EE G E P+ N+ P+ P+ N+ N+ C P+ N- P+ N- EE G E P + N+ N+ P + N+ N+ enhancement C P+ N+ N+ en P+ N - EE G N+ G C P N N+ E P++ +N+ P + N+ Pilot IGBT N+ short Planar IGBT Trenc Enhanced-Planar IGBT Enhanced- Planar BIGT P+ N - E E G P + N+ P +N + N + enhancement E G N+ P +N + N+ N+ N+ short N+ short
  • 23. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology 17Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Testing conditions 0 0.5 1 1.5 2 VCE[kV] T = 25◦ C T = 100◦ C 0 200 400 600 IC[A] 0 2 4 6 8 10 12 −20 0 20 40 time [µs] VGE[V] Influence of testing conditions: Temperature effect Conditions: T = 25◦ C; T = 100◦ C Device tested: 3.3-kV enhanced-planar IGBT (SPT+ ) High temperature → lower oscillations
  • 24. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology 18Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Testing conditions 0 1 2 3 VCE[kV] 0 200 400 600 800 IC[A] VDC = 1.9 kV VDC = 1 kV 0 2 4 6 8 10 12 −20 0 20 40 time [µs] VGE[V] Influence of testing conditions: DC-link voltage effect Conditions: VDC = 1 kV; VDC = 1.9 kV Device tested: 3.3-kV enhanced-planar IGBT (SPT+ ) High DC-link voltage → no oscillations
  • 25. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology 19Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Testing conditions 0 0.2 0.4 0.6 0.8 1 VCE[kV] VGE = 17 V VGE = 15 V 0 200 400 600 IC[A] 0 2 4 6 8 10 12 −40 −20 0 20 40 time [µs] VGE[V] Influence of testing conditions: Gate-voltage effect Conditions: VGE = 15 V; VGE = 17 V Device tested: 3.3-kV enhanced-planar IGBT (SPT+ ) Low VGE → no oscillations
  • 26. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions 20Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Layout influence Comparison among three different manufacturers Conditions: VCE = 400 V; T= 25◦ C; VGE = 15 V Device tested: 1.7 kV/1 kA trench IGBT power module Manufacturer A and B show oscillations Manufacturer A Manufacturer B -0.5 0 0.5 1 1.5 2 2.5 3 -15 -10 -5 0 5 10 15 20 25 0 1 2 3 4 0 200 400 600 800 -0.5 0 0.5 1 1.5 2 2.5 3 -15 -10 -5 0 5 10 15 20 25 0 1 2 3 4 200 400 600 800 Time [µs] VCE[V] IC[kA] VGE[V] Time [µs] 0 VCE[V] VGE[V] IC[kA] Gate zoom-inGate zoom-in IC VGE VCE VGE IC VCE
  • 27. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions 21Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Layout influence Comparison among three different manufacturers Conditions: VCE = 400 V & VCE = 900 V Device tested: 1.7 kV/1 kA trench IGBT power module Manufacturer C does not oscillate Manufacturer C Manufacturer C -0.5 0 0.5 1 1.5 2 2.5 3 -15 -10 -5 0 5 10 15 20 25 0 1 2 3 4 0 200 400 600 800 -0.5 0 0.5 1 1.5 2 2.5 3 -15 -10 -5 0 5 10 15 20 25 0 1 2 3 4 200 400 600 800 Time [µs] VCE[V] IC[kA] VGE[V] Time [µs] 0 VCE[V] VGE[V] IC[kA] Gate zoom-inGate zoom-in IC VGE VCE VGE IC VCE -0.5 0 0.5 1 1.5 2 2.5 3 -15 -10 -5 0 5 10 15 20 25 0 1 2 3 4 0 200 400 600 800 VCE[V] IC[kA] VGE[V] Time [µs] VGE IC VCE 0 2 4 6 8 10 12 -15 -10 -5 0 5 10 15 20 25 0 1 2 3 4 5 6 200 400 600 800 1000 1200 1400 VCE[V] IC[kA] VGE[V] Time [µs] VCE IC VGE
  • 28. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions 22Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Layout influence Layout sensitivity analysis: w/o Kelvin emitter Different layouts on DCB (Direct Copper Bond) substrates High Side (HS) Low Side (LS) Gate return path (HS) Gate return path (LS) Gate path (HS) Gate path (LS) IGBT Diode IGBTDiode DC - DC +Output 1 3 2 4 5 6 1 3 2 4 5 6 High Side (HS) Low Side (LS) Gate return path (HS) Gate return path (LS) Gate path (HS) Gate path (LS) DC - DC +Output IGBT Diode IGBT Diode IGBT Diode IGBT Diode Gate return path (LS) High Side (HS) Gate path (HS) 2 Output Output 5 DC + DC - 4 1 3 6 5 0 10 20 30 40 Gate path (1-2) Emitter path (2-3) Power loop (4-5) Layout 2 Layout 1 Layout 3 [nH] Layout 1 Layout 3 Layout 2
  • 29. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions 23Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The Short-Circuit performance in IGBTs Layout influence High Side (HS) Low Side (LS) Gate return path (HS) Gate return path (LS) Gate path (HS) Gate path (LS) IGBT Diode IGBTDiode DC - DC +Output 1 3 2 4 5 6 1 3 2 4 5 6 High Side (HS) Low Side (LS) Gate return path (HS) Gate return path (LS) Gate path (HS) Gate path (LS) DC - DC +Output IGBT Diode IGBT Diode IGBT Diode IGBT Diode Gate return path (LS) High Side (HS) Gate path (HS) 2 Output Output 5 DC + DC - 4 1 3 6 5 0 10 20 30 40 Gate path (1-2) Emitter path (2-3) Power loop (4-5) Layout 2 Layout 1 Layout 3 [nH] 100 200 300 400 500 VCE[V] Layout 1 Layout 2 Layout 3 0 200 400 600 800 IC[A] −1 0 1 2 3 4 5 6 7 −10 0 10 20 time [µs] VGE[V] 50 100 150 200 250 VCE[V] Layout 1 Layout 1 + LG 0 200 400 600 IC[A] 0 1 2 3 4 5 6 −10 0 10 20 time [µs] VGE[V] 13 16 Layout sensitivity analysis: w/o Kelvin emitter Fast turn-on/off is not beneficial Large LG → oscillations
  • 30. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity 24IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations IGBT design
  • 31. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity 24IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations IGBT design Emitter Emitter Collector Collector X [um] X [um] Y[um] Y[um] Sensitivity analysis on the oscillating behaviour’s dependence Investigation strategy Planar IGBT: ease and computational time Trench IGBT: validate the hypothesis
  • 32. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity 25IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations IGBT design Static I − V curve IC VCEV = 1 kVVCE(sat) IL SS SS SS SS ISC
  • 33. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity 25IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations IGBT design Static I − V curve Electric field dominated by injected carriers (Neff < 0) The electron density is not homogeneous at the surface With increasing VCE , the electron flow becomes narrower increasing VCE increasing VCE 1000 V 1500 V 2000 V 2500 V
  • 34. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design 26Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Layout Influence Short-circuit simulations with TCAD Layout influence: 1. Collector inductance, LC 2. Gate inductance, Lg 3. Emitter inductance, Le Rg = 1 Ω VGG VDC Le = 10 nH LC = 1.2 µ H Lg = 40 nH P+ N+ buffer N-base P-base N+ emitter EG C VCE VGE ig ic 15V 1 kV
  • 35. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design 27Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Layout Influence Effect of collector inductance, LC The lesser LC → more robust The higher LC → increased undershoot The lesser LC → higher oscillation frequency 0 1 2 3VCE[kV] 0 100 200 300 400 IC[A] LC = 0.4 µH LC = 0.8 µH LC = 1 µH 1 2 3 4 5 6 7 8 9 10 12 14 16 18 time [µs] VGE[V]
  • 36. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design 28Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Layout Influence Effect of gate inductance, Lg The lesser Lg → the more robust The higher Lg → higher oscillation amplitude The lesser Lg → higher oscillation frequency 0 1 2 3VCE[kV] 0 100 200 300 400 IC[A] Lg = 20 nH Lg = 50 nH Lg = 70 nH 1 2 3 4 5 6 7 8 9 10 12 14 16 18 time [µs] VGE[V]
  • 37. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design 29Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Layout Influence Effect of emitter inductance, Le The larger Le → the more robust The higher Le → higher oscillation amplitude The lesser Le → smaller oscillation frequency 0 1 2 3VCE[kV] 0 100 200 300 400 IC[A] Le = 3 nH Le = 15 nH Le = 20 nH 1 2 3 4 5 6 7 8 9 10 12 14 16 18 time [µs] VGE[V]
  • 38. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 30Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence DC-link voltage effect: VDC = 1 kV & VDC = 2 kV High VDC → no oscillations t0 t1 t2 t3 t4 t5 0 1 2 3 VCE[kV] 0 100 200 300 400 IC[A] VDC = 1 kV VDC = 2 kV 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V]
  • 39. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 30Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence DC-link voltage effect: VDC = 1 kV & VDC = 2 kV High VDC → no oscillations t0 0 1 2 3 VCEkV] 0 100 200 300 IC[A] VDC = 1 kV VDC = 2 kV 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF EF
  • 40. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 30Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence DC-link voltage effect: VDC = 1 kV & VDC = 2 kV High VDC → no oscillations t1 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] VDC = 1 kV VDC = 2 kV 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF EF
  • 41. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 30Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence DC-link voltage effect: VDC = 1 kV & VDC = 2 kV High VDC → no oscillations t2 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] VDC = 1 kV VDC = 2 kV 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF EF
  • 42. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 30Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence DC-link voltage effect: VDC = 1 kV & VDC = 2 kV High VDC → no oscillations t3 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] VDC = 1 kV VDC = 2 kV 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF EF
  • 43. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 30Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence DC-link voltage effect: VDC = 1 kV & VDC = 2 kV High VDC → no oscillations t4 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] VDC = 1 kV VDC = 2 kV 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF EF
  • 44. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 30Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence DC-link voltage effect: VDC = 1 kV & VDC = 2 kV High VDC → no oscillations A carrier accumulation effect is observed at the surface t5 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] VDC = 1 kV VDC = 2 kV 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricFIeld[V/cm] ElectronConcentration[cm-3] e EF EF
  • 45. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 31Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence Gate voltage effect: VGE = 15 V & VGE = 13 V Low VGE → no oscillations t0 t1 t2 t3 t4 t5 0 1 2 3 VCE[kV] 0 100 200 300 400 IC[A] 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V]
  • 46. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 31Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence Gate voltage effect: VGE = 15 V & VGE = 13 V Low VGE → no oscillations t0 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e only <3>{ incl udeg raphi cs[sc ale= 0.45] {pic/ VDC _sen sitivi ty_4. pdf} } EF
  • 47. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 31Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence Gate voltage effect: VGE = 15 V & VGE = 13 V Low VGE → no oscillations t1 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF
  • 48. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 31Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence Gate voltage effect: VGE = 15 V & VGE = 13 V Low VGE → no oscillations t2 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF
  • 49. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 31Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence Gate voltage effect: VGE = 15 V & VGE = 13 V Low VGE → no oscillations t3 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF
  • 50. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 31Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence Gate voltage effect: VGE = 15 V & VGE = 13 V Low VGE → no oscillations t4 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF
  • 51. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 31Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence Gate voltage effect: VGE = 15 V & VGE = 13 V Low VGE → no oscillations A carrier accumulation effect is observed at the surface t5 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF
  • 52. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 32Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence Temperature effect: T = 100◦ C & T = 25◦ C Low T → oscillations come later t0 t1 t2 t3 t4 t5 0 1 2 3 VCE[kV] 0 100 200 300 400 IC[A] T = 100 ◦ C T = 25 ◦ C 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V]
  • 53. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 32Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence Temperature effect: T = 100◦ C & T = 25◦ C Low T → oscillations come later t0 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] T = 100 ◦ C T = 25 ◦ C 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF
  • 54. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 32Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence Temperature effect: T = 100◦ C & T = 25◦ C Low T → oscillations come later t1 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] T = 100 ◦ C T = 25 ◦ C 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF
  • 55. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 32Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence Temperature effect: T = 100◦ C & T = 25◦ C Low T → oscillations come later t2 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] T = 100 ◦ C T = 25 ◦ C 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF
  • 56. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence 32Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Testing Conditions Influence Temperature effect: T = 100◦ C & T = 25◦ C Low T → oscillations come later A carrier accumulation effect is observed at the surface t3 0 1 2 3 VCE[kV] 0 100 200 300 IC[A] T = 100 ◦ C T = 25 ◦ C 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] 0 100 200 300 0 20000 40000 60000 80000 1e+09 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] EF e
  • 57. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence 33Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Initial Conclusions Oscillatory mode (1 kV) Rotated field (Kirk Effect) Weak electric field at the surface → charge accumulation At low electric fields, vdrift α E (Je = qnvn)
  • 58. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence 33Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research TCAD Sensitivity of SC Oscillations Initial Conclusions Non-oscillatory mode (2 kV) Rotated field (Kirk Effect) Weak electric field at the surface → charge accumulation At low electric fields, vdrift α E (Je = qnvn)
  • 59. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 34Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
  • 60. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 34Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC Time-domain approach 0 2 4 6 8 10 −10 −2 6 14 22 30 VCE IC VGE time [µs] VGE[V] 0 100 200 300 400 500 IC[A] 0 1 2 3 4 5 VCE[kV] 0 1 2 3 t0 t1 t2 t3 t4 t5 VCE[kV] 14 15 16 A B VGE[V] −5 0 5 Ig[A] 300 350 400 IC[A] 5.1 5.15 5.2 5.25 5.3 5.35 5.4 5.45 0 400 800 time [µs] Ci[nF]
  • 61. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
  • 62. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
  • 63. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
  • 64. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
  • 65. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
  • 66. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
  • 67. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
  • 68. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
  • 69. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
  • 70. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
  • 71. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
  • 72. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
  • 73. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
  • 74. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
  • 75. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 35Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC
  • 76. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 36Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC + N- E G P+ N+ C N+ P+ y ve << ve,sat E y Rotated field: low VCE vh << vh,sat ve,satvh,sat Accumulation of electrons ve<<ve,sat vh<<vh,sat ve,sat vh,sat Neffective [cm-3 ]Velocity [cm/s] Two mechanisms occurring during oscillations Phase A: Rotated field → Low velocity → Charge accumulation → High C
  • 77. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon 36Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Physical Mechanisms during SC + N- E G P+ N+ C N+ P+ vh,sat E y ve << ve,sat E y : low VCE Non-rotated field: high VCE vh << vh,sat ve,satvh,sat ve,sat ve,sat vh,sat Neffective [cm-3 ] Velocity [cm/s] Two mechanisms occurring during oscillations Phase A: Rotated field → Low velocity → Charge accumulation → High C Phase B: Normal field → High velocity → No charge effects → Low C
  • 78. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms 37Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Parametric Oscillations in IGBTs Rg = 1 Ω VGG VDC Le = 10 nH LC = 1.2 µH Lg = 40 nH P+ N+ buffer N-base P-base N+ emitter EG C VCE VGE ig ic Lg = 40 nH Rg C2 = 60 nF C1 = 90 nF V(A) = V (A’) A A’ VGG = 15 V 21 (a) 15V VA i Why the gate signal becomes amplified? The input capacitance behaves as a time-varying element
  • 79. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms 37Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Parametric Oscillations in IGBTs Rg = 1 Ω VGG VDC Le = 10 nH LC = 1.2 µH Lg = 40 nH P+ N+ buffer N-base P-base N+ emitter EG C VCE VGE ig ic Lg = 40 nH Rg C2 = 60 nF C1 = 90 nF V(A) = V (A’) A A’ VGG = 15 V 21 (a) 15V VA i Why the gate signal becomes amplified? The input capacitance behaves as a time-varying element The IGBT together with the gate circuit creates a parametric oscillation
  • 80. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms 37Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Parametric Oscillations in IGBTs Rg = 1 Ω VGG VDC Le = 10 nH LC = 1.2 µH Lg = 40 nH P+ N+ buffer N-base P-base N+ emitter EG C VCE VGE ig ic Lg = 40 nH Rg C2 = 60 nF C1 = 90 nF V(A) = V (A’) A A’ VGG = 15 V 21 (a) 15V VA i Why the gate signal becomes amplified? The input capacitance behaves as a time-varying element The IGBT together with the gate circuit creates a parametric oscillation An energy transfer between the varying capacitance and the series-connected gate inductance occurs
  • 81. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms 37Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Parametric Oscillations in IGBTs Rg = 1 Ω VGG VDC Le = 10 nH LC = 1.2 µH Lg = 40 nH P+ N+ buffer N-base P-base N+ emitter EG C VCE VGE ig ic Lg = 40 nH Rg C2 = 60 nF C1 = 90 nF V(A) = V (A’) A A’ VGG = 15 V 21 (a) 15V VA i Why the gate signal becomes amplified? The input capacitance behaves as a time-varying element The IGBT together with the gate circuit creates a parametric oscillation An energy transfer between the varying capacitance and the series-connected gate inductance occurs A PSpice simulation proves the hypothesis
  • 82. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms 38Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Parametric Oscillations in IGBTs Why the gate signal becomes amplified? 4 energy transfers between L and C Amplification: Large C → energy is stored in C (1 ; 3) Small C → energy is stored in L (2; 4) Switch (S): High C in 3 and small C in 2 i VA Amplification CsmallCbig 2;4 1;3Attenuation 1;3 2;4 −40 −20 0 20 40 S VA[V] 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 3.8 4 -1 -0.5 0 0.5 1 time [µs] i[A]
  • 83. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms 39Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Parametric Oscillations in IGBTs How the gate signal becomes attenuated? 4 energy transfers between L and C Attenuation: Large C → energy is stored in L (2 ; 4) Small C → energy is stored in C (1; 3) Switch (S): High C in 2 and small C in 3 i VA Amplification CsmallCbig 2;4 1;3Attenuation 1;3 2;4 0 10 20 30 S VA[V] 2 2.2 2.4 2.6 2.8 3 3.2 3.4 −0.2 −0.1 0 0.1 0.2 time [µs] i[A]
  • 84. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations 40Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Device Solutions to Mitigate Oscillations Optimization of the carrier profile Increase of the electric field at the surface Adjustment of the drift region doping → (SBL) High-injection-efficiency emitters → (Collector doping) Profiled lifetime control techniques Reduction of the electron injection from the MOS-channel dE dx = q s (ND + h − e) (1)
  • 85. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations 41Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Device Solutions to Mitigate Oscillations Surface-Buffer Layer (SBL) Increase dE dx by inserting an n-doped buffer layer
  • 86. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations 41Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Device Solutions to Mitigate Oscillations Surface-Buffer Layer (SBL) Increase dE dx by inserting an n-doped buffer layer No oscillations! Short Circuit Operation 0 1 2 3 VCE IC VCE[kV] 0 200 400 IC[A] 0 1 2 3 4 5 6 7 0 5 10 15 time [µs] VGE[V] Standard ND = 8e+13; D = 100
  • 87. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations 41Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Device Solutions to Mitigate Oscillations Surface-Buffer Layer (SBL) Increase dE dx by inserting an n-doped buffer layer No oscillations! Short Circuit Operation 0 50 100 150 200 250 300 350 0 0.5 1 1.5 ·105 Surface buffer layer Y [µm] Electricfield[V/cm] 1011 1012 1013 1014 1015 1016 1017 Electrondensity[cm−3 ]
  • 88. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations 42Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Device Solutions to Mitigate Oscillations Surface-Buffer Layer (SBL): trade-off Reduced blocking capability Reduced on-state losses Similar turn-off losses 3,000 3,500 4,000 4,500 0 0.2 0.4 0.6 0.8 1 VCE [V] IC[mA] Standard SBL 0 2 4 6 8 10 12 0 100 200 VCE [V] IC[A] Standard SBL
  • 89. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations 43Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Device Solutions to Mitigate Oscillations Short Circuit Operation t4 0 1 2 3 VCE[kV] 0 100 200 300 400 IC[A] NA = 1e+17 cm−3 NA = 2e+17 cm−3 1 2 3 4 5 6 7 0 10 20 time [µs] VGE[V] Effect of collector doping The doping the p+ collector has been increased The Efield is stronger at the emitter with larger γemitter No oscillations!
  • 90. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations 43Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Device Solutions to Mitigate Oscillations Short Circuit Operation 0 100 200 300 0 20000 40000 60000 80000 1e+10 1e+11 1e+12 1e+13 1e+14 1e+15 1e+16 Y [um] ElectricField[V/cm] ElectronConcentration[cm-3] e EF EF Effect of collector doping The doping the p+ collector has been increased The Efield is stronger at the emitter with larger γemitter No oscillations!
  • 91. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations 44Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Device Solutions to Mitigate Oscillations Effect of collector doping: trade-off Similar blocking capability Reduced on-state losses Increased turn-off losses 0 2 4 6 8 10 12 0 50 100 150 200 250 VCE [V] IC[A] NA = 1e+17 cm−3 NA = 2e+17 cm−3 0 100 200 300 0 100 200 300 Y [µm] Electricfield[V/cm] 1014 1015 1016 Electrondensity[cm−3 ]
  • 92. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations 44Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Oscillation Phenomenon Device Solutions to Mitigate Oscillations Effect of collector doping: trade-off Similar blocking capability Reduced on-state losses Increased turn-off losses 0 0.5 1 1.5 2 VCE[kV] 0 20 40 60 80 IC[A] 0 5 10 15 20 VGE[V] NA =1e+17 cm−3 NA =2e+17 cm−3 7.2 7.4 7.6 7.8 8 8.2 8.4 8.6 8.8 9 0 50 100 Time [µs] POFF[mW]
  • 93. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions 45Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Conclusions Starting point conditions: IGBT short-circuit robustness limited by oscillations Different interpretations from the device or circuit design
  • 94. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions 45Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Conclusions Starting point conditions: IGBT short-circuit robustness limited by oscillations Different interpretations from the device or circuit design Findings: Study the interaction between circuit and device Electric field fluctuations → Miller capacitance variations The IGBT together with the gate circuit creates a parametric oscillation
  • 95. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions 45Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions Future research Conclusions Starting point conditions: IGBT short-circuit robustness limited by oscillations Different interpretations from the device or circuit design Findings: Study the interaction between circuit and device Electric field fluctuations → Miller capacitance variations The IGBT together with the gate circuit creates a parametric oscillation Solutions: Device designs to avoid weak electric field at the surface Application-related solutions.
  • 96. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs 46Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Performance in SiC MOSFETs Single-chip SiC MOSFETS
  • 97. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs 46Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Performance in SiC MOSFETs Single-chip SiC MOSFETS 300 350 400 450 500 VDS[V] 0 50 100 150 Tail current ID[A] 0 2 4 6 8 10 12 14 −10 0 10 20 time [µs] VGS[V] 19.5 20.5 What do we know about the SCSOA of SiC MOSFETs? Failure indicators in SiC MOSFETs: 1. Turn-off tail currents 2. Gate voltage drop with increasing short-circuit time Short-circuit time increase →
  • 98. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs 47Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Performance in SiC MOSFETs Single-chip SiC MOSFETS What do we know about the SCSOA of SiC MOSFETs? Temperature influence (VDC = 400 V) 1. Turn-off tail currents → No effect 2. Gate voltage drop → More critical at high T 0 50 100 150 ID[A] 25◦ C 75◦ C 100◦ C 150◦ C 0 2 4 6 8 10 12 14 −10 0 10 20 time [µs] VGS[V] 19.5 20.5
  • 99. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs 48Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Performance in SiC MOSFETs Single-chip SiC MOSFETS Failure of the 1.2 kV/ 36 A device under SC operation (I) Conditions: VDC = 600 V; Pulse width = 5 µs; T = 25◦ C Successful turn-off but thermal runaway failure 500 550 600 650 700 VDS[V] 0 50 100 150 Failure ID[A] −1 0 1 2 3 4 5 6 7 8 9 −10 0 10 20 tsc = 5 µs time [µs] VGS[V] 19.5 20.5
  • 100. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs 49Single-chip SiC MOSFET SiC Power Modules Conclusions Future research The SC Performance in SiC MOSFETs Single-chip SiC MOSFETS Failure of the 1.2 kV/ 36 A device under SC operation (II) Conditions: VDC = 600 V; Pulse width = 7.2 µs; T = 150◦ C Gate-oxide degradation mechanism takes place at high T Permanent damage of the device 500 550 600 650 700 VDS[V] 0 50 100 150 Failure Degradation ID[A] 0 2 4 6 8 10 12 −10 0 10 20 Degradation tsc = 7.2 µs time [µs] VGS[V]
  • 101. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET 50SiC Power Modules Conclusions Future research The SC Performance in SiC MOSFETs SiC Power Modules Failure of the 1.2 kV/ 300 A device under SC operation Conditions: VDC = 600 V; Pulse width = 3.2 µs; T = 25◦ C Successful turn-off but thermal runaway failure Failure 4 5 6 7 8 -100 0 100 200 300 400 500 600 700 800 900 -10 -5 0 5 10 15 20 25 30 35 40 VDS[V] VGS[V] me [µs] Failure (a) (b) VDS VGS 200 400 600 800 1000 1200 0 5 10 15 20 25 VDS[V] VGS[V] Failure Failure VDS VGS 200 400 600 800 1,000 VDS[V] 0 2 4 6 Failure ID[kA] −1 0 1 2 3 4 5 6 7 8 −10 0 10 20 time [µs] VGS[V] 18.5 20.5
  • 102. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET 51SiC Power Modules Conclusions Future research The SC Performance in SiC MOSFETs SiC Power Modules Failure of the 1.2 kV/ 180 A device under SC operation Conditions: VDC = 800 V; Pulse width = 7.2 µs; T = 25◦ C Turn-off tail currents and gate-voltage degradation Failure 4 5 6 7 8 -100 0 100 200 300 400 500 600 700 800 900 -10 -5 0 5 10 15 20 25 30 35 40 VDS[V] VGS[V] e [µs] Failure a) (b) VDS VGS 8 10 12 14 16 -200 0 200 400 600 800 1000 1200 -10 -5 0 5 10 15 20 25 VDS[V] [µs] VGS[V] Failure Failure ) (b) VDS VGS 0 200 400 600 800 1000 1200 -10 0 10 20 30 40 50 VDS[V] VGS[V] VDS VGS Failure 400 600 800 1,000 1,200 VDS[V] 0 0.5 1 1.5 2 Failure ID[kA] −10 150 0 2 4 6 8 10 12 14 16 −10 0 10 20 Degradation time [µs] VGS[V]
  • 103. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules 52Conclusions Future research Conclusions Problem: Experiments demonstrate that SiC MOSFETs withstand short circuit conditions to some extent (less than 10 µs ). Two type of failures: 1. Gate-oxide degradation 2. Thermal runaway failure
  • 104. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules 52Conclusions Future research Conclusions Problem: Experiments demonstrate that SiC MOSFETs withstand short circuit conditions to some extent (less than 10 µs ). Two type of failures: 1. Gate-oxide degradation 2. Thermal runaway failure Interpretation: Two failure indicators have been identified: 1. Turn-off tail current 2. Gate-emitter voltage drop
  • 105. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules 52Conclusions Future research Conclusions Problem: Experiments demonstrate that SiC MOSFETs withstand short circuit conditions to some extent (less than 10 µs ). Two type of failures: 1. Gate-oxide degradation 2. Thermal runaway failure Interpretation: Two failure indicators have been identified: 1. Turn-off tail current 2. Gate-emitter voltage drop Tentative solution: Cell density must be decreased.
  • 106. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions 53Future research Future Research Silicon IGBTs Find optimum trade-off between SC robustness and efficient operation under normal conditions (Lstray , T, VDC, VGE , SBL, γemitter ). Modelling of self-heating effects under short circuit. Guideline to design IGBTs depending on its application, including abnormal operation. SiC power MOSFETs Understanding of the failure mechanisms in SiC power MOSFETs under short-circuit conditions. Optimization of the device cell to minimize temperature-related failure mechanisms.
  • 107. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions 54Future research List of Publications Journal Papers J1. P.D. Reigosa, F. Iannuzzo, H. Luo and F. Blaabjerg, “A Short Circuit Safe Operation Area Identification Criterion for SiC MOSFET Power Modules,” in IEEE Transactions on Industry Applications, vol. 53, no. 3, pp. 2880-2887, May-June 2017. J2. P.D. Reigosa, D. Prindle, G. Paques, S. Geissmann, F. Iannuzzo, A. Kopta and M. Rahimo, “Comparison of Thermal Runaway Limits under Different Test Conditions Based on a 4.5 kV IGBT,” Microelectronics Reliability, pp. 524-529, Sept. 2016. J3. P.D. Reigosa, R. Wu, F. Iannuzzo and F. Blaabjerg, “Robustness of MW-Level IGBT Modules Against Gate Oscillations under Short Circuit Events,” Microelectronics Reliability, vol. 55, issue 9-10, pp. 1950-1955, Oct. 2015. J4. R. Wu, P.D. Reigosa, F. Iannuzzo, L. Smirnova, H. Wang and F. Blaabjerg, “Study on Oscillations during Short Circuit of MW-Scale IGBT Power Modules by Means of a 6-kA/1.1-kV Non-destructive Testing System,”IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 3, issue 3, pp. 756-765, Sept. 2015. J5. P.D. Reigosa, F. Iannuzzo, M. Rahimo, C. Corvasce and F. Blaabjerg, “Improving the Short-Circuit Reliability in IGBTs - How to Mitigate Oscillations,” submitted to IEEE Transactions on Power Electronics, in review, 2017. J6. P.D. Reigosa, F. Iannuzzo, M. Rahimo,and F. Blaabjerg, “Capacitive Effects in IGBTs Limiting their Reliability under Short Circuit,” accepted to Microelectronics Reliability, in review, 2017.
  • 108. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions 55Future research List of Publications Conference Papers C1. P.D. Reigosa, H. Wang, F. Iannuzzo and F. Blaabjerg, “Approaching Repetitive Short Circuit Tests on MW-Scale Power Modules by means of an Automatic Testing Setup,” in Proc. of the IEEE Energy Conversion Congress and Exposition, Sept. 2016. C2. P.D. Reigosa, F. Iannuzzo, H. Luo and F. Blaabjerg, “Investigation on the Short Circuit Safe Operation Area of SiC MOSFET Power Modules,” in Proc. of IEEE Energy Conversion Congress and Exposition, Sept. 2016. C3. C.G. Suarez, P.D. Reigosa, F. Iannuzzo, I. Trintis and F. Blaabjerg, “Parameter Extraction for PSpice Models by means of an Automated Optimization Tool - An IGBT model Study Case,” in Proc. of PCIM Europe, May. 2016. C4. P.D. Reigosa, F. Iannuzzo, S.M. Nielsen and F. Blaabjerg, “New layout concepts in MW-scale IGBT modules for higher robustness during normal and abnormal operations,” in Proc. of APEC, pp. 288-294, March 2016. C5. R. Wu, P.D. Reigosa, F. Iannuzzo, H. Wang and F. Blaabjerg, “A Comprehensive Investigation on the Short Circuit Performance of MW-level IGBT Power Modules,” in Proc. of EPE-ECCE Europe, Sept. 2015. C6. P.D. Reigosa, R. Wu, F. Iannuzzo and F. Blaabjerg, “Evidence of turn-off gate voltage oscillations during short circuit of commercial 1.7 kV/1 kA IGBT power modules,” in Proc. of PCIM Europe, pp. 916-923, May 2015. C7. P.D. Reigosa, F. Iannuzzo and F. Blaabjerg, “Packaging Solutions for Mitigating IGBT Short-Circuit Instabilities,” in Proc. of PCIM Europe, pp., May 2017. C8. P.D. Reigosa, F. Iannuzzo and M. Rahimo, “TCAD Analysis of Short-Circuit Oscillations in IGBTs,” in Proc. of ISPSD, pp., May 2017.
  • 109. 56 SC Instabilities in IGBTs and SiC MOSFETs Introduction SC type I Motivation The SC in IGBTs Experimental Test Bench Chip technology Testing conditions Layout influence TCAD Sensitivity IGBT design Layout Influence Testing conditions influence Intial conclusions The Oscillation Phenomenon Physical Mechanisms Parametric Oscillations Device Solutions Conclusions The SC in SiC MOSFETs Single-chip SiC MOSFET SiC Power Modules Conclusions 56Future research Special Thanks to... Aalborg University: Prof. Francesco Iannuzzo Prof. Frede Blaabjerg Industrial partners: Dr. Munaf Rahimo, ABB Ltd. Semiconductors Switzerland PhD Committee: Prof. Kjeld Pedersen Prof. Ichiro Omura Dr. Caroline Andersson The Danish Strategic Research Council and Det Obelske Familiefond Center of Reliable Power Electronics (CORPE) My parents, my partner, my friends and all my colleagues from the Department of Energy Technology, Aalborg University.
  • 110. Thank you for your attention!