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A D D R E S S I N G M O D E S A N D 

F O R M A T S
C H A P T E R 1 3 I N S T R U C T I O N S E T S
L I S T O F C O N T E N T S
A d d r e s s i n g 

M o d e s
X
I n s t r u c t i o n 

F o r m a t s
P A G E 0 2 A D D R E S S I N G M O D E S 

A N D F O R M A T S
C H A P T E R 1 3 I N S T R U C T I O N S E T S
X
A s s e m b l y 

L a n g u a g e
A D D R E S S I N G M O D E S
P A G E 0 3 A D D R E S S I N G M O D E S A N D F O R M A T S
Addressing Modes specify how to calculate

the effective memory address of an operand

by using information held in registers and/or

constants contained within a machine

instruction
It provides the means & ways to access

various operands in an assembly language

program, and is completely architecture

dependent
 Immediate
 Register
Memory
►Constant integer (8, 16, or 32 bits) 
►Constant value is stored within the instruction
►Name of a register is specified
►Register number is encoded within the instruction
►Reference to a location in memory
►Memory address is encoded within the instruction
►Register holds the address of a memory location
B A S I C O P E R A N D T Y P E S
P A G E 0 5 A D D R E S S I N G M O D E S A N D F O R M A T S
A D D R E S S I N G 

M O D E S
I M M E D I A T E A D D R E S S I N G 

O P E R A N D = A
P A G E 0 6
C H A P T E R 1 3 I N S T R U C T I O N S E T S
Advantage: no memory reference.
A D D R E S S I N G M O D E S 

A N D F O R M A T S
Example: ADD 5 Add 5 to contents of accumulator
Disadvantage: size of number is restricted to size of

address field.
x86 Examples:
D I R E C T 

A D D R E S S I N G E A = A
x86 Examples
P A G E 0 7 A D D R E S S I N G M O D E S 

A N D F O R M A T S
Disadvantage: Limited address spaceDisadvantage:

Limited address space
Advantage: Single memory reference to access data
Example: ADD A Add contents of cell A to accumulator

Look in memory at address A for operand
► mov count, [var]
I N D I R E C T A D D R E S S I N G 

E A = ( A )
► A second to get the value
P A G E 0 8 A D D R E S S I N G M O D E S 

A N D F O R M A T S
x86 examples - none
Disadvantage: instruction execution requires two memory

references to fetch operand:
Example: ADD (A) Add contents of cell pointed to by

contents of A to accumulator
Advantage: for a word length of N, an address space of 2N is

now available.
Parentheses are to be interpreted as meaning contents of.
► One to get the address
P A G E 0 9 C H A P T E R 1 3 I N S T R U C T I O N S E T S
R E G I S T E R A D D R E S S I N G 

E A = R
A D D R E S S I N G M O D E S 

A N D F O R M A T S
Typically, an address field that references registers will have

from 3 to 5 bits, so that a total of from 8 to 32 general-purpose

registers can be referenced.
x86 Examples
 Disadvantage
Advantage:
► Only a small address field is needed in instruction.
► No memory references are required
► Address space is very limited.
► MOV EAX,EBX MOV CX,DX
R E G I S T E R A D D R E S S I N G 

E A = R
P A G E 1 0
Operand is in memory cell pointed to by contents of register R.
A D D R E S S I N G M O D E S 

A N D F O R M A T S
MOV AL,[BX] MOV AX,[EBX]
MOV [EDI],EAX MOV [EAX],EDX
x86 Example
Advantages: basically same for indirect addressing. Register indirect addressing

has a large address space (2N). Register indirect addressing uses one less

memory reference than indirect addressing.
E
Z
=
A
+
( R )
C H A P T E R 1 3 I N S T R U C T I O N S E T S
P A G E 1 1 A D D R E S S I N G M O D E S 

A N D F O R M A T S
Address field holds two values:
A = base value
R = register that holds displacement
x86 Example
MOV AX, NAME[SI]
D I S P L A C E M E N T A D D R E S S I N G
S T A C K A D D R E S S I N G
E A = T O P O F S T A C K
P A G E 1 2
C H A P T E R 1 3 I N S T R U C T I O N S E T S
A D D R E S S I N G M O D E S 

A N D F O R M A T S
Machine instructions need not include a memory reference

but implicitly operate on top of stack
Stack pointer is maintained in a register
Example:ADD Pop top two items from stack, add, place the

result on top of the stack
I N S T R U C T I O N F O R M A T S
T h e i n s t r u c t i o n f o r m a t i s s i m p l y a s e q u e n c e o f b i t s ( b i n a r y 0 O r 1 ) c o n t a i n e d i n a m a c h i n e 

i n s t r u c t i o n t h a t d e f i n e s t h e l a y o u t o f t h e i n s t r u c t i o n . T h e m a c h i n e i n s t r u c t i o n c o n t a i n s n u m b e r 

o f b i t s ( p a t t e r n o f 0 a n d 1 ) . T h e s e b i t s a r e g r o u p e d t o g e t h e r c a l l e d f i e l d s .
P A G E 1 3 A D D R E S S I N G M O D E S A N D F O R M A T S
C H A P T E R 1 3 I N S T R U C T I O N S E T S
Memory size
Memory organization
Bus structure
Processor complexity
Processor speed
I N S T R U C T I O N L E N G T H


P A G E 1 4 A D D R E S S I N G M O D E S 

A N D F O R M A T S
Should be a multiple of the character length, which is usually 8 bits,

and of the length of fixed-point numbers
Affects, and is affected by:
Should be equal to the memory-transfer length or

one should be a multiple of the other
Most basic design issue
A L L O C A T I O N O F B I T S
P A G E 1 5 A D D R E S S I N G M O D E S 

A N D F O R M A T S
Number of addressing modes
Number of operands
Register versus memory
Number of register sets
Address range
Address granularity
P A G E 0 9 C H A P T E R 1 6 I N S T R U C T I O N S E T S
V A R I A B L E - L E N G T H 

I N S T R U C T I O N S


A D D R E S S I N G M O D E S 

A N D F O R M A T S
Variations can be provided efficiently and compactly
Does not remove the desirability of making all of the

instruction lengths integrally related to word length
Increases the complexity of the processor
► Because the processor does not know the length of 

the next instruction to be fetched a typical strategy is to

fetch a number of bytes or words equal to at least the

longest possible instruction
► Sometimes multiple instructions are fetched
P A G E 1 7
A
D
D
R
E
S
S
I
N
G
M
O
D
E
S


A
N
D
F
O
R
M
A
T
S
I N S T R U C T I O N 

F O R M A T
P A G E 1 8
I N S T R U C T I O N F O R M A T
A D D R E S S I N G M O D E S 

A N D F O R M A T S
1 3 . 5
P A G E 1 9
A S S E M B L Y 

L A N G U A G E
A D D R E S S I N G M O D E S 

A N D F O R M A T S
AN ASSEMBLY LANGUAGE IS A TYPE OF LOW-LEVEL

PROGRAMMING LANGUAGE THAT IS INTENDED TO

COMMUNICATE DIRECTLY WITH A COMPUTER’S

HARDWARE..
UNLIKE MACHINE LANGUAGE, WHICH CONSISTS OF

BINARY AND HEXADECIMAL CHARACTERS, ASSEMBLY

LANGUAGES ARE DESIGNED TO BE READABLE BY

HUMANS.
A S S E M B L Y L A N G U A G E
L O W - L E V E L P R O G R A M M I N G 

L A N G U A G E S S U C H A S A S S E M B L Y 

L A N G U A G E A R E A N E C E S S A R Y B R I D G E 

B E T W E E N T H E U N D E R L Y I N G 

H A R D W A R E O F A C O M P U T E R A N D T H E 

H I G H E R - L E V E L P R O G R A M M I N G 

L A N G U A G E S — S U C H A S P Y T H O N O R 

J A V A S C R I P T — I N W H I C H M O D E R N 

S O F T W A R E P R O G R A M S A R E W R I T T E N .
P A G E 2 0 A D D R E S S I N G M O D E S 

A N D F O R M A T S
A D D R E S S I N G M O D E S A N D F O R M A T S
A S S E M B L Y 

C O M P I L E R
P A G E 2 1 A D D R E S S I N G M O D E S 

A N D F O R M A T S
Fundamentally, the most basic instructions

executed by a computer are binary codes,

consisting of ones and zeros. Those codes

are directly translated into the “on” and “off”

states of the electricity moving through the

computer’s physical circuits. In essence,

these simple codes form the basis of

“machine language”, the most fundamental

variety of programming language.
T H A N K Y O U V E R Y M U C H !
A D D R E S S I N G M O D E S A N D F O R M A T S
P A G E 2 2 A D D R E S S I N G M O D E S A N D F O R M A T S

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Addressing Modes and Formats.pdf

  • 1. A D D R E S S I N G M O D E S A N D F O R M A T S C H A P T E R 1 3 I N S T R U C T I O N S E T S
  • 2. L I S T O F C O N T E N T S A d d r e s s i n g M o d e s X I n s t r u c t i o n F o r m a t s P A G E 0 2 A D D R E S S I N G M O D E S A N D F O R M A T S C H A P T E R 1 3 I N S T R U C T I O N S E T S X A s s e m b l y L a n g u a g e
  • 3. A D D R E S S I N G M O D E S P A G E 0 3 A D D R E S S I N G M O D E S A N D F O R M A T S Addressing Modes specify how to calculate the effective memory address of an operand by using information held in registers and/or constants contained within a machine instruction It provides the means & ways to access various operands in an assembly language program, and is completely architecture dependent
  • 4.  Immediate  Register Memory ►Constant integer (8, 16, or 32 bits)  ►Constant value is stored within the instruction ►Name of a register is specified ►Register number is encoded within the instruction ►Reference to a location in memory ►Memory address is encoded within the instruction ►Register holds the address of a memory location B A S I C O P E R A N D T Y P E S
  • 5. P A G E 0 5 A D D R E S S I N G M O D E S A N D F O R M A T S A D D R E S S I N G M O D E S
  • 6. I M M E D I A T E A D D R E S S I N G O P E R A N D = A P A G E 0 6 C H A P T E R 1 3 I N S T R U C T I O N S E T S Advantage: no memory reference. A D D R E S S I N G M O D E S A N D F O R M A T S Example: ADD 5 Add 5 to contents of accumulator Disadvantage: size of number is restricted to size of address field. x86 Examples:
  • 7. D I R E C T A D D R E S S I N G E A = A x86 Examples P A G E 0 7 A D D R E S S I N G M O D E S A N D F O R M A T S Disadvantage: Limited address spaceDisadvantage: Limited address space Advantage: Single memory reference to access data Example: ADD A Add contents of cell A to accumulator Look in memory at address A for operand ► mov count, [var]
  • 8. I N D I R E C T A D D R E S S I N G E A = ( A ) ► A second to get the value P A G E 0 8 A D D R E S S I N G M O D E S A N D F O R M A T S x86 examples - none Disadvantage: instruction execution requires two memory references to fetch operand: Example: ADD (A) Add contents of cell pointed to by contents of A to accumulator Advantage: for a word length of N, an address space of 2N is now available. Parentheses are to be interpreted as meaning contents of. ► One to get the address
  • 9. P A G E 0 9 C H A P T E R 1 3 I N S T R U C T I O N S E T S R E G I S T E R A D D R E S S I N G E A = R A D D R E S S I N G M O D E S A N D F O R M A T S Typically, an address field that references registers will have from 3 to 5 bits, so that a total of from 8 to 32 general-purpose registers can be referenced. x86 Examples  Disadvantage Advantage: ► Only a small address field is needed in instruction. ► No memory references are required ► Address space is very limited. ► MOV EAX,EBX MOV CX,DX
  • 10. R E G I S T E R A D D R E S S I N G E A = R P A G E 1 0 Operand is in memory cell pointed to by contents of register R. A D D R E S S I N G M O D E S A N D F O R M A T S MOV AL,[BX] MOV AX,[EBX] MOV [EDI],EAX MOV [EAX],EDX x86 Example Advantages: basically same for indirect addressing. Register indirect addressing has a large address space (2N). Register indirect addressing uses one less memory reference than indirect addressing.
  • 11. E Z = A + ( R ) C H A P T E R 1 3 I N S T R U C T I O N S E T S P A G E 1 1 A D D R E S S I N G M O D E S A N D F O R M A T S Address field holds two values: A = base value R = register that holds displacement x86 Example MOV AX, NAME[SI] D I S P L A C E M E N T A D D R E S S I N G
  • 12. S T A C K A D D R E S S I N G E A = T O P O F S T A C K P A G E 1 2 C H A P T E R 1 3 I N S T R U C T I O N S E T S A D D R E S S I N G M O D E S A N D F O R M A T S Machine instructions need not include a memory reference but implicitly operate on top of stack Stack pointer is maintained in a register Example:ADD Pop top two items from stack, add, place the result on top of the stack
  • 13. I N S T R U C T I O N F O R M A T S T h e i n s t r u c t i o n f o r m a t i s s i m p l y a s e q u e n c e o f b i t s ( b i n a r y 0 O r 1 ) c o n t a i n e d i n a m a c h i n e i n s t r u c t i o n t h a t d e f i n e s t h e l a y o u t o f t h e i n s t r u c t i o n . T h e m a c h i n e i n s t r u c t i o n c o n t a i n s n u m b e r o f b i t s ( p a t t e r n o f 0 a n d 1 ) . T h e s e b i t s a r e g r o u p e d t o g e t h e r c a l l e d f i e l d s . P A G E 1 3 A D D R E S S I N G M O D E S A N D F O R M A T S C H A P T E R 1 3 I N S T R U C T I O N S E T S
  • 14. Memory size Memory organization Bus structure Processor complexity Processor speed I N S T R U C T I O N L E N G T H P A G E 1 4 A D D R E S S I N G M O D E S A N D F O R M A T S Should be a multiple of the character length, which is usually 8 bits, and of the length of fixed-point numbers Affects, and is affected by: Should be equal to the memory-transfer length or one should be a multiple of the other Most basic design issue
  • 15. A L L O C A T I O N O F B I T S P A G E 1 5 A D D R E S S I N G M O D E S A N D F O R M A T S Number of addressing modes Number of operands Register versus memory Number of register sets Address range Address granularity
  • 16. P A G E 0 9 C H A P T E R 1 6 I N S T R U C T I O N S E T S V A R I A B L E - L E N G T H I N S T R U C T I O N S A D D R E S S I N G M O D E S A N D F O R M A T S Variations can be provided efficiently and compactly Does not remove the desirability of making all of the instruction lengths integrally related to word length Increases the complexity of the processor ► Because the processor does not know the length of the next instruction to be fetched a typical strategy is to fetch a number of bytes or words equal to at least the longest possible instruction ► Sometimes multiple instructions are fetched
  • 17. P A G E 1 7 A D D R E S S I N G M O D E S A N D F O R M A T S I N S T R U C T I O N F O R M A T
  • 18. P A G E 1 8 I N S T R U C T I O N F O R M A T A D D R E S S I N G M O D E S A N D F O R M A T S
  • 19. 1 3 . 5 P A G E 1 9 A S S E M B L Y L A N G U A G E A D D R E S S I N G M O D E S A N D F O R M A T S AN ASSEMBLY LANGUAGE IS A TYPE OF LOW-LEVEL PROGRAMMING LANGUAGE THAT IS INTENDED TO COMMUNICATE DIRECTLY WITH A COMPUTER’S HARDWARE.. UNLIKE MACHINE LANGUAGE, WHICH CONSISTS OF BINARY AND HEXADECIMAL CHARACTERS, ASSEMBLY LANGUAGES ARE DESIGNED TO BE READABLE BY HUMANS.
  • 20. A S S E M B L Y L A N G U A G E L O W - L E V E L P R O G R A M M I N G L A N G U A G E S S U C H A S A S S E M B L Y L A N G U A G E A R E A N E C E S S A R Y B R I D G E B E T W E E N T H E U N D E R L Y I N G H A R D W A R E O F A C O M P U T E R A N D T H E H I G H E R - L E V E L P R O G R A M M I N G L A N G U A G E S — S U C H A S P Y T H O N O R J A V A S C R I P T — I N W H I C H M O D E R N S O F T W A R E P R O G R A M S A R E W R I T T E N . P A G E 2 0 A D D R E S S I N G M O D E S A N D F O R M A T S A D D R E S S I N G M O D E S A N D F O R M A T S
  • 21. A S S E M B L Y C O M P I L E R P A G E 2 1 A D D R E S S I N G M O D E S A N D F O R M A T S Fundamentally, the most basic instructions executed by a computer are binary codes, consisting of ones and zeros. Those codes are directly translated into the “on” and “off” states of the electricity moving through the computer’s physical circuits. In essence, these simple codes form the basis of “machine language”, the most fundamental variety of programming language.
  • 22. T H A N K Y O U V E R Y M U C H ! A D D R E S S I N G M O D E S A N D F O R M A T S P A G E 2 2 A D D R E S S I N G M O D E S A N D F O R M A T S