John Setty is a process development and manufacturing engineering expert with over 15 years of experience in the semiconductor industry. He has held senior engineering roles at L-3 Communications, STMicroelectronics, and Microchip Technology where he has led teams to improve yield, reduce costs, transfer processes between facilities, and solve manufacturing problems. Setty has extensive experience in project management, supplier management, statistical analysis, process development, and quality systems. He holds a BS in Chemical Engineering, is a Six Sigma Greenbelt, and obtained his MBA in Project Management from the University of Texas at Dallas in 2015.

1. John Setty
7010 Salem Court, Rowlett, TX 75089 • Phone: (972) 800-5810 • John.Setty@L-3com.com
Process development and manufacturing engineering expert with broad experience in
commercial, military, and medical foundry. Work experience includes engineering management,
manufacturing / process engineering and research and development in the semiconductor
industry. Experienced in:
 Project Management
 External supplier management
 Prototype design from customer
inputs to field launch
 Statistical analysis – Minitab
 SPC development/sustaining
 DOE, lean manufacturing, ISO/QS
audit preparation
 Troubleshooting/Problem solving:
Six Sigma DMAIC, FMEA, TQM, Ford
8D, 5S
 DoD, ITAR familiarity
ProfessionalExperience
L-3 Communications, Sr. Multi-Disciplined Engineer 2009 – Present
MEMS focal plane array Sr. Multi-disciplined Engineer – A vertically integrated role, in charge
of research, integration, process development, and sustaining for the manufacture of infrared
bolometers.
 Herrmann Facility :
o Part of an Engineering team of four who managed a new factory start up to insource
the bolometer manufacturing line. Our team exceeded goals set by corporate for yield
by 15%, cycle time by two months, parts delivered by 5%, and facility costs by
$500,000.
o Mentored entry level engineers to take on process and manufacturing engineering
roles. Latest candidate took over focal-plane array sustaining, inclusive of managing
the SPC system,technical documentation, and process development through DOE
o Implemented SPC program across photo, etch and metrology functional areas
improving first pass yield by 4%
 Foundry Facility:
o Transferred laboratory-developed processes to foundry-scaled operations for all
front-end processes in the MEMs bolometer production line.
o Managed team of three engineers tasked with improving line yield. Team drove yield
from 0% at release to 45% over a two year period. The increase exceeded the internal
target of 40% resulting in a raw material savings of ~$500,000
o Furnished regular progress reports to Herrmann facility management. Reports
included WIP status, equipment status, experimental results and production concerns
voiced by our foundry partners

2. J o h n S e t t y P a g e | 2
STMicroelectronics, Sr. Engineer / Engineering Manager 2005 – 2009
Senior process engineer in plasma etch and acting etch process manager for the manufacture of
integrated circuits
 Managed etch process engineering team during shut down of the Carrollton facility
o Maintained steady communication of corporate goals to all direct reports. Set
SMART performance expectations specific to each employee based on those goals.
o Oversaw transfer of processes and products to sister ST facilities overseas in
accordance with corporate schedule.
o Counseled direct reports to better prepare them for post shutdown employment.
o Balanced engineering resources to meet production targets for the manufacturing
team and development milestones for the product team.
 Led a cross functional team dedicated to the process improvements in the LAM 4500 Oxide
Etch fleet. Over twelve months, the team achieved the following milestones:
o Increased the mean time between cleans by over 200% by combining similar
processes within the toolset. The improvement saved ~$1.5 million in annual
cleaning costs
o Reduced product yield loss caused by polymer flaking from one incident per 35
performance hours to less than one incident per 22,000 performance hours
Microchip Technology, Sr. Process/Manufacturing Engineer 2000 – 2005
Senior engineer for the manufacture of 8-bit microcontrollers.
 Led the oxide etch capacity improvement team. In six months, the team achieved its goal of
>88% tool availability while maintaining support for new technology development. Major
improvements included:
o Equipment modification to the ESC design improvement to reduce handling faults in
the LAM384T.
o Consolidation of process steps through ground-up redesign
 Developed an oxygen-rich plasma clean etch on the LAM 9400 to eliminate the formation of
poly two stringers. Improvement increased line yield across all products by an average of 6%.
Education
Bachelor of Science in Chemical Engineering, University of Cincinnati, 2000
Six Sigma Greenbelt, 2008. Renewed,2014
MBA in Project Management, University of Texas at Dallas, 2015. GPA: 3.96