After successful completion of this you should able to Understand the small signal model and characteristics of CMOS amplifiers

1. MATRUSRI ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION
ENGINEERING
SUBJECT NAME: VLSI DESIGN
FACULTY NAME: Mrs. B. Indira Priyadarshini
MATRUSRI
ENGINEERING COLLEGE

2. INTRODUCTION:
Fundamental building blocks are described. These blocks include a variety of
current mirrors, single-stage amplifiers with active loads, and differential pairs.
CMOS mirrors and gain stages are emphasized because they are prevalent in
modern designs. In addition, rather than using resistive loads and ac coupling,
the gain stages covered are shown with current-mirror active loads since such
loads are almost always used in integrated circuits.
UNIT-V
OUTCOMES:
After successful completion of this Unit students should be able to Understand
the small signal model and characteristics of CMOS amplifiers
MATRUSRI
ENGINEERING COLLEGE

3. CONTENTS:
Small Signal Model of MOSFETS
OUTCOMES:
Students will be able to Understand the small signal model and characteristics
of MOSFETs.
MODULE-I: Analog VLSI Design
MATRUSRI
ENGINEERING COLLEGE

4. Small Signal Model of MOSFETS
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•The square-root relationship for
transconductance
is useful for circuit analysis when
device sizes are fixed.
•gm = 2ID/Veff is useful during initial
circuit design when transistor sizes
are yet to be determined.
The voltage-controlled current source, gmvgs, is the most important component
of the model, with the transistor transconductance
In the active region
Effective gate-source voltage, Veff = VGS – Vtn.
Transconductance of a MOS transistor is directly proportional to Veff.
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
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


 


5. Small Signal Model of MOSFETS
MATRUSRI
ENGINEERING COLLEGE
Express gm in terms of ID rather than VGS.
Transconductance is proportional to ID
Third expression for gm is found by rearranging
Independent of μnCox and W/L
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
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 
2
eff
D
m
V
I
g
2


6. Small Signal Model of MOSFETS
MATRUSRI
ENGINEERING COLLEGE
The second voltage-controlled current-source, shown as gmvs, models the body
effect on the small-signal drain current, id
rds is proportional to L/ID and empirically adjusted to take into account second
order effects.
A
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7. 1. In a small signal equivalent model of an FET, gmVGS stand for Voltage
controlled current source.
2. Channel length modulation is taken into consideration in the small signal
model by placing a resistor between source and drain.
3. For Saturation region of operation is a Mosfet represented by its small
signal model.
4. While writing the small-signal model of circuit DC current sources are
open circuited.
Questions & Answers
MATRUSRI
ENGINEERING COLLEGE

8. CONTENTS:
Simple CMOS Current Mirror
Common Source Amplifier
OUTCOMES:
Students will be able to Understand the small signal model and characteristics
of CMOS Current Mirrors, Common Source amplifiers
MODULE-II: Analog VLSI Design
MATRUSRI
ENGINEERING COLLEGE

9. Simple CMOS Current Mirror
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A simple CMOS current mirror has a small-signal input
resistance of 1/gm1 and a small-signal output resistance rds2.
(a) A diode-connected transistor, Q1, (b) the small-signal model for Q1, and (c)
an equivalent simplified small-signal model for Q1.
The input impedance = vy/iy =1/gm1||rds1 = 1/gm1 (rds1 >> 1/gm1) = rs1
y
m
ds
y
gs
m
ds
y v
g
r
v
v
g
r
v
i 1
1
1
1
1
y





10. Simple CMOS Current Mirror
MATRUSRI
ENGINEERING COLLEGE
(a) A small-signal model for the current mirror and (b) a simplified small-
signal model for determining the small-signal output resistance, rout.
vgs2 has been connected to ground via a resistance of 1/gm1.
•Since no current flows through the 1/gm1 resistor,
•vgs2 = 0 no matter what voltage vx is applied to the current-mirror output.
MOS transistors operate unilaterally at low frequencies.
•Since gm2 vgs2 = 0, the circuit is simplified to the equivalent small-signal model
•The small-signal output resistance, rout = rds2.

11. Common Source Amplifier
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•It is a popular gain stage, especially when high input impedance is desired.
•The use of an active load takes advantage of the nonlinear, large-signal transistor
current–voltage relationship to provide large small-signal resistances without large
dc voltage drops.
with a current-mirror active load Small-signal equivalent circuit

12. Common Source Amplifier
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ENGINEERING COLLEGE
•The voltage-controlled current source modelling the body effect has not been
included since the source is at a small- signal ground, and, therefore, this
source always has 0 current.
•We have vgs1 = vin and, therefore,
Under the simple assumption that rds2 » rds1, the gain of the amplifier is one-
half the intrinsic gain of transistor Q1
Ai = gm1 rds1 » 2/(λVeff).
To maximize the gain of the stage, maximize the intrinsic gain by operating
Q1 with small Veff1.
For a fixed bias drain current, ID, the effective overdrive voltage is reduced by
increasing the device width W.
Beyond a certain width, Veff approaches zero, the transistor will enter
subthreshold operation, and no further increases in intrinsic gain are
observed.
)
2
1
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2
1
out
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in
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13. 1. According to the principle of current mirror, if gate-source potentials of
two identical MOS transistors are equal, then the channel currents should
be same.
2. On the basis of an active load, Active PMOS load type of inverting CMOS
amplifier represents low gain with highly predictable small and large
signal characteristics.
3. The input impedance of a current mirror is 1/gm l and output resistance is
rds2.
4. The common-source amplifier is a popular gain stage, especially when high
input impedance is desired.
5. The use of an active load takes advantage of the nonlinear, large-signal
transistor current–voltage relationship to provide large small-signal
resistances without large dc voltage drops.
Questions & Answers
MATRUSRI
ENGINEERING COLLEGE

14. CONTENTS:
Source-Follower or Common-Drain Amplifier
OUTCOMES:
Students will be able to Understand the small signal model and characteristics
of Common Drain amplifier.
MODULE-III: Analog VLSI Design
MATRUSRI
ENGINEERING COLLEGE

15. Source Follower
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•It provides a voltage gain close to unity, and often limited by the body effect.
•It can provide a large current gain.
•It is unilateral so it is often used as a voltage buffer.
Source Follower with a current mirror used to
supply the bias current
Low-frequency model Equivalent small-signal model

16. Source Follower
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ENGINEERING COLLEGE
The voltage-controlled current source that models the body effect of MOS
transistors has been included because the source is not at small-signal ground.
•This produces a current that is proportional to the voltage across it.
•The body effect is a major limitation on the small signal gain.
•This relationship makes the body effect equivalent to a resistor of size Rs1 =
rds1 || rds2 || 1/gs1.
Nodal equation at vout, and vgs1 = vin - vout, we have vout/Rs1 – gm1(vin – vout) = 0
To minimize circuit equation errors:
•The first term is always the node at which the currents are being summed.
This node voltage is multiplied by the sum of all admittances connected to the
node.
•The next negative terms are the adjacent node voltages, and each is multiplied
by the connecting admittance.
•The last terms are any current sources with a multiplying negative sign used
if the current is shown to flow into the node.
•Solving for vout/vin, 
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17. 1. The source follower provides a voltage gain close to unity and limited by
the body effect.
2. The source follower can provide a large current gain
3. The source follower is unilateral so it is often used as a voltage buffer.
4. The source follower also referred to as common-drain amplifiers.
5. Body-effect parameter is the major source of error causing the gain to be
less than unity.
Questions & Answers
MATRUSRI
ENGINEERING COLLEGE

18. CONTENTS:
Common Gate Amplifier
OUTCOMES:
Students will be able to Understand the small signal model and characteristics
of Common Gate amplifier.
MODULE-III: Analog VLSI Design
MATRUSRI
ENGINEERING COLLEGE

19. Common Gate Amplifier
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•It provides a voltage gain comparable to that of the
common-source amplifier, but with a relatively
low input resistance on the order of 1/gm.
•The input resistance can be larger when the amplifier
has a large small-signal load resistance.
•The voltage-dependent current source that models
the body effect has been included
A common-gate amplifier with a current-mirror active load.
Small-signal model at low frequencies Simplified small-signal model

20. Common Gate Amplifier
MATRUSRI
ENGINEERING COLLEGE
At node vout, we have vout(GL+gds1)-vs1gds1-(gm1+gs1)vs1=0v
The current going into the source of is given by is = vs1(gm1+gs1+gds1)-voutgds1
The attenuation from the input source to the transistor source
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21. 1. The common-gate amplifier provides a voltage gain comparable to that of
the common-source amplifier.
2. Low input resistance on the order of 1/gm.
3. The input resistance can be larger when the amplifier has a large small-
signal load resistance.
4. The body effect can simply ignore for transistors with grounded gates.
Questions & Answers
MATRUSRI
ENGINEERING COLLEGE

22. CONTENTS:
Source Degenerated Current Mirror
OUTCOMES:
Students will be able to Understand the small signal model and to calculate the
output resistance of Source degenerated current mirror.
MODULE-IV: Analog VLSI Design
MATRUSRI
ENGINEERING COLLEGE

23. Source Degenerated Current Mirror
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•When a small-signal resistance Rs is introduced at the source of both
transistors in a simple current mirror, the output resistance is increased by a
factor approximately equal to (1 + Rsgm).
•Used to increase this output impedance.
•No small-signal current flows into the gate, the gate voltage is 0 V
Current mirror with source degeneration Small-signal model

24. Source Degenerated Current Mirror
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vs = isRs and vgs = -vs
where gds2 = 1/rds2, which is much less than gm2.
•The above derivation ignores the body effect of the transistor, even though the
source of the transistor is not connected to a small-signal ground.
•The gate is at a small-signal ground, the body effect can be taken into account
by simply replacing gm2 in above equation with gm2+gs2.
Where gs2 is the body-effect constant. This result is only slightly different since
gs is roughly one-fifth of gm.
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25. 1. The output resistance is increased by a factor approximately equal to (1 +
Rsgm).
2. gs is roughly equal to one - fifth of gm.
3. No small-signal current flows into the gate, the gate voltage is 0 V.
4. To increase the output impedance, a source-degenerated current mirror
can be used.
Questions & Answers
MATRUSRI
ENGINEERING COLLEGE

26. CONTENTS:
Cascode Current Mirrors
OUTCOMES:
Students will be able to Understand the small signal model and to calculate the
output resistance of Cascode current mirror.
MODULE-V: Analog VLSI Design
MATRUSRI
ENGINEERING COLLEGE

27. Cascode Current Mirrors
MATRUSRI
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•The addition of a cascode device to a CMOS current mirror increases its
output resistance by approximately the gain of the cascode device, gmrds.
•The voltage swing available at the current mirror output is reduced because
some voltage drop must be maintained across the cascode device to keep it in
active mode.
•Q4 is now the cascode transistor rather than Q2, we have
Rout=rds4[1+Rs(gm4+gs4+gds4)]
where now Rs = rds2. The output impedance is given by
Rout=rds4[1+rds2(gm4+gs4+gds4)]
=rds4[1+rds2(gm4+gs4)]
=rds4(rds2gm4)
•The output impedance has been increased by a factor of gm4rds4, which is an
upper limit on the gain of a single-transistor MOS gain-stage.
•Increase in output impedance can be instrumental in realizing single- stage
amplifiers with large low-frequency gains.

28. Cascode Current Mirrors
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Disadvantage: Reduces the maximum output voltage swings possible before
transistors enter the triode region.
•An n-channel transistor to be in the active region (also called the saturation or
pinch-off region) its drain-source voltage must be greater than Veff = VGS-Vtn
where
•If all transistors have the same sizes and currents, then they all have the same
Veff and, therefore, the same gate-source voltages, VGSi = Veff + Vtn.
Also, VG3 = VGS1+VGS3 = 2Veff + 2Vtn
and VDS2 = VG3 - VGS4 = VG3 – (Veff +Vtn) = Veff + Vtn
•The smallest output voltage, VD4, can be without Q4 entering the triode region
is given by VDS2 + Veff,
The minimum allowed voltage for Vout is given by Vout > VDS2 + Veff = 2Veff1+ Vtn
which, again, is Vtn greater than the minimum value of 2Veff.
•This loss of signal swing is a serious disadvantage when modern technologies
are used that might have a maximum allowed power-supply voltage as small
as 1 V.
)
/
(
2
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W
C
I
V
ox
n
D
eff



29. 1. The addition of a cascode device to a CMOS current mirror increases its
output resistance by approximately the gain of the cascode device, gmrds.
2. The voltage swing available at the current mirror output is reduced.
3. Voltage drop must be maintained across the cascode device to keep it in
active mode.
4. The disadvantage in using a cascode current mirror is that it reduces the
maximum output voltage swings possible before transistors enter the
triode region.
Questions & Answers
MATRUSRI
ENGINEERING COLLEGE

30. CONTENTS:
Wilson Current Mirrors
OUTCOMES:
Students will be able to Understand the small signal model and to calculate the
output resistance of Wilson current mirror.
MODULE-V: Analog VLSI Design
MATRUSRI
ENGINEERING COLLEGE

31. Wilson Current Mirrors
MATRUSRI
ENGINEERING COLLEGE
•It is an example of using shunt-series feedback to increase the output
impedance.
•Feedback arrangement increases the output impedance by an amount equal
to 1 plus the loop gain.
•The output impedance without the feedback due to Q1, Q3 would be 2rds4
•Taking Q4 has source degeneration output impedance equal to 1/gm2 , which is
responsible for the 2 factor.
•The loop gain is approximately given by
Rin ≈ rds1
and the output impedance is
2
)
||
( 1
1 in
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A 
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1
4
1
1
4
ds
m
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in
ds
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out
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r

32. •One-half the output impedance for that of a cascade current mirror.
•The cascade current mirror is often preferred over the Wilson current mirror.
•In terms of output voltage swing, the minimum allowed voltage across the
current mirror, before Q4 enters the triode region, is 2Veff1+Vtn, which is similar
to that of the cascade current mirror.
•Minimizes inaccuracies caused by the large-signal output impedances of the
transistors.
•The output current would be slightly smaller than the input current because
VDS1 would be larger than VDS2.
•The small-signal output impedance would remain the same.
Wilson Current Mirrors
MATRUSRI
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33. 1. The output impedance is one-half of a cascade current mirror.
2. The output current would be slightly smaller than the input current.
3. Large gain for a single stage is due to the large impedances at the output.
4. The use of cascode stages is that they limit the voltage across the input
drive transistor .
5. The main drawback of cascode amplifiers is that the output voltage is
restricted to a narrower range than the common-source amplifier.
Questions & Answers
MATRUSRI
ENGINEERING COLLEGE

34. CONTENTS:
Cascode Gain stage
OUTCOMES:
Students will be able to Understand the small signal model and to calculate the
output resistance of Cascode Gain Stage.
MODULE-VI: Additional Topic
MATRUSRI
ENGINEERING COLLEGE

35. Cascode Gain stage
MATRUSRI
ENGINEERING COLLEGE
• The cascode gain stage uses a common-gate transistor Q2 to reduce the VDS
variations on a common-source transistor Q1.
• High output resistance providing potentially high gain and reduced short-
channel effects.
• Output voltage swing is reduced.
• Folded can provide greater output swing than the telescopic cascode.
• The folded cascode consumes more power.
(a) Telescopic-cascode amplifier (b) Folded-cascode amplifier

36. Cascode Gain stage
MATRUSRI
ENGINEERING COLLEGE
There are two major reasons for its the popularity.
1. Have quite large gain for a single stage due to the large impedances at the
output.
• To enable this high gain, the current sources connected to the output
nodes are realized using high-quality cascode current mirrors.
2. Limit the voltage across the input drive transistor.
• This minimizes any shortchannel effects, more important with modern
technologies having very short channel-length transistors.
• It can also permit the circuit to handle higher output voltages without
risking damage to the common-source transistor.
•Impedance looking into the drain of cascade transistor Q2 is rd2 = gm2rds1rds2
•The total output resistance will be Rout = rd2||RL
•Low-frequency admittance looking into the source of the common-gate or
cascode transistor, Q2,
2
2
2
2
2
2
2
1
1
/
1
ds
L
m
ds
L
ds
s
m
in
in
r
R
g
r
R
g
g
g
r
g








37. Cascode Gain stage
MATRUSRI
ENGINEERING COLLEGE
&
using the results of our previous analysis and dropping all indices to obtain an
approximate result. Substituting RL=gmr2
ds
the gain from the input
and since RL >> rds2, the gain from to the output
ds
m
ds
L
out r
g
r
R
R 2
2
2
1
|| 

2
2
2
2
1
2
1










ds
m
ds
m
v
g
g
r
g
A
ds
m
s
out
r
g
v
v

2
ds
m
in
s
r
g
v
v
2
1
2

ds
in
ds
ds
m
ds
m
in
in r
r
g
r
g
g
g
r
g 




 2
2
2
2
1
/
1
)
||
)(
||
( 2
2
1
2
1
2
2
L
ds
in
ds
m
m
s
out
in
s
v R
r
r
r
g
g
v
v
v
v
A 

L
ds
m
L
ds
m
L
ds
ds
s
m
s
out
G
g
g
R
r
g
G
g
g
g
g
v
v







2
2
2
2
2
2
2
2
2
)
||
(
L
ds
m
L
ds
m
L
ds
ds
s
m
s
out
G
g
g
R
r
g
G
g
g
g
g
v
v







2
2
2
2
2
2
2
2
2
)
||
(

38. 1. The cascode gain stage uses a common-gate transistor Q2 to reduce the VDS
variations on a common-source transistor Q1.
2. High output resistance providing potentially high gain and reduced short-
channel effects.
3. The available output voltage swing is reduced.
4. The output voltage is restricted to a narrower range than the common-
source amplifier
Questions & Answers
MATRUSRI
ENGINEERING COLLEGE

39. Question Bank
MATRUSRI
ENGINEERING COLLEGE
Short Answer Question
S.No Question
Blooms
Taxonomy
Level
Course
Outcome
1
Give the expression for the output impedance of a source
degenerated current mirror.
L1 CO5
2
Draw the small signal model of a common gate amplifier with
current mirror.
L1 CO5
3
Draw the schematic of a PMOS common-source amplifier with
NMOS current mirror active load.
L1 CO5
4 Explain CMOS Current mirror. L2 CO5
5
Draw the circuit diagram of Common source amplifier and
explain the operation.
L2 CO5
6 Draw the small signal model of MOSFET. L1 CO5
7 What is a Cascode Amplifier. L1 CO5

40. Question Bank
MATRUSRI
ENGINEERING COLLEGE
Long Answer Question
S.No Question
Blooms
Taxonomy
Level
Course
Outcome
1 Derive the output resistance of the source follower. L5 CO5
2 If PMOS common-source amplifier is designed using the same
bias currents and the same size transistors as the NMOS
common-source amplifier, which is likely to have the higher
gain? Why?
L2 CO5
3 Using small-signal analysis, find the output resistance of a MOS
cascode current mirror. Include in analysis the voltage-
dependent current source that models the body effect.
L2 CO5
4 Draw and Explain the source degenerated current mirror. L2 CO5
5 Derive the output resistance of the current mirror where a
diode-connected transistor has been included in series with
the source of the output transistor. Ignore the body effect.
L5 CO5
6 Draw and Explain the operation of Wilson current mirror. L2 CO5
7 Draw the small signal model of Common Source Amplifier with
current mirror and explain with its characteristics?
L5 CO5
8 Explain the operation of common gate amplifier. L2 CO5

41. Assignment Questions
MATRUSRI
ENGINEERING COLLEGE
1. Derive the expression for the voltage gain of common source amplifier with
current mirror load.
2. How the output resistance can be increased using cascade current mirror.
Derive the expression for rout.
3. Derive the expression for the output current of a basic MOS current mirror.
4. Explain the characteristics of common gate amplifier with neat diagram.
5. Draw and Explain the Wilson current mirror.