Pv system


Published on

Published in: Education, Business, Technology
  • Be the first to comment

  • Be the first to like this

No Downloads
Total views
On SlideShare
From Embeds
Number of Embeds
Embeds 0
No embeds

No notes for slide

Pv system

  1. 1. Jun. 30 IJASCSE Vol 1 Issue 1 2012 GRID CONNECTED PV SYSTEM: Use of Single phase Inverter 1 K. Kartikaye, 2Aruna R.Abstract because of shortage of fossil fuels and greenhouse effect. Among various typesThis paper presents a single-phase five- of renewable energy sources, solarlevel photovoltaic (PV) inverter topology energy and wind energy have becomefor grid-connected PV systems with a very popular and demanding due tonovel pulsewidth-modulated (PWM) advancement in power electronicscontrol scheme. Two reference signals techniques. Photovoltaic (PV) sourcesidentical to each other with an offset are used today in many applications asequivalent to the amplitude of the they have the advantages of beingtriangular carrier signal were used to maintenance and pollution free. Solar-generate PWM signals for the switches. electric-energy demand has grownA digital PID control algorithm is consistently by 20%–25% per annumimplemented in Microcontroller to keep over the past 20 years, which is mainlythe current injected into the grid due to the decreasing costs and prices.sinusoidal and to have high dynamic This decline has been driven by theperformance with rapidly changing following factors:atmospheric conditions. The inverteroffers much less total harmonic 1) An increasing efficiency of solar cells;distortionand can operate at near-unity 2) Manufacturing technologypower factor. The proposed system is improvements; andverified through simulation and is 3) Economies of scale [1]. PV inverter,implemented in a prototype, and theexperimental results are compared with Which is the heart of a PV system, isthat with the conventional single-phase used to convert dc power obtained fromthree-level grid-connected PWM PV modules into ac power to be fed intoinverter. the grid. Improving the output waveformIndex Terms— grid connected, of the inverter reduces its respectivephotovoltaic (PV), proportional–integral harmonic content and, hence, the size of(PI) current control, pulse width the filter used and the level ofmodulated (PWM) inverter. electromagnetic interference (EMI) generated by switching operation of the I. INTRODUCTION inverter [2]. In recent years, multilevel inverters have become more attractiveThe demand for renewable energy has for researchers and manufacturers dueincreased significantly over the years to their advantages over conventional 1
  2. 2. Jun. 30 IJASCSE Vol 1 Issue 1 2012 reduced. This inverter topology uses two reference signals, instead of onethree-level pulse width-modulated reference signal, to generate PWM(PWM) inverters. signals for the switches. Both the reference signals Vref1 and Vref2 areThey offer improved output waveforms, identical to each other, except for ansmaller filter size, lower EMI, lower total offset value equivalent to the amplitudeharmonic distortion (THD), and others of the carrier signal Vcarrier, as shown in.The three common topologies for multi Fig. 1.level inverters are asfollows: 1) diode clamped (neutral clamped 2) capacitor clamped (flying capacitors) 3) cascaded H-bridge inverterIn addition, several modulation andcontrol strategies have been developedor adopted for multilevel inverters,including the following: multilevel Ease of Use: The inverter is used in asinusoidal (PWM), multilevel selective PV system, a proportional– integral (PI)harmonic elimination, and spacevector current control scheme is employed tomodulation A typical single-phase three- keep the output current sinusoidal and tolevel inverter adopts full-bridge have high dynamic performance underconfiguration by using approximate rapidly changing atmospheric conditionssinusoidal modulation technique as the and to maintain the power factor at nearpower circuits. The output voltage then unity. Simulation and experimentalhas the following three values: zero, results are presented to validate thepositive (+Vdc), and negative (−Vdc) proposed inverter configuration.supply dc voltage (assuming that Vdc isthe supply voltage). The harmonic FIVE-LEVEL INVERTER II.components of the output voltage are TOPOLOGY AND PWM LAWdetermined by the carrier frequency andswitching functions.Therefore, theirharmonic reduction is limited to a certain The proposed single-phase five-leveldegree [4].To overcome this limitation, inverter topology is shown in Fig. 2. Thethis paper presents a five-level PWM inverter adopts a full-bridge configurationinverter whose output voltage can be with an auxiliary circuit [4]. PV arrays arerepresented in the following five levels: connected to the inverter via a dc–dczero, +1/2Vdc, Vdc, −1/2Vdc, and −Vdc. boost converter. Because the proposedAs the number of output levels inverter is used in a grid-connected PVincreases, the harmonic content can be system, utility grid is used instead of load. The dc–dc boost converter is used 2
  3. 3. Jun. 30 IJASCSE Vol 1 Issue 1 2012 Figure 2 Configuration of the proposed single-phase five-levelto step up inverter output voltage Vinv to PWM inverter.be more than √2 of grid voltage Vg toensure power flow from the PV arraysinto the grid [19]. A filtering inductance Lfis used to filter the current injected intothe grid. The injected current must besinusoidal with low harmonic distortion.In order to generate sinusoidal current,sinusoidal PWM is used because it isone of the most effective methods.Sinusoidal PWM is obtained by Fig. 3. Basis of equivalence forcomparing a high-frequency carrier with sinusoidal PWMa low-frequency sinusoid, which is themodulating or reference signal. Thecarrier has a constant period; therefore,the switches have constant switchingfrequency.The switching instant is determined fromthe crossing of the carrier and themodulating signal. A. Sinusoidal PWMLaw A fundamental period in Fig. 3consists of p pulses whose widths vary Fig. 4. Characterization of pulse.sinusoidally throughout the cycle to givethe fundamental component of The switching period Δ and thefrequency. The basis of equivalence frequency modulation ratio p are,between the desired sinusoid and the respectively, given byactual pulsed waveform is taken to be Δ =2π/p (1)volt–seconds, as shown in Fig. 3, i.e., p =fs/f1 (2)As1 = Ap1 and As2 = Ap2. One of these where fs is the switching frequency andpulses, the general kth pulse, is f1 is the fundamental frequency. Thecharacterized in detail in Fig. 4. quarter period of pulse δ0 is given as δ0 = Δ/4. (3) αk is the position from the origin of the fundamental period of the midpoint of the period Δ. The angles δ1k and δ2k are the modulating angles which vary throughout the cycle, and it is to 3
  4. 4. Jun. 30 IJASCSE Vol 1 Issue 1 2012 As2 =Ap2. (18)calculate these angles that a modulation By equating (12) and (14), and (13) andlaw must be derived. (16)Consider first the average voltages V 1k β1k = M sin(αk − δ0) (19)and V 2k during the two halves of the and, similarly,modulating pulse β2k = M sin(αk + δ0) (20)V 1k =(Vs) {δ1k − (2δ0 − δ1k)} /2δ0 (4) where M is the “modulation index” and∴ V 1k =(Vs)(δ1k − δ0)/δ0 (5) M = Vm/Vs. (21)=(Vs)β1k (6)where1k = (δ1k − δ0)/δ0 (7) Equation (21) can be expressed in termsand, similarly of amplitude of carrier signal Vc by replacing Vs with Vc. Because, in thisV 2k = (Vs)β2k (8) topology,two identical reference signalsWhere are used, Vs = 2Vc and Vm =Vref1 = Vref2. If M >1, higher harmonics in theβ2k = (δ2k − δ0)/δ0. (9) phase waveform are obtained. Therefore, M is maintained betweenThe volt–second As1 is the half- zero and one. If the amplitude of thepulsewidth of the sine wave and is given reference signal is increased to beaccording to Fig. 4 by higher than the amplitude of the carrierAs1 = αkƒ signal, i.e., M >1, this will lead toαk−2δ0 overmodulation. Large values of M inVm sinθ dθ (10) sinusoidal PWM techniques lead to full=2Vm sin δ0 sin(αk − δ0). (11) overmodulation [20]. Fig. 6 shows theHowever, sin δ0 → δ0 when δ0 is small carrier and reference signals for different∴ As1 = 2δ0Vm sin(αk − δ0) (12) values of M. Equations (19) and (20)and, similarly, define the modulation law, which is moreAs2 = 2δ0Vm sin(αk + δ0). (13) M. (a)M = 0.3. (b)M = 0.5. (c)M = 0.7.For the corresponding volt–second Ap1, (d)M = 1.2. commonly expressed inin thePWMwaveform, terms of δ1k and δ2k, byAp1 =2δ0V 1k (14) substitutingfrom (7) and (9) to give∴ Ap1 =2δ0β1k(Vs) (15)and, similarly, δ1k =δ0 [1 +M sin(αk − δ0)] (22)Ap2 = 2δ0β2k(Vs). (16)For equivalence of volt–seconds from δ2k =δ0 [1 +M sin(αk + δ0)] . (23)which the modulation law can bederived, we require that Thus, the switching angles δ1k and δ2kAs1 =Ap1 (17) for the kth pulse can be calculated from 4
  5. 5. Jun. 30 IJASCSE Vol 1 Issue 1 2012 Figure 5 Switching pattern for the single-phase five-level(22) and (23) in terms of modulation inverter.index M and angles αk and δ0 whichdepend upon the fundamental frequencyand frequency ratio. B. HarmonicSpectrum of Sinusoidal PWM WaveformThe voltage harmonics produced by thesinusoidal PWM can be computed byfirst calculating the harmonics due to thekth pulse alone, Ank, and thensummating the harmonic contributions ofall p pulses Switches S1–S3 will be switching atthe rate of the carrier signal frequency,where as S4 and S5 will operate at afrequency equivalent to the fundamental Figure 6 single-phase five-level inverter with PI controller. The proposed single-phase five- level inverter topology is shown in Fig. 6. The inverter adopts a full-bridge configuration with an auxiliary circuit. PV arrays are connected to the inverter via a dc–dc boost converter. Because the Table 1 Inverter Output Voltage proposed inverter is used in a grid-during S1−S5 Switch on and off connected PV system, utility grid is used instead of load. The dc–dc boost converter is used to step up inverterfrequency. Table 1 illustrates the output voltage Vinv to be more than √2level of Vinv during S1–S5 switch on of grid voltage Vg to ensure power flowand off. Figure 5 shows Switching from the PV arrays into the grid. Apattern for the single-phase five-level filtering inductance Lf is used to filter theinverter. current injected into the grid. The injected current must be sinusoidal with low harmonic distortion. In order to generate sinusoidal current, sinusoidal 5
  6. 6. Jun. 30 IJASCSE Vol 1 Issue 1 2012 approximation is used to transform the integral term into the discrete-timePWM is used because it is one of the domain because it is the mostmost effective methods. Sinusoidal straightforward technique. ThePWM is obtained by comparing a high- proportional term is directly used withoutfrequency carrier with a low-frequency approximation.sinusoid, which is the modulating or P term : Kpe(t) =reference signal. The carrier has a Kpe(k). (29)constant period; therefore, the switcheshave constant switching frequency.The Time relationship: t = k ∗ hswitching instant is determined from the wherecrossing of the carrier and the h sampling period;modulating signal. k discrete-time index: k = 0, 1, 2, . . .. For simplification, it is convenient to define new controller gains as K_i = Ki h/2 (30) from which one can construct the discrete-time PI control Fig. 7 PI control algorithm implemented in PIC controller.u(t) control signal;e(t) error signal;t continuous-time-domain time variable;τ calculus variable of integration;Kp proportional-mode control gain;Ki integral-mode control gain.Implementing this algorithm using a PICrequires one to transform it into thediscrete-time domain. Trapezoidal sum 6
  7. 7. Jun. 30 IJASCSE Vol 1 Issue 1 2012 Fig. 7. Fig shows grid current of the circuitB. ALGORITHM IMPLEMENTATION V. SIMULATION RESULTS Control signal saturation andintegral-mode antiwindup limiting are Let us consider the followingeasily implemented in software. In this example, inverter circuit involvingwork, the control signal itself takes the unipolar switching. It is connected withform of PWM outputs from the PIC. an R Load as shown below.Therefore, the control signal is saturatedat the value that corresponds to 100%duty cycle for the PWM. An undesirableside effect of saturating the controlleroutput is the integral-mode windup.When the control output saturates, theintegral-mode control term (i.e., thesummation) will continueto increase but will not produce acorresponding increase in controlleroutput (and hence will not produce anyadditional increase in plant response).The integral can become quite large,and it can take a long time before thecontroller is able to reduce it once theerror signal changes sign. The effects ofwindup Figure 8 Simulation Circuit Diagram Figure 9 five level Output Waveform the inverter circuit 7
  8. 8. Jun. 30 IJASCSE Vol 1 Issue 1 2012 modulation index M will determine the shape of the inverter output voltage Vinv and the grid current Ig shows Vinv and Ig for different values of M. The dc-bus voltage is set at 400 V (>√2Vg) in this case, Vg is 240 V in order to inject current into the grid. Vinv is less than √2Vg due to M being less than 0.5.The inverter should not operate at this condition because the current will be injected from the grid into the inverter, rather than the PV system injecting the current into the grid. Figure 9 shows five Figure 10 filtered Output level Output Waveform the inverter Waveform from the inverter circuit and Figure 10 shows the five level output Waveform the inverter circuit. In order to verify that the proposedinverter can be practically implemented VI .CONCLUSIONin a PV system, simulations wereperformed by using MATLAB SIMULINK. Improving the output waveform ofIt also helps to confirm the PWM the inverter reduces its respectiveswitching strategy which then can be harmonic content and, hence, the size ofimplemented in a PIC. It consists of two the filter used and the level ofreference signals and a triangular carrier electromagnetic interference (EMI)signal. Both the reference signals are generated by switching operation of thecompared with the triangular carriersignal to produce PWM switching signals inverter. In recent years, multilevelfor switches S1−S5. Note that one leg of inverters have become more attractivethe inverter is operating at a high for researchers and manufacturers dueswitching rate equivalent to the to their advantages over conventionalfrequency of the carrier signal, whereas three-level Pulse Width Modulatedthe other leg is operating at the rate of (PWM) inverters. They offer improvedfundamental frequency (i.e., 50 Hz).Figure 8 shows the Simulation Circuit output waveforms, smaller filter size,Diagram The tch at the auxiliary circuit lower EMI, lower total harmonicS1 also operates at the rate of the carrier distortion (THD).signal. As mentioned earlier, the 8
  9. 9. Jun. 30 IJASCSE Vol 1 Issue 1 2012 PESC, Jun. 17–21, 2001, vol. 3, pp. 1173–1178.VI.REFERENCES [7] N. S. Choi, J. G. Cho, and G. H. Cho,1] J. M. Carrasco, L. G. Franquelo, J. T. “A general circuit topology of multilevelBialasiewicz, E. Galvan, R. C. inverter,” in Proc. 22nd Annu. IEEEPortilloGuisado, M. A. M. Prats, J. I. PESC, Jun. 24–27, 1991, pp. 96–103.Leon, and N.Moreno-Alfonso, “Power- [8] G. Carrara, S. Gardella, M.electronic systems for the grid Marchesoni, R. Salutari, and G. Sciutto,integration of renewable energy sources: “A new multilevel PWMmethod: AA survey,” IEEE Trans. Ind. Electron., theoretical analysis,” IEEE Trans. Powervol. 53, no. 4, pp. 1002– 1016, Aug. Electron., vol. 7, no. 3, pp. 497–505, Jul.2006. 1992.[2] V. G. Agelidis, D. M. Baker, W. B. [9] A. Nabae and H. Akagi, “A newLawrance, and C. V. Nayar, “A neutral-point clamped PWM inverter,”multilevel PWMinverter topology for IEEE Trans. Ind. Appl., vol. IA-17, no. 5,photovoltaic applications,” in Proc.IEEE pp. 518–523, Sep./Oct. 1981.ISIE, Guimarães, Portugal, 1997, pp. [10] J. Pou, R. Pindado, and D.589–594. Boroyevich, “Voltage-balance limits in[3] S. Kouro, J. Rebolledo, and J. fourlevelRodriguez, “Reduced switching- diode-clamped converters with passivefrequencymodulation algorithm for high- front ends,” IEEE Trans. Ind. Electron.,power multilevel inverters,” IEEE Trans. vol. 52, no. 1, pp. 190–196, Feb. 2005.Ind. Electron., vol. 54, no. 5, pp. 2894–2901, Oct. 2007.[4] S. J. Park, F. S. Kang, M. H. Lee, andC. U. Kim, “A new single-phase fivelevelPWM inverter employing a deadbeatcontrol scheme,” IEEE Trans. PowerElectron., vol. 18, no. 18, pp. 831–843,May 2003.[5] L. M. Tolbert and T. G. Habetler,“Novel multilevel inverter carrier-basedPWM method,” IEEE Trans. Ind. Appl.,vol. 35, no. 5, pp. 1098–1107, Sep./Oct.1999.[6] M. Calais, L. J. Borle, and V. G.Agelidis, “Analysis of multicarrier PWMmethods for a single-phase five-levelinverter,” in Proc. 32nd Annu. IEEE 9
  10. 10. Jun. 30 IJASCSE Vol 1 Issue 1 2012 10