1. Review of a Differential Tunable Active Inductor
LC-tank VCO
Peter Sinko, X139: Advanced Analog Microelectronics, UC Berkeley Extension
Abstract – Discussions of inductor replacement
techniques by Yuan [1] are the basis to present a
wide tuning-range CMOS voltage-controlled
oscillator (VCO) with a differential tunable active
inductor LC-tank as proposed by Lu et al. [2].
Resulting VCO coarse frequency tuning is achieved
by varying the equivalent inductance through a
voltage controlled resistor. Fine tuning is by a
varactor. This topology achieved 143% extended
tuning range and significant size reduction.
I. INTRODUCTION
The recent exponential growth of wireless
communications industries demanded improved
wireless solutions supporting multiple bands and
multiple standards, along with better
performances in power and frequency coverage
while satisfying more compacting trends. The
essential building blocks serving such functions
are the frequency generating devices or voltage-
controlled oscillators (VCO). To address these
requirements, alternative reconfigurable
topologies of VCOs have been explored, some
using separate VCOs covering the separate
required frequency bands. Such strategies
resulted in undesirable increase in cost and size
of devices. Other proposed architectures
employed various switching techniques of
capacitors and inductors that yielded adequate
results, however utilizing spiral capacitors and
inductors that lent themselves to considerable
space on an IC chip and with complex control
mechanisms. The switching has usually been
performed by diodes whose forward current
carried electrical noise affecting VCO
frequencies. To overcome such limiting factors,
the concept of frequency tuning by active
inductors has been introduced. Employing
inductor replacement techniques tunable active
inductors achieved frequency tuning ranges of up
to 120%.
The current paper discusses such inductor
replacement techniques and presents the proposed
circuit topology by Lu et al. that further improves
the performance of the wide tuning-range VCOs
with active inductors. By utilizing a differential
active inductor and a varactor for the LC-tank, the
circuit produces a very wide frequency tuning
range.
II. THE GYRATOR TOPOLOGY
A gyrator is a passive, linear, lossless, two-port
electrical network element proposed in 1948 by
Bernard D.H. Tellegen as a hypothetical fifth
linear element after the resistor, capacitor,
inductor and ideal transformer. Using the circuit
symbol of Fig.1, it is governed by the equations:
Fig.1
An important property of a gyrator is that it
inverts the current-voltage characteristic of an
electrical component or network. A gyrator can
make a capacitive circuit behave inductively, a
series LC circuit behave like a parallel LC circuit
etc. When terminated at one port with a
capacitance, the ideal gyrator produces an

2. inductor at the other port. Therefore the gyrator is
used to emulate devices built from basic
electronic elements and is primarily used in active
filter design and miniaturization.
The basic gyrator topology consists of two back-
to-back connected transconductors. When
one port of the gyrator is connected to a capacitor
as in Fig.2, the network is called a gyrator-C
network [1, p.23]:
Fig.2
Gyrator-C networks are used to synthesize
gyrator-C active inductors. The inductance
of a gyrator-C active inductor is directly
proportional to the load capacitance C and
inversely proportional to the product of the
transconductances of the transconductors of the
gyrator. In Fig.2 the transconductor in the
forward path has a positive transconductance
while the transconductor in the feedback path has
a negative transconductance. Alternately, the
transconductor in the forward path can be
configured as a negative transconductance and the
transconductor in the feedback path as a positive
transconductance by simple exchange of
connections to the positive and negative ports of
both opamps.
Floating gyrator-C active inductor is floating if
both terminals of the inductor are not connected
to either Vdd or Gnd of the circuits containing
them. They are constructed by replacing single
ended transconductors with differentially
configured transconductors as in Fig.3 [1, p.25]:
Fig.3
The advantage of a floating gyrator-C active
inductor over its single-ended counterpart is in its
differential configuration, namely it rejects the
common-mode disturbances present in the
network and is characterised by its Common
Mode Rejection Ratio (CMRR). This will be
considered a desirable feature of a VCO and
indexed as (F1).
Lossy floating gyrator-C active inductors [1, p.28-
31] have finite input and output impedances that
are represented by the additional equivalent
transconductances at either port, and can be
analyzed in a similar way as lossy single-ended
gyrator-C active inductors. Considering the lossy
floating gyrator-C network of Fig.4,
Fig.4

3. with admittance looking into port 2
Go1 and Go2 represent the total conductances at
nodes 1 and 2, respectively. Go1 is a
superposition of the finite output impedance of
transconductor 1 and the finite input impedance
of transconductor 2.
The equivalent RLC network is obtained from the
manipulation of KCL equations at nodes 1 and 2
[1, p.28] combining respective parameters into the
parasitic parallel ohmic resistance Rp, series
ohmic resistance Rs, and parallel capacitance Cp.
The frequency range of a lossy active inductor
can be obtained from the impedance equation of
the RLC equivalent circuit with pole resonant
frequency and zero resonant frequency defining
the resistive, inductive and capacitive nature of a
gyrator's frequency dependent behavior as marked
on the Bode plots of Fig.5. In addition, the
inductive behavior of the gyrator is manifested by
the 90 degree phase lag of the output current
relative to input voltage [1, p.31].
Fig.5
Gyrator-C networks synthesized from transistors
are some of the simplest designs, and the
frequency ranges of gyration depend on the cutoff
frequencies of the transistors. Common-gate,
common-drain, and differential-pair
configurations having positive transconductance
and common-source configuration with negative
transconductance are illustrated in Fig. 6.
CG CD DP CS
Fig. 6
Considering the common-gate transconductor i(o)
= g(m)v(in) an increase in v(in) will lead to an
increase in i(o). Because an increase in v(in) will
lead to a decrease in iD, but i(o) = J − iD then
i(o) will increase accordingly, therefore the
transconductance of the common-gate
transconductor is positive. For the differential-
pair an increase in v(in) will result in an increase
in iD1, but iD2 = J3 − iD1 therefore iD2 will
decrease. For i(o) = J2 − iD2, i(o) will increase.
The differential-pair transconductor thus has a
positive transconductance.
Tunability
It is readily seen from equation L=C/Gm1Gm2 of
Fig.2 that the inductance of gyrator-C active
inductors can be tuned by either changing the load
capacitance C or varying the transconductances
Gm1 and Gm2. Early circuits of gyrators
consisting of transistors such as differential pairs
were terminated in capacitors with much larger
values than the parasitic capacitance of the
transistors, offering good control of simulated
inductances but occupying considerable silicon
space. Modern gyrators eliminate the gyration
(load) capacitance and rely on the intrinsic

4. capacitances of the transistors themselves. These
capacitances do not terminate the output port but
rather exist between internal nodes and result in
simulated inductances that are close to the
inductance of capacitively terminated gyrators.
Additional tunability of VCOs is achieved by
connecting accumulation-mode varactors in
parallel to active inductors (F2). These are MOS
devices creating an electron accumulation layer
under the gate resulting in the desired gate-oxide
capacitance Cgs. The voltages applied to the gate
being small, capacitance tuning is a fine-tuning
mechanism of inductance and is constrained by
the range of the control voltage Vgs.
Conductance tuning of VCOs is achieved by
varying both positive and negative
transconductances Gm1 and Gm2 via the DC
operating points of the transistors. The operating
point ranges being large translate to large
inductance tuning ranges provided the transistors
remain in saturation. Therefore coarse tuning of
inductance is achieved by conductance tuning,
constrained only by the pinch-off condition and
corner frequency of the transistors (F3).
Quality factor
The finite input and output impedances of
transconductors will cause the quality factor of an
active inductor to be finite also. High Q factor
being a specification, Q enhancement techniques
have received special attention. Defined as the
ratio of the net magnetic energy stored in the
inductor to its ohmic loss per oscillation cycle [1,
p.36], quantified for a linear active inductor in
Fig.7(a) and derived for a lossy gyrator-C active
inductor as in Fig.7(b) results in Q=Q1*Q2*Q3:
(a)
(b)
Fig.7
where
By inspection the above expression reveals the
dominance of Q1 at low frequencies and therefore
the dependence of overall Q factor on Rs.
Increasing the quality factor of an active inductor
by minimizing Rs will reduce losses in the RLC
network. According to the definition of Rs in
Fig.4, reducing Go1 is a direct method to reduce
Rs and is most effective in a differential-pair
transconductor since it has positive
transonductance and the output impedance is
given by r(o2) < 1/g(m) of a common-drain
transconductor. Therefore the use of a
differential-pair is preferable to a single common-
drain transistor (F4). Increasing
transconductances Gm1,2 is undesirable by
increasing the DC bias currents or increasing
transistor sizes.
Compensating for loss in the active inductor is
another approach to lower Rs and involves
connecting a negative resistor at the output of the
positive transconductor to cancel out the parasitic
resistances Rs and Rp. Reconsidering the RLC
network previously discussed, replacing the series
RL network with an equivalent parallel RL
network of same terminal impedance yields the
circuit in Fig.8 with parallel resistances combined
into the total parasitic parallel resistance Rtotal =
Rp//ˆRp. Then a negative resistor of resistance
Rcomp = −Rtotal and input capacitance Ccomp
connected in parallel with Cp will cancel out the
parasitic effect of both Rp and Rs. If Rcomp is a
variable resistor then it can be adjusted to the
exact value of Rtotal to achieve a complete
cancellation of Rs (F5) [1,p.43].

5. Fig.8
Linearity
The operation of discussed gyrator-C inductors
assumes all transistors to be biased to saturation
unless otherwise noted. Therefore pinch-off
condition is one of the constraints on voltage
swings across transistors. When v(DS) falls
below this level the transistor(s) will enter the
triode region thereby decreasing their
transconductances non-linearly from g(m) in
saturation to g(ds) in triode region according to
the iDS-vDS relationship. The inductance Leq
will follow this non-linearity as it increases from
L=C/Gm1Gm2 to L=C/Gds1Gds2 (F6).
Noise
Active inductors generate high levels of noise that
is a primary concern in the design of VCOs.
Noise analysis involves the representation of
noise sources in small signal equivalent circuits as
input-referred noise-voltage generators, input-
referred noise-current generators, and the
resulting output noise power.
The represented noise is thermal noise generated
in the channel and by the gate series resistance of
MOS devices. Using conventional noise analysis
techniques the generated noise at the output due
to individual noise sources is calculated and
added up.
III. MOS IMPLEMENTATION
As previously mentioned, gyrator-C active
inductors usually employ common-source,
common-gate, source follower or differential pair
configurations of MOS transistors. Specifically
the parameters of the RLC network equivalent to
the differential-pair of Fig.9 are:
Fig.9
Compensation using negative resistors to cancel
the effects of parasitic resistances Rs and Rp in
the case of differential-pair active inductors is
realized using the differential negative impedance
network of Fig. 10 (F7):
Fig.10
The current source in this differential
configuration can be removed if the biasing
currents are provided by the circuit connected to
the negative resistor. However the resistor will no
longer be adjustable and design rule-of-thumb is
utilized in sizing the transistors based on the
required currents by the active inductor.
IV. A VCO IMPLEMENTATION
Combining features indexed F1-7, Lu et al.
proposed the simple and elegant implementation
of a wide tuning-range CMOS VCO of Fig.11:

6. A differential-pair, differentially configured
gyrator-C active inductor with MOS varactors
connected in parallel, using a differential
negative impedance gain compensation network
with current re-use.
Fig.11
By inspection the VCO is composed of three
blocks: the tunable active inductor, the varactor
and the negative gain stage. The output of the
VCO is taken differentially at Vout+ and Vout-.
Transistors M1 and M2 realize the cross-coupled
pair gyrator topology with M3-4 in common-drain
configuration. M1-4 are biased in saturation
mode. Transistors M5-6 behave as voltage-
controlled resistors whose resistances are
controlled by the gate voltage Vctrl1, therefore
M5-6 will operate in both triode and saturation
mode. By controlling the bias currents for M1-2
they provide the transcondctance control by
biasing M1-2. Therefore the equivalent
inductance of the active inductor is controlled by
Vctrl1 and is the coarse tuning control of the
equivalent inductance. The varactors parallel to
the active inductor are accumulation-mode MOS
devices whose capacitances are controlled by
Vctrl2 for fine tuning of Leq. Transistors M7-8
realize the differential negative impedance
network and provide the gain compensation due
to the lossy inductor network. M7-8 are biased by
being cascoded with the differential pairs M1-4.
The negative feedback of the active inductor and
the biasing of M7-8 is inspected as follows: an
increase in M1 source node voltage v(S1) and a
decrease in v(S2) will result in an increase in
v(G4) and a decrease in v(G3). M3-4 will then
adjust their v(S) accordingly by reducing v(S3)
and increasing v(S4) by approximately the same
amount. Since M7-8 are biased by the active
inductor, their saturated mode is set by the design
rule of sizing the transistors to three times the
value of the required transconductance for the
bias currents supplied by the active inductor.
Buffers M9-10 are used in open drain
configuration as output ports Vout+ and Vout- to
drive the usually 50 Ohm loads of connected
devices.
Circuit analysis and operation
The small signal equivalent circuit of the active
inductor is shown in Fig.12(a). Since M5 and M6
are biased either in triode or saturation, they are
represented by their drain conductances g(ds5)
and g(ds6).
(a)
Fig.12 (b)

7. From the small signal equivalent circuit the
differential input impedance has been derived as
[2, p.3463]:
For the approximation
the small signal circuit of Fig12(a) can be reduced
to Fig.12(b), where
By inspection Leq depends on a directly
controllable parameter g(ds5), therefore an
applied voltage Vcntrl1 becomes the controlling
mechanism of the active inductance.
The Q-factor has been evaluated based on the
definition in Fig.7(a) from the above differential
input impedance Zin to be [2, p.3464]:
Setting the first derivative of Q to zero the
maximum Q factor has been evaluated as
at the maximum frequency
The Q-factor of the active inductor can be
optimized by manipulating transistor parameters
according to this equation.
To start oscillation the design rule for sizing
transistors M7-8 is necessary and sufficient, the
VCO will begin oscillation at the resonant
frequency of the LC tank. The frequency of
oscillation of the VCO is determined by the value
of Leq which depends on g(ds5) of M5. The
drain conductance g(ds5) is a function of the
applied voltage Vcntrl1, which is then used for
controlling the value of the inductance and
subsequently the frequency of oscillation of the
VCO.
Assuming Vctrl1 to be very small as initial
condition, the transistors M5 and M6 will be
biased in triode region. As Vctrl1 increases, M5-
6 will enter saturation and the values of g(ds5)
and g(ds6) will decrease accordingly. Based on
the equation of Leq, the value of equivalent
inductance will increase that will result in a
decrease of the VCO output frequency according
to the pole and zero resonant frequency equations
of Fig.5. Owing to the large range of voltages of
Vctrl1, the output frequency of the VCO will also
have large ranges accordingly, and Vctrl1 is
therefore the coarse tuning mechanism of the
VCO. Fine tuning of the VCO oscillation
frequency is achieved by varactor control voltage
Vctrl2. The resulting capacitance Cgs of the
varactor is small and is greatly affected by
loading parasitic capacitances thus reducing the
operating range of the varactors. It is therefore a
short-range small-change tuning mechanism.
Noise analysis involves the representation of all
noise sources in the small signal equivalent circuit
of the active inductor as shown in Fig.13, where
the contributions from transistors M1-6 are
included as independent noise-currents
[2,p.3465]:
Fig.13

8. Summing up the individual noise-currents results
in the noise contribution from the LC-tank.
Similarly, the cross-coupled pair noise currents
are added together, and the total noise current at
the output becomes a superposition of the two
total noise currents of the form
Examining the resulting equation for excess phase
[2, p.3467] yields insights regarding operation
and design of a VCO: for a wide frequency range
Leq must be minimized. This leads to design
trade-offs since transistors M1-4 are biased at
high transconductances. Transistor pair M1-2
contribute largely to output noise that can be
improved by increasing the channel-length of the
transistors. M7-8 are determined by design rule-
of-thumb, but the bias currents of M1-2 decrease
as oscillation frequency decreases. The lowest
frequency will then be determined by the negative
conductance of the pair M7-8 when it can no
longer compensate for the losses in the LC-tank.
This is another trade-off in designing a VCO with
desired lower cut-off frequency vs. its size.
V. CONCLUSION
The discussion of inductor replacement
techniques by Yuan [1] formed the basis to
present the wide tuning-range CMOS VCO
proposed by Lu et al. [2] utilizing a differential
tunable active inductor. The proposed VCO is a
differential-pair, differentially configured gyrator-
C active inductor with MOS varactors in parallel,
using a differential negative impedance gain
compensation network with current re-use.
Employing a differentially configured MOS
cross-coupled pair as an active inductor, the VCO
oscillation frequency is tuned by varying the
equivalent inductance Leq of the active LC-tank.
Leq is inversely proportional function of the
transconductance g(ds5) of the parallel voltage-
controlled resistor, therefore changing g(ds5)
varies the value of Leq. The transconductance is
a function of the gate voltage of the voltage-
controlled resistor, then g(ds5) is directly
controlled by the applied voltage Vcntrl1, that
results in coarse tuning of frequency of
oscillation of the VCO. The fine tuning is
achieved by a varactor in parallel to the inductor.
A differential negative impedance gain
compensation network offsets the LC-tank
incurred losses. Noise analysis concludes that
the lowest frequency of oscillation is determined
by the negative feedback network's lower limit of
compensation. Experimental results confirm a
143% improvement in tuning range from
500MHz to 3 GHz and a significant reduction in
silicon size due to the absence of physical
inductors.
REFERENCES
[1] F. Yuan, “CMOS Active Inductors and
Transformers, Principle, Implementation, and
Applications,” 2008, XVIII, pp. 21-99, ISBN:
978-0-387-76477-1.
[2] L. H. Lu, H. H. Hsieh, Y. T. Liao, “A Wide
Tuning-Range CMOS VCO With a Differential
Tunable Active Inductor,” in IEEE Transactions
On Microwave Theory And Techniques, Vol. 54,
No. 9, September 2006.
March 18, 2013