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Curriculum Vitae
Personal information
Name: Guo Fan (郭帆)
Gender: male
Data-of-Birth: August, 5th
, 1987
Language: Mandarin Chinese, English
Address: Vomolenlaan 14, 3000 Leuven, Belgium
Mobile phone: 0032-491964954
E-mail: hustestguofan@gmail.com
Previous Position: Confirmed Analog Design Engineer at Melexis
Education
Sep.2005 – July.2009 B.E. in Electronic Science and Technology, Huazhong University of Science and
Technology (HUST), Wuhan China GPA: 3.7/4 (87/100)
Sep.2009 – Oct.2011 MSc in Electrical Engineering, Track Microelectronics, Technical University of
Delft (TUD), the Netherlands GPA: 7.5/10
Working Experiences
 Jan. 2016 to Jan, 2017 Confirmed Analog Designer Manifold Air Pressure Sensor
 Brainstorm with Packaging Development Engineer to design the absolute air pressure sensor
(Analog output and SENT output) used in the engine, adapt the existing sensor interface to meet
the harsh media requirements for new business opportunities;
 Tapeout the new interfaces, make traceability matrix for customer requirement management,
review the design changes together with system architect and ESD/EMC risks with the senior
experts, create characterization plan for both electrical functions and environmental requirements,
take care of all the documentations required by the Project Follow Up System.
 Mar. 2015 to Dec. 2015 Confirmed Analog Designer Interface for MEMS pressure sensor
 Lead an ASIC project in 0.35um technology and implement the top-level hardware verification;
 Follow the standard design flow for automotive product, take full responsibility on schedule
planning, layout floorplan, design review meeting, communication and documentation;
 Tapeout on time and drive all the post-TO activities, e.g., create characterization plan, support the
test engineer to debug the load board and adapt the test specification, review the Cpk results, do
the ESD-HBM tests, make failure analysis on the ESD fail, drive all the characterization activities,
review the results with product manager, etc.
 Apr. 2014 to Feb. 2015 Associate Analog Designer ASIC for Pressure Sensor Interface
 Employ a novel topology (digital PLL-based structure with force-balanced differential inputs) for
the resistive sensor in wheatstone bridge configuration and design the system with matlab;
 Lead the design activities for the analog front-end and implement it in transistor level in 0.18um
technology. Design critical blocks such as:
1. VCO with low power and phase noise;
2. Bandgap ref. with trimmable absolute value and TC, robust EMC, low noise and offset;
3. Current source with trimming and dynamic digital feedback for force-balancing at input;
 Initiate the start-of-design review, create floorplan with System Architect and Layout Engineer,
present design review, challenge the specifications of blocks from other designers, prepare the
top-level mixed-signal simulation plan and conduct the full chip verification.
 Dec. 2013 to Mar. 2014 Associate Analog Designer ASIC for MEMS pressure sensor
 Work as an satellite designer and support the design in block level with 0.35um technology;
 Design the EMC robust supply system (regulator, bandgap, Power-on-Reset, Over-Voltage
Detector). Create the Direct-Power-Injection simulation plan and corresponding testbench
including parasitics of bondwires and package, conduct the full verification regarding EMC
requirements;
2
 Design temperature-sensor, RC oscillator, Common-Mode buffer. Support on ADC model
improvement and top-level verification.
 Sep. 2012 to May. 2013 Associate Analog Designer Linear-Hall Current Sensor
 Redesign the POR to solve the hysteresis issue that caused significant yield loss;
 Do failure analysis (by Focused Ion Beam) for the issue of temperature sensor saturation. Capture
the root cause by micro-probing and redesign the temperature sensor;
 Redesign the Variable-Gain-Amplifier to cover the full range of required gain;
 Follow the post-TO activities and test/qualification flow until product release.
 Aug. 2012 to Spe. 2012 Associate Analog Designer ASIC for MEMS pressure sensor
 Design the NTC signal chain (three trimmable resistors + one fully differential amplifier) in
0.35um technology. Design for testability is implemented and specific functionality (no dark
current during disable, EMC robust) is achieved;
 Create the Design-Failure-Mode-Effect-Analysis as customer requested (DPI simulation on NTC
pin, aging effect on gain/offset drift).
 May. 2012 to Apr. 2013 Associate Analog Designer Testchip to evaluate new technologies
 Design and implement some analog blocks (bandgap, DAC, temperature sensor) in two different
0.18um technologies (bulk CMOS vs. SOI). Make characterization plan and conduct the full
characterization under the support of Characterization Engineer.
 Analyze on the measurements and compare the performance in terms of process robustness,
matching, leakage, noise, DPI immunity, noise decoupling and HV withstanding.
Master thesis project
Oct. 2010 to Oct. 2011 Energy-Efficient Capacitive-Sensor Interface Based on An Incremental
Delta-Sigma Modulator Employing Current-Starved Inverter-Basde OTAs
Supervisor: dr.ir. Michiel A. P. Pertijs
 An energy-efficient micro-power flexible interface circuit tailored for capacitive humidity-sensor is
implemented in 0.16um CMOS technology. A third-order incremental delta-sigma converter based on
switched-capacitor integrators is employed in this interface.
 A fully-differential current-starved inverter-based OTA structure is proposed for the integrators. A
dynamically power down scenario is applied to reduce the power consumption by about 42%.
 The interface achieves 13-bit capacitance-to-digital conversion while consuming 7uW from a 1.2V
supply, resulting in a F.o.M of 0.17pJ/Step. It is layout accomplished and ready to be taped out.
Technical skills
 Good understanding of the characteristics of the devices in CMOS technologies (mainly in 0.35um
and 0.18um technologies); Extensive design experience with CAD tools for IC design, such as
Cadence Virtuoso and Spectre;
 Familiar with matlab coding and verilogams modeling;
 Experienced in failure analysis methodologies such as FIB, OBIRCH, EMMI, IV Curve Tracing,
Microprobing, Optical Inspection, etc.
 Basic understanding of MEMS pressure sensor design (CAD tools, key parameters, trade-off and
challenges) and packaging (CLCC, CDIP and QFN) related parasitics;
 Ability to work independently to get things implemented with strong self-discipline and motivation;
 Good problem solving and decision making methodology.
Business skills
 Highly customer oriented and capable in change management;
 Possess strong verbal and written communication skills;
 Have strong sense of responsibility, play well in teamwork, flexible for travelling around the world
*statement: this CV can only be used for job application within the companies, all rights reserved by GUO FAN

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CV_GUOFAN_201701

  • 1. 1 Curriculum Vitae Personal information Name: Guo Fan (郭帆) Gender: male Data-of-Birth: August, 5th , 1987 Language: Mandarin Chinese, English Address: Vomolenlaan 14, 3000 Leuven, Belgium Mobile phone: 0032-491964954 E-mail: hustestguofan@gmail.com Previous Position: Confirmed Analog Design Engineer at Melexis Education Sep.2005 – July.2009 B.E. in Electronic Science and Technology, Huazhong University of Science and Technology (HUST), Wuhan China GPA: 3.7/4 (87/100) Sep.2009 – Oct.2011 MSc in Electrical Engineering, Track Microelectronics, Technical University of Delft (TUD), the Netherlands GPA: 7.5/10 Working Experiences  Jan. 2016 to Jan, 2017 Confirmed Analog Designer Manifold Air Pressure Sensor  Brainstorm with Packaging Development Engineer to design the absolute air pressure sensor (Analog output and SENT output) used in the engine, adapt the existing sensor interface to meet the harsh media requirements for new business opportunities;  Tapeout the new interfaces, make traceability matrix for customer requirement management, review the design changes together with system architect and ESD/EMC risks with the senior experts, create characterization plan for both electrical functions and environmental requirements, take care of all the documentations required by the Project Follow Up System.  Mar. 2015 to Dec. 2015 Confirmed Analog Designer Interface for MEMS pressure sensor  Lead an ASIC project in 0.35um technology and implement the top-level hardware verification;  Follow the standard design flow for automotive product, take full responsibility on schedule planning, layout floorplan, design review meeting, communication and documentation;  Tapeout on time and drive all the post-TO activities, e.g., create characterization plan, support the test engineer to debug the load board and adapt the test specification, review the Cpk results, do the ESD-HBM tests, make failure analysis on the ESD fail, drive all the characterization activities, review the results with product manager, etc.  Apr. 2014 to Feb. 2015 Associate Analog Designer ASIC for Pressure Sensor Interface  Employ a novel topology (digital PLL-based structure with force-balanced differential inputs) for the resistive sensor in wheatstone bridge configuration and design the system with matlab;  Lead the design activities for the analog front-end and implement it in transistor level in 0.18um technology. Design critical blocks such as: 1. VCO with low power and phase noise; 2. Bandgap ref. with trimmable absolute value and TC, robust EMC, low noise and offset; 3. Current source with trimming and dynamic digital feedback for force-balancing at input;  Initiate the start-of-design review, create floorplan with System Architect and Layout Engineer, present design review, challenge the specifications of blocks from other designers, prepare the top-level mixed-signal simulation plan and conduct the full chip verification.  Dec. 2013 to Mar. 2014 Associate Analog Designer ASIC for MEMS pressure sensor  Work as an satellite designer and support the design in block level with 0.35um technology;  Design the EMC robust supply system (regulator, bandgap, Power-on-Reset, Over-Voltage Detector). Create the Direct-Power-Injection simulation plan and corresponding testbench including parasitics of bondwires and package, conduct the full verification regarding EMC requirements;
  • 2. 2  Design temperature-sensor, RC oscillator, Common-Mode buffer. Support on ADC model improvement and top-level verification.  Sep. 2012 to May. 2013 Associate Analog Designer Linear-Hall Current Sensor  Redesign the POR to solve the hysteresis issue that caused significant yield loss;  Do failure analysis (by Focused Ion Beam) for the issue of temperature sensor saturation. Capture the root cause by micro-probing and redesign the temperature sensor;  Redesign the Variable-Gain-Amplifier to cover the full range of required gain;  Follow the post-TO activities and test/qualification flow until product release.  Aug. 2012 to Spe. 2012 Associate Analog Designer ASIC for MEMS pressure sensor  Design the NTC signal chain (three trimmable resistors + one fully differential amplifier) in 0.35um technology. Design for testability is implemented and specific functionality (no dark current during disable, EMC robust) is achieved;  Create the Design-Failure-Mode-Effect-Analysis as customer requested (DPI simulation on NTC pin, aging effect on gain/offset drift).  May. 2012 to Apr. 2013 Associate Analog Designer Testchip to evaluate new technologies  Design and implement some analog blocks (bandgap, DAC, temperature sensor) in two different 0.18um technologies (bulk CMOS vs. SOI). Make characterization plan and conduct the full characterization under the support of Characterization Engineer.  Analyze on the measurements and compare the performance in terms of process robustness, matching, leakage, noise, DPI immunity, noise decoupling and HV withstanding. Master thesis project Oct. 2010 to Oct. 2011 Energy-Efficient Capacitive-Sensor Interface Based on An Incremental Delta-Sigma Modulator Employing Current-Starved Inverter-Basde OTAs Supervisor: dr.ir. Michiel A. P. Pertijs  An energy-efficient micro-power flexible interface circuit tailored for capacitive humidity-sensor is implemented in 0.16um CMOS technology. A third-order incremental delta-sigma converter based on switched-capacitor integrators is employed in this interface.  A fully-differential current-starved inverter-based OTA structure is proposed for the integrators. A dynamically power down scenario is applied to reduce the power consumption by about 42%.  The interface achieves 13-bit capacitance-to-digital conversion while consuming 7uW from a 1.2V supply, resulting in a F.o.M of 0.17pJ/Step. It is layout accomplished and ready to be taped out. Technical skills  Good understanding of the characteristics of the devices in CMOS technologies (mainly in 0.35um and 0.18um technologies); Extensive design experience with CAD tools for IC design, such as Cadence Virtuoso and Spectre;  Familiar with matlab coding and verilogams modeling;  Experienced in failure analysis methodologies such as FIB, OBIRCH, EMMI, IV Curve Tracing, Microprobing, Optical Inspection, etc.  Basic understanding of MEMS pressure sensor design (CAD tools, key parameters, trade-off and challenges) and packaging (CLCC, CDIP and QFN) related parasitics;  Ability to work independently to get things implemented with strong self-discipline and motivation;  Good problem solving and decision making methodology. Business skills  Highly customer oriented and capable in change management;  Possess strong verbal and written communication skills;  Have strong sense of responsibility, play well in teamwork, flexible for travelling around the world *statement: this CV can only be used for job application within the companies, all rights reserved by GUO FAN