1. RESEARCH ON HYBRID MODULATION
STRATEGIES ON THE H-BRIDGE
TOPOLOGY OF MULTILEVEL
INVERTER
GUIDED BY: Mr.C.R.Balamurugan, Senior Lecturer(EEE)
PROJECT MEMBERS
S.Amanullah 50408105005
R.Balamurugan 50408105013
A.Manivasagan 50408105045
M.Sai natarajan 50408105071

2. Main Applications of MLI
 Active Power Filters
 Static Var Compensator
 Machine Drives for Sine wave Current
Applications
 HEV
 Solar PV modules

3. Advantages
 Devices of lower rating can be used thereby
enabling the schemes to be used for high
voltage applications.
 Reduced total harmonic distortion (THD).
 Better Performance
 Less dv/dt Stresses
 Less Stresses in the Bearings of the Motor
 Lower switching frequencies can be used and
hence reduction in switching losses.

4. Disadvantages
 Switching devices required is proportional to
Number of Levels
 Control strategy is difficult
 When the number of levels Increases design is
Complicated
 The number of isolated DC-links are more
compared to a two-level inverter.
 Power bus structure and hence the control
schemes become complex as the number of
levels increases.
 Decrease in Reliability

5. Objective
 To Perform Hybrid Modulation Strategies on the
H-Bridge Topology and Hybrid Topology of the
Multilevel Inverter
 To Analyze the Different Modulation techniques
In MATLAB and to Choose the technique which
is Efficient for Hardware Implementation

6. Operation of MLI by Switch

7. Conventional MLI topologies
 DCMLI(MPC or NPC)
 FCMLI
 Cascaded H Bridge

8. DCMLI
 The extension of a bridge inverter circuit to multiple
voltage levels with diodes used to constrain the
maximum voltage across the power switches to safe
operating levels was first proposed independently by
Baker
 The general class of these multilevel inverters are
referred to as diode-clamped or multipoint-clamped
inverters

9. Schematic of 5 level dcmli for a
phase

10. Advantages of DCMLI
 When the Level of Inverter Increases the
Harmonic content Decreases
 Efficiency is high because of Inverters are
Switching at Fundamental Switching Frequency
 Control scheme is simple

11. Disadvantages
 Excessive Clamping diodes required when the
level is high
 Difficult to control the Real Power flow of the
Individual Converter In MLI

12. FCMLI
 The capacitor-clamped multilevel converter is an
alternative topology where the clamping diodes
are removed and floating capacitors are used
instead to clamp the node voltages in the series
connected power switches.
 The single flying capacitor converter was first
proposed by Simon and Bronner whereas Present
interest in the circuit as a multilevel converter
stems from the work of Meynard and Foch who
applied the basic switched capacitor bridge
principle to enable voltage clamping in multiple
level power converters

13. Schematic of 5 level FCMLI for a
phase

14. Advantages
 Capacitor provides Capabilities during Power
Outages
 Inverter provides Switching combination
Redundancy for balancing Different voltage
levels
 Real and Reactive power flow can be
controlled

15. Disadvantages
 Excess Capacitor and Expensive
 Control  Complicate
 Switching Frequency and Switching losses
high for Real power Transmission

16. Cascaded H-Bridge
 The 5 Level circuit features two conventional
full-bridges serially connected together with
their power rails connected to separate
isolated dc voltage supplies.
 Number of DC sources required can be
calculated as S=3(m-1)/2

17. Main Features
The H-bridge inverter eliminates the excessively
large number of
 Bulky transformers required by conventional
inverters
 Clamping diodes required by multilevel diode-
clamped inverters
 Flying capacitors required by multilevel flying-
capacitor inverter.

18. Schematic of 5 level H-Bridge for a
phase

19. Switching Pattern
A
S11 S31
E vH 1
S41 S21
H1
S12 S32
E vH 2
S 42 S 22
H2 N

20. 3 Phase 5 Level Topology

21. Advantages
 Less Components compared with FCMLI and
DCMLI
 Optimized Circuit layout and Extra Clamping

22. Disadvantages
 Need of Separate DC Sources

23. Topology Comparison

24. Modulation Strategies

25. SPWM Modulation
 Switching Pulses are produced by comparing
the Reference wave and the Carrier wave
 Reference wave Sine Wave
 Carrier Wave  Triangular wave or Hybrid
carrier signal

26. Project work
 Simulation
 Hardware Module

27. Matlab Simulation
 Design
 Analysis

28. Design
 Power Circuit Design
 Switching sequence Design

29. Power circuit Design Per Phase

30. Switching Sequence Design Per
Phase

31. Analysis
 Factors considered during Analysis
 Modulation Technique Analysis
 Operation of Inverter in R , RL and Induction
Motor Loads

32. Parameters Chosen for
Simulation
• DC source Voltage 220 V
• Modulation Index 1 to 0.6
• Carrier Frequency 2000 Hz
• Rated Output Frequency 50 Hz

33. Factors Considered during
Analysis
 THD
 DF
 Vrms
 Vpeak
 Form Factor
 Crest Factor

34. Modulation Technique Analysis
HYBRID 1

35. HYBRID 2

36. HYBRID 3

37. Operation of Inverter in R , RL and Induction Motor
Loads
To analyze the operation of Inverter under
different conditions the Inverter circuit designed
in Matlab is analyzed with different loads
1) R Load
2) RL Load
3) Induction Motor load

38. OUTPUT VOLTAGE and FFT Analysis

39. HYBRID 1

40. HYBRID 2

41. HYBRID 3

42. HYBRID 4

43. HYBRID 5

44. HYBRID 6

45. HYBRID 7

46. HYBRID 8

47. SIMULATION RESULTS FOR RL LOAD

48. THD

49. V and V
peak rms

50. Distortion Factor and Crest
Factor

51. SIMULATION RESULTS FOR INDUCTION
MOTOR LOAD

53. Hardware Module
 FPGA Module
 H Bridge (PC01 Module)
 DC Sources

54. FPGA Module
 FPGA Module is used for Generating switching
pulses for triggering the IGBT’s
 FPGA Module is programmed by using xilinx
IDE or Libero IDE
 FPGA Module consists of 100,000-gate Xilinx
Spartan-3E XC3S100E FPGA in a 144-Thin
Quad Flat Pack package (XC3S100E-TQ144)

55. FPGA Module Block Diagram

56. H Bridge Module
 H Bridge module consists of MOSFET’s , Power
diodes, di/dt protection devices ,dv/dt protection
devices.. etc
 We are using 6 H bridge module for a 3 ph ,5 level
inverter
(S=3(M-1)/2)
S-No of Sources; M-No of Levels.

57. MOSFET Specification
We are using 8A, 500V, 0.850 Ohm, N-Channel Power MOSFET
 Features
 8A, 500V
 Rds(ON)= 0.850Ω
 Single Pulse Avalanche Energy Rated
 SOA is Power Dissipation Limited
 Nanosecond Switching Speeds
 Linear Transfer Characteristics
 High Input Impedance

58. THANK YOU