LIC UNIT IV.pptx

UNIT – IV
ANALOG TO DIGITAL AND DIGITAL TO
ANALOG CONVERTERS
LINEAR INTEGRATED CIRCUITS
1
KONGUNADU COLLEGE OF ENGINEERING
AND TECHNOLOGY (AUTONOMOUS)

ANALOG TO DIGITAL AND DIGITAL
TO ANALOG CONVERTERS
Syllabus
Basic DAC techniques - weighted resistor type, R-2R
Ladder type, inverted R-2R Ladder DAC, A/D
Converter - Flash type, Counter Type A/D converter,
Successive Approximation type, Single Slope type,
Dual Slope type, DAC/ADC Specifications.
2

ANALOG AND DIGITAL CONVERSIONS
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 An analog to digital converter (abbreviated A/D)
converts an analog signal into a digital number
(usually binary) suitable for input to a computer. The
inverse function is known as a digital to analog
converter (abbreviated D/A) and converts a digital
number (usually binary) into an analog voltage.
 In real world applications, quantities such as current,
voltage, temperature etc are available only in analog
form. Any quantity in analog form is difficult to process,
store and transmit without causing much error in the
output.
 Analog signals are more prone to noise signals and
thus introduce error as in case of amplitude
modulation.

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 On the other hand, a digital to analog (D/A) converter
is used when a binary output from a digital system
must be converted to some equivalent analog voltage
or current.
 If a computer is used as a controller in a certain
process, the output from the controller will be a digital
signal. This digital signal cannot be used as such to
control a process.
 The system to be controlled requires the analog
signal. In between the computer and the system to be
controlled, the digital to analog converter is a must.

APPLICATION SHOWING THE USE OF DAC AND ADC
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DIGITAL TO ANALOG CONVERSION
TECHNIQUES
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The techniques used for digital to analog conversion are
:
(i) Binary weighted resistor DAC and
(ii) R/2R ladder DAC.
 In both of these technique, the binary weighted
currents are generated using the shunt resistor
arrangement. According to the switch position which is
controlled by the digital input, the currents are added
together. Then, these currents are converted into
voltages using the OPAMP to give the analog output.
This type of DAC’s are also called as current driven
DAC.

BINARY WEIGHTED RESISTOR DAC.
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 The binary weighted DAC uses an OPAMP as
summing amplifier to sum the currents flowing through
the resistor network.

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S
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Advantage of binary weighted resistor DAC
The advantage of this type of DAC is its simplicity of constructing the
circuit.
Disadvantages of binary weighted resistor DAC
The disadvantages of this type of DAC are,
(i) Wide range of resistors values are required
An 8 bit DAC required the resistors with values of 2R, 4R, 8R, 16R, 32R,
64R, 128R
and 256R. Therefore, the largest value is resistor is 128 times larger than
the smallest
valued resistor.
(ii) The wide range of resistor value impose restriction on both higher and
lower value
resistor.
Fabricating very large values of resistor in IC is form is impractical. In
addition to that,
the voltage across such large resistors affects the accuracy of DAC. For
smaller values
of resistors, loading effect may occur.
(iii) The resistance of the switch may create some deviation in the binary
weighted relation

R/2R LADDER TYPE DAC
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 The drawback of using wide range of resistor value in
binary weighted resistor DAC is avoided in R/2R
ladder type DAC. As the name implies, this type of
DACs require, only two resister values R and 2R.
Similar to binary weighted method, a network
consisting of shunt resistors are used to generate the
circuit currents and OPAMP is used as a summing
amplifier.
 The two types of R/2R ladder DAC are :
(i) Current mode R/2R ladder type DAC and
(ii) Voltage mode R/2R ladder type DAC

CURRENT MODE R/2R TYPE DAC
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 This type of DAC’s uses only two valued resistors (R and 2R). This
type of DACs are also called as current steering mode R/2R DACs or
inverted R/2R ladder DACs.

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VOLTAGE MODE R/2R TYPE DAC
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 In this type of R/2R ladder DACs, the reference voltage is applied to
one of the switch position. The other switch position is connected to
ground.

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Advantages of R/2R ladder DACs.
The advantages of R/2R ladder type DAC are :
(i) Only two valued resistors are required (R and 2R)
(ii) Number of bits can be extended easily by adding
more sections consists of only R and2R valued
resistors.
(iii) The slow down effect caused by the stray
capacitance is avoided in current mode R/2R ladder
DAC.

FLASH TYPE A/D CONVERTER
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 This type of A/D converter is the simplest one to
construct. The basic circuit of this type of converter
consist of
(i) Set of OPAMP comparators
(ii) Resistor divider network and
(iii) n-bit priority encoder (2n line to n line encoder)
 It consist of 8 comparators and a divider network
which consist of 8 resistors. That is, an n-bit ADC
requires 2 power n comparators. Since the
comparison of analog input with the reference voltage
is done in parallel using all the comparators, the flash
type ADC are also known as parallel comparator ADC.

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RESISTOR DIVIDER NETWORK
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 The reference voltage is given to the comparators through
the resistor divider network. Since all the resistors are of
equal value, the reference voltage level available at the
nodes are equally divided between the reference voltage
(VR) and the ground voltage (0V).

COMPARATOR
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 Comparator in this ADC is used to compare the analog input voltage VR
with each of the node voltage of the resistor divider network.
The output value x of the comparator depends on the value of Vi and Vn.
If Vi > Vn, then
the logic output of x is equal to 1 (x = 1). If Vi < Vn, then the logic output
of x is equal
to 0 (x = 0).
Depending on the value of Vi and node voltage Vn, all the comparators
give their outputs
in parallel. The outputs of all the comparator are given in parallel as input
to the priority
encoder.

Priority Encoder
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 The n-bit priority encoder is used to encode the 2
power n bit digital input into a n-bit encoded output.
This encoder receives the input from the comparators
circuit. In the figure, the encoder is used to encode
the 8-bit output from the comparator circuit.
 The output of this encoder is the equivalent digital
output of the analog input (Vi). Since the conversion
of analog signal takes place simultaneously, this type
of ADCs are having high speed compared to the other
techniques.

Operation of ADC
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 Analog input signals (Vi) which is to be converted into digital signal is given
directly to the +ve terminal of all the comparators. The reference voltage
(VR) is given through the resistor divider network to -ve terminal of all the
comparators. Therefore, the voltage levels that exist at the -ve input of the
comparator C0, C1, C2, C3... are 0V, VR/8, 2VR/8, 3VR/8,....
 If the analog input is greater than the node reference voltage (Vi > VRn),
then the output of the comparator is equal to ‘1’.
 If the analog input is less than the node reference voltage (VRn > Vi) , then
the output of the comparator is equal to ‘0’.
 (Node reference voltage is the voltage level available at the -ve terminal of
the comparator)
 For example, if the analog input voltage is between 0 to VR/8 volt, then the
output of C0 is ‘1’ (x0 = 1) and other outputs are equal to zero(0). Thus, the
output of comparator circuit is 0000 0001 and the digital equivalent output is
000.

COUNTER TYPE A/D CONVERTER
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 The counter type A/D converter is constructed using only one
comparator with a variable reference voltage. The variable reference
voltage can be obtained by a sequence counter and a D/A converter.

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 The n-bit binary counter is initially set to
0 by the Reset switch which is normally
active LOW. Therefore, the digital output
is zero and the analog equivalent Vr is
also 0.
 When Reset signal is released (HIGH),
the clock pulses gated through the AND
gate are counted by the binary counter.
 The D/A converter converts the digital
output to an analog voltage and supplies
it as the inverting input to the
comparator.
 The output of the comparator enables
the AND gate to pass the clock. The
number of counted pulses increases with
time and the analog input Vr is a rising
staircase waveform

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 The counting will continue until the
reference voltage Vr equals and just rises
more than Vi . Then the comparator output
becomes LOW and this disables the AND
gate from passing the clock.
 The counting stops at the instance Vi > Vr
and at that instant the digital output of the
comparator represents the analog input
voltage Vi. Then the clock is inhibited, the
counter stops its progress and the
conversion is said to be complete.
 The numbers stored in the n-bit counter is
the equivalent n-bit digital data for the
given analog input voltage.
 In this A/D converter, the counter advances
by one count for every clock pulse, and
therefore, the clock speed decides the
conversion speed. For example, if a 100
kHz clock is used in an 8-bit A/D converter,
the counter advances for every step and it
will take 2.56 ms to reach the full-scale
digital output.
 Normally, the time required to reach one
half of the full-scale voltage is called
average conversion time. Hence, the
average conversion time of the above A/D
converter is 1.28 ms.

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Advantages
 (i) The counter type A/D converter is very simple and
needs less hardware compared to the
 simultaneous type A/D converter.
 (ii) This is suitable for digitising applications with high
resolution.
Disadvantages
 In counter type A/D converter, the conversion time is very
long, variable and proportional to the amplitude of the
analog input voltage. Since the counter always counts from
0 through a normal sequence, a maximum of 2n counts are
required to convert a full-scale analog input voltage.
Hence, for an n-bit A/D converter, the average conversion
time is 2n/2 = 2n–1 times the clock period, which can be
very long for large value of n.

SUCCESSIVE APRPOXIMATION TYPE ADC
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 Successive approximation type of ADCs consist of a
special type of register called as Successive
Approximation Register. This register uses an efficient
code searching technique called Binary Search
technique.
 The important blocks of this ADC are,
(i) Comparator
(ii) Successive Approximation Register (SAR)
(iii) Digital to Analog Converter

BLOCK DIAGRAM OF SUCCESSIVE APPROXIMATION
ADC
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Advantages of Successive approximation type ADC
The advantages of successive approximation type ADC are :
(i) Very low conversion time
(ii) Maintains a high resolution
(iii) Low cost compared to flash converter
Disadvantages of Successive approximation type ADC
The disadvantages of this type of ADC are :
(i) It requires a complex successive approximation register
(SAR)
(ii) It requires a DAC
(iii) It provide medium accuracy.

SINGLE SLOPE ADC
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Comparator
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 OPAMP is used as a comparator to compare the
input signal with the output of ramp signal generator.
Input is given to the +ve terminal of the comparator.
 If the analog input signal is greater than the ramp
generator signal, then the output of comparator is set
to ‘1’. If the analog input signal is less than the ramp
generator signal, then the output of comparator is set
to ‘0’.
 The output of comparator is given as input to AND
gate as well as timing and control unit.

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Ramp Signal Generator
` Initially the ramp generator is reset to zero value and its output voltage
is zero volt. Next, it generates the ramp voltage with the desired slope
and given to the -ve terminal of the comparator.
BCD or Binary Counter
 At the beginning of conversion process, the counter is reset to zero.
The counter value is incremented on receiving each clock input from
the AND gate output. On receiving the latch signal from the timing and
control unit, the counter value are latched and given to the decoder
unit for displaying the output value directly.
 If binary output is needed, binary counter has to be used instead of
BCD counter.
AND gate and control unit
 AND gate is used to drive the clock input to the counter unit.
Whenever the output of comparator is ‘1’, the clock input is given to
the counter unit through the AND gate.
 The control unit is used to provide timing and control signal to ramp
generator and counter unit.

Principle of operation
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 At first, reset signal is given to the ramp BCD counter and its
value is set to zero, before the start of the conversion. Thus,
the ramp output and counter output are reset to ‘0’.
 The analog input to be converted into a digital output is given
to the positive terminal of the comparator. At this point, the
input voltage is greater than the ramp voltage. Therefore, the
comparator output goes high (1). The high (1) output of the
comparator enables the AND gate and the clock input is given
to the counter unit.
 Now, the counter is incremented on receiving every clock
pulse. At the same time, the high (1) output of the comparator
is given to the timing and control circuit. This control circuit
enables the ramp generator and starts the ramp signal. This
ramp signal is compared with the input analog signal. The
output of comparator is ‘1’ until the amplitude of ramp signal
exceeds the input voltage.

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 The comparator output goes to ‘0’ value, when the ramp
output exceeds the input voltage. This disables the AND gate
and simultaneously stops the clock signal to the counter
circuit.
 On receiving the latch signal from the timing and control unit,
the counter values are latched and given to the decoder
circuit. The decoder converts the counter values in to seven
segment code for direct display in the display unit. With this,
the conversion process is completed and the values displayed
in the display unit gives the digital equivalent of the analog
input.
 Before starting the next conversion, reset signal is given to the
counter and ramp generator to reset their value to ‘0’.
 Instead of seven segment display if binary output is required
then BCD counter can be replaced by a Binary counter.

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SINGLE SLOPE ADC
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 The main components of single slope of ADC are,
(i) Comparator
(ii) Ramp single generator
(iii) BCD or Binary counter and
(iv) AND gate and control unit.
Advantages of single slope ADC
The advantages of single slope ADC are,
(i) Simple circuit
(ii) No used for integrator
Disadvantages of single slope ADC
The disadvantage or limitation of single slope ADC are,
(i) Low resolution
(ii) Variation in ramp generator output due to time and temperature.

DUAL SLOPE A/D CONVERTER
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Integrator
 The integrator is used to integrate the input signal Vi for a fixed time
duration of 2n clock periods. Then, the integrator is used to integrate
the reference voltage -VR, until the output of integrator becomes
zero. The output of integrator is given as input to the negative
terminal of the comparator circuit.
Comparator
 Positive terminal of the comparator is connected to the ground
voltage (0V). Negative terminal of the comparator is connected to the
output of the integrator circuit. This comparator compares the output
of integrator with the ground voltage. The output of comparator is
maintained at high state (l) until the voltage level at the negative
terminal is less than the voltage at the positive terminal (0 volt).
 The output of comparator is given to the control unit.

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Control unit
 The control unit consist of an AND gate, clock input and a flip-flop
circuit. The AND gate is enabled or disabled by the output of
comparator. The AND gate is enabled whenever the output of
comparator is in high state (l). During this period, the clock pulses
are allowed to reach the binary counter.
 The flip-flop circuit is used to control the switch ‘s’ at the input side.
This switch is used to connect either the analog input (Vi) or the
reference signal (-VR) to the integrator negative terminal.
n-bit binary counter
 It is an n-bit binary ripple counter. It receives the clock pulse through
the AND gate circuit. It MSB value becomes ‘1’ after receiving the 2n
clock pulses. The most significant bit (MSB) of the counter is used to
control the flip-flop circuit.
 Output latch circuits are used to latch the data available in the
counter. Seven segment decoder can be connected to the binary
counter to get direct BCD output.

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 The dual slope ADC first integrates the analog input signals Vi for a
fixed duration of 2^n clock period (ti). The analog switch S at the
input side connects the input signal Vi to the integrator circuit. The
output voltage of the integrator is written as,
 Since the output of integrator is negative (less than zero), the
comparator output is at high level (1) and enables the AND
gate.
 Now, the clock pulses are given to the counter circuit and
counter starts to increment its value. After receiving the 2^n
clock pulses, the MSB of the counter goes to high value. That
is , the MSB is equal to ‘1’. Once the MSB become high, the
output of flip-flop also goes to high. This will change the switch
position at the input side and the reference voltage -VR is now
connected to the input of integrator.

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 The negative slope of the ramp
signal generated by the
integrator up to to the time
period t1 (2^n clock period).
 After the time periods t1, the
integrator is connected to -VR.
Since the reference voltage is
negative, it creates a positive
sloped ramp signal at the output
of the integrator
 At the end of time t2, the
integrator output is equal to zero
and the comparator output goes
to low value (0). This will disable
the AND gate and stops the
clock pulses to reach the counter
circuit. The counter value at this
stage corresponds to the time
period t2. That is, the counter
value gives the number of clock
pulses received during the time

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It consist of the following circuit components :
(i) Integrator
(ii) Comparator
(iii) Control unit and
(iv) n-bit binary counter
Advantages of dual slope ADC
The advantages of dual slope ADC are,
(i) High accuracy
(ii) Low cost and
(iii) Immune to temperature variations in R1 and C1.
Disadvantage of dual slope ADC.
The main disadvantage of this dual slope ADC is its low
operating speed.

COMPARISON BETWEEN FLASH, DUAL SLOPE AND SUCCESSIVE
APPROXIMATION TECHNIQUES
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D/A CONVERTER SPECIFICATIONS
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 Converter specifications are the performance
parameters of the D/A converters and are indicated in
the data sheets. The important specifications of the
D/A converter are :
(i) Resolution
(ii) Accuracy
(iii) Settling time
(iv) Dynamic range
(v) Offset error
(vi) Gain error
(vii) Linearity error and
(viii) Stability

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(i) Resolution :
• It is defined as the smallest change in voltage which
may be produced at the output of the converter.
(ii) Accuracy
• Accuracy gives the comparison of the actual output
voltage with the expected output voltage.
• It is the nearness of the measured output voltage to its
ideal output voltage.
(iii) Settling time
 Settling time indicates the conversion speed of the
DAC. It is defined as the time taken by the DAC output
to settle within ±½ LSB (½ step size) of its final value
for the full scale code change at the input.

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(iv) Dynamic range
 It is defined as the ratio of the largest output value to the
smallest output value (excluding zero). It is expressed in dB and
given as,
Dynamic range = 20 log2n
(v) Offset error
 This error occurs due to the presence of offset voltage of the op-
amp and leakage current exist in the current switches of the
DAC-Circuit.
 The offset error is defined as the non zero level of the output
voltage when all the digital inputs are zero.
(vi) Gain error
 The difference between the calculated gain of the current
to voltage converter and the actual gain achieved in called
as gain error.
 This type of error occurs due tot errors in the feedback
resistor of the op-amp which is used as current to voltage
converter.

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(vii) Linearity error (Non-linearity)
 The analog output voltage of an ideal DAC would be a
linear function of the input digital signal. In practical, it
is not like that. There will be some deviation from the
ideal case and non-linearity occurs.
(viii) Stability
 A highly stable converter is the good converter.
Stability applies to the performance of the converter
with respect to the variation in time, temperature and
power supply. Therefore, the parameters like offset,
gain and linearity must be specified over the full
operating temperature and power supply ranges.

SPECIFICATIONS OF A/D CONVERTERS (ADC)
55
 The important specifications or performance
parameters of analog to digital converter are
(i) Resolution
(ii) Quantization error
(iii) Gain and offset error
(iv) Conversion time or settling time
(v) Integral Non-linearity and
(vi) Differential Non-linearity

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(i) Resolution
 It is defined as the change in input voltage needed to
change the digital output by 1LSB.
(ii) Quantization error
 There is an uncertainty about the exact value of Vi for
a particular digital output. This uncertainty is defined
as quantization error and its value is ±½ LSB. In terms
of full-scale input voltage it is given as,

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(iii) Gain and offset error
 Gain error : It is defined as the difference between the
actual full-scale transition voltage and the ideal full-
scale transition voltage.
 Offset error : It is defined as the difference between
the actual and ideal first transition voltage. Offset error
is added with all the conversions.

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Conversion time or settling time
 Conversion time is an important speciation for an
ADC. It is defined as the time required to convert an
analog input signal into its equivalent digital output.
This time is also called as settling time.
The conversion time mainly depends on the following
two factors :
 (a) Propagation delay of the components used in the
circuit and
 (b) The conversion technique used to convert analog
signal into digital output

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(v) Integral Non-Linearity (INL)
 It is a measure of the maximum deviation of the actual
ADC transfer function from a straight line transfer function
in which the corrections for offset and gain error are made.
(vi) Differential Non-Linearity (DNL)
 Differential non-linearity is defined as the maximum value
of the difference in each conversions current code width
(CCW) and the ideal code width (ICW). DNL is an
important parameter and it represent the ADCs ability to
relate a small change in input voltage to the correct change
in code conversion.
DNL = Maximum of (code DNL)
Where, code DNL is find out for each conversion as Code
DNL = CCW - ICW

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