Computer organization

1. Addressing modes
and formats
submitted by
Anshika Das

2. Addressing
Modes
The address field or fields
of a typical instruction
format are relatively
small. We would like to be
able to reference a large
range of locations in main
memory or, for some
systems, virtual memory.
To achieve this objective, a
variety of addressing
techniques has been
employed.
• Immediate
• Direct
• Indirect
• Register
• Register indirect
• Displacement
• Stack

3.  Effective
address
theeffectiveaddress
(EA)inasystemwithout
virtualmemory,the
effectiveaddresswillbe
eitheramainmemory
addressoraregister.In
avirtualmemory
system,theeffective
addressisavirtual
addressoraregister.
Usefulness of addressing
modes
• Virtually all computer architectures provide more than
one of these addressing modes.
• To reduce the period the implementation of programs.

4.  Relationship
(CISC)and
(RISC)of
addressing
modes
Complex Instruction Set Computer(CISC)
Designs provide a large number of addressing
modes.
The main motivations are-
1. To support complex data structure
2. To provide flexibility to access operands
Reduced Instruction Set Computer(RISC)
Typically, a RISC machine, unlike a CISC machine,
uses a simple and relatively straightforward set
of addressing modes.

5. Immediate Addressing
 Simplest from of addressing
 Operand= A
 Operand is part of instruction
 Operand = address field
 e.g. ADD 5
 No memory reference to fetch the data
 Fast
 Limited range
 Add 5 to contents of accumulator
 5 is operand

6. Immediate Addressing Diagram
Opcode Operand
Instruction

7. Direct Addressing
 Simple form of addressing
 Address field contains address of operand
 Effective address(EA) = address field (A)
 E.g. ADD A
 Single memory reference to access data
 No additional calculations to work out effective address
 Limited address space
 Add contents of cell A to accumulator
 Look in memory at address A for operand

8. Direct Addressing Diagram
Opcode Address A
Operand
Instruction
Memory

9. Indirect Addressing
• Reference to the address of a word in memory which contains a full-length address of
the operand.
• EA= (A)
• Advantage:
• Disadvantage:
• One to get its address and a second to get its value
 Parentheses are to be interpreted as meaning contents of.
 For a word length of N an address space of 2^n is now available.
 Instruction execution requires two memory references to fetch the
operand

10. Indirect Addressing Diagram
Opcode Address A
Pointer to operand
Operand
Instruction
Memory

11. Register (Direct) Addressing
• Address field refers to a register rather than a main memory address
• EA=R
• Limited number of register
• Very small address field needed Shorter instructions
• Faster instruction fetch
• No memory access
• Very limited address space
• Multiple registers helps performance

12. Register Addressing Diagram
Opcode RegisterAddress R
Operand
Instruction
Register

13. Register Indirect Addressing
• Analogous to indirect addressing
• EA=(R)
• Large address space(2”)
• One fewer memory access than indirect addressing
 The only difference whether the address field refers to a memory location or a
register

14. Register Indirect Addressing Diagram
Opcode RegisterAddress R
Operand
Instruction
Memory
Pointer to operand
Registers

15. Displacement Addressing
• Combines the capabilities of direct addressing and register indirect addressing
• EA=A+(R)
• Requires that the instruction have two address fields, at least one of which is explicit
• Most common uses
 The value contained in one address field (value=A)is useddirectly
 The other address field refersto a register whose contents are added to A to produce the
effective address
 Relativeaddressing
 Base-registeraddressing
 Indexing

16. Displacement Addressing Diagram
Opcode RegisterAddress R
Operand
Instruction
Memory
Pointer to operand
Registers
Address A

17. Relative Addressing
• The implicitly referenced register is the program counter (PC)
• R= Program counter, PC
• EA=A+(PC) PC contains the main address
• The next instruction address is added to the address field to
produce the EA
• Typically the address field is treated as a twos complement
number for this operation
• Thus the effective address is a displacement relative to the
address of the instruction
 EA=PC+D-address
 Operand= D-address
 PC+D-address= Data

18. Base-Register Addressing
• A holds displacement
• R holds pointer to base address
• R may be explicit or implicit
• e.g. segment register in 80X86

19. Index Addressing
• The address field references a main memory address and the reference register
contains a positive displacement from that address
• The method of calculation EA is the same as for base-register addressing
• Autoindexing
• Post indexing
• Pre indexing
 Automatically increment or decrement the index register after each reference to it
 EA=A+ (R)
 (R) (R) +1
 Indexing is performed after the indirection
 EA= (A)+(R)
 Indexing is performed before the indirection
 EA=(A+(R))

20. Index Addressing
 A= base
 R= displacement
 EA= A+R
 Good for accessing arrays
• EA= A+R
• R++

21. Stack Addressing
• A stack is a linear array of locations
• A stack is a reversed block of locations
• Associated with the stack is a pointer whose value is the address of the top of the stack
• Is a form of implied addressing
• The machine instructions need not include a memory reference but implicity operate on
the top of the stack
 Sometimes referred to as a pushdown list or last-in-first queue.
 Items are appended to the top of the top of the stack so that the block is partially filled
 The stack pointer is maintained in a register
 Thus references to stack locations in memory are in fact register indirect
addresses

22. Autoincrement/Autodecrement Mode
• A special case od indirect register mode. The register whose number is included in the
instruction code, contains the address of the operand. Autoincrement Mode= after
operand addressing, the contents of the register is incement.
• Decrement Mode= before operand addressing, the contents of the register is decrement.
Load reg baes
(Effective address= contents of base register)

23. Pentium Addressing Modes
• Virtual or effective address is offset into segment
• 12 addressing modes available
 Starting address plus offset gives linear address.
 Immediate
 Register operand
 Displacement
 Base
 Base with displacement
 Scaled index with displacement
 Base with index and displacement
 Base scaled index with displacement
 Relative

24. Pentium Addressing Mode Calculation

25. PowerPC Addressing Modes
• Load/Store architecture
• Branch Address
• Arithmetic
Indirect
 Instruction includes 16 bit displacement to be added to base register(may be GP register)
 Can replace base register content with new address
Indirect indexed
 Instruction reference base register and index register (both may be GP)
 ea is sum of contents,
 Absolute
 Relative
 Indirect
 Operands in register or part of instruction

26. PowerPC Memory Operand