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Akshay Kalghatgi Contact No.: +1-480-434-3670
Graduate student in Computer Engineering Email-id: akshay.kalghatgi@gmail.com
OBJECTIVE: Seeking full time position
EDUCATION
Degree Major College GPA Year of Completion
M.S. Computer Engineering Arizona State University 3.70 / 4.0 Dec 2016 (expected)
B.E. Electrical & Electronics Gogte Institute of Technology 3.72 / 4.0 2011
Courses: Embedded OS Internals, Real Time Embedded Systems, Computer Architecture, Distributed Multiprocessor OS, Computer Networks, Applied Cryptography, Computer
Systems, Microcontrollers, Control Systems, DSP, Linear ICs & Applications, Low Power BioElectronics
EMPLOYMENTS & RESPONSIBILITIES
Network Engineer Intern at Limelight Networks May 2016 - present
 Technology: Python, SQLite, Bash, DNS, NIPAP (IPAM), RANCID, Observium (NOMS), ORM, MySQL, REST API, XML-RPC, JSON, YAML, Confluence, github
 Consolidate Network Infrastructure, Configurations (Arista, Brocade, Cisco, etc.), internal systems and databases (Cornerstone, IPAM, Observium, DNS-NG)
Network Operations Intern at Limelight Networks May 2015 – Aug 2015
 Technology: Python, PHP, Shell script, Cacti, RANCID, Request Tracker, Jira, JSON, OAuth, REST API, VirtualBox, Confluence, github
 Add Network weathermap backend module to integrate RANCID network devices config differ output to auto generate Network maps
 Automate Mass Drive replacement analysis and Audit processes
Systems Engineer at Tata Consultancy Services Limited (TCS) Mar 2012 – Nov 2014
 Technology: Ladder, STL, VB script, PLC, HMI, SCADA, Simocode, Subversion
 Development & Testing of Programmable Logic Controllers (PLC) for industrial automation in Water Utility industry
 Development, System Integration & Testing of Human Machine Interfaces (HMI) and SCADA systems
 Composition of I/O drafts, Software Design Specifications, As-builts
SKILLS & TRAININGS
 Programming Languages: C, C++, Python, Java, PHP, HTML, VB Script, SQL, Shell Script, Ladder logic, STL, Assembly language
 Software: git, github, Matlab, cadence, XML, PSpice, Multisim, LabVIEW, MS Office package, Photoshop, Eclipse IDE, MySQL, gem5, Solid Edge v19, Auto CAD, Simatic
Manager v5.5, WinCC v7, WinCC Flexible 2008 SP3, Simocode ES 2003, RS View, RS Logix 500, RS Linx, RS emulator, OSI PI Historian, SAP ME, SAP MII, VMware, VirtualBox
PROJECTS
Hash Table and Dynamic Probe in Linux Kernel (POSIX, Linux kernel development, Device Driver, C, C++, team of 2)
 Developed 2 device drivers, one for kernel hash table and another for tracing kernel with dynamic instrumentation of kprobe
Clock Synchronization in Distributed Machines (Linux Kernel development, Device Driver, C, team of 3)
 Developed Linux Kernel Driver to create a new network protocol registered over IPv4 and bypassed standard socket interface
 Imposed message ordering (Lamport Clock) on systems in distributed environment
Control I2C EEPROM on Intel Galileo Gen1 board (Linux Kernel development, Bottom Half Processing, Intel Galileo Gen1, C, team of 3)
 Developed I2C driver to detect and control I2C slave EEPROM from Intel Galileo Gen1 board
 Implemented blocking and non-blocking system calls with bottom half processing using work queue
Library for User-level Threads (RTOS, Scheduler, Interrupt handler, C)
 Developed preemptive scheduler of user-level threads and timer interrupt handler
 Implemented mutex resource sharing, basic priority inheritance protocol and stack-based priority ceiling protocol
Peer to Peer Network Application for File Sharing (Napster, Socket Programming, Python, team of 3)
Compiler Construction (Compiler, Java, Swing, team of 2)
 Lexical, syntactic and semantic analysis of programming language and code generator for creating simple assembly language
Breaking Passwords by Constructing Rainbow Table (md5, Python)
Shared Message Queues for passing messages between threads (pthread, Linux Kernel development, Intel Galileo Gen1, C, team of 3)
 Implemented character devices for sending, receiving & message management threads, and performed profiling on the code
Real time task modelling (POSIX pthread, C)
 Implemented periodic and aperiodic tasks, event handling, priority inheritance, priority inversion, etc. & analyzed using kernelshark
Schedulability analysis of fixed priority scheduling algorithms (Schedulability analysis, C)
 Schedulability analysis of rate monotonic, deadline monotonic and least slack time first algorithms
Client-server distributed message passing system (Scheduler, C, team of 3)
 Developed a thread library and a cooperative scheduler, and implemented a distributed message passing system
Optimized Implementation of LRU and ARC cache replacement policies (Cache, C++)
Analyses of System Architecture (gem5, shell script, team of 2)
 Analyses of simple CPU models & Compiler optimization by simulation (of ALPHA processor) on gem5
 Analyses of cache behavior and cache block replacement algorithms by simulation on gem5
Zigbee based remotely controlled crane bot (Microcontroller, Zigbee, Assembly Language, team of 4)
 Implemented Zigbee secure wireless technology to communicate with a Atmel AT89C51 microcontroller operated Crane bot
Algorithm Design for analyzing Sea Ice Concentration Anomaly Data (Big Data, Matlab, team of 3)
 Construct a correlation-based graph for the given big data and plot histogram, identify supernodes and compute clustering coefficient and characteristic path length
Designed AER Imager in Cadence (Cadence, team of 3)
Analog Electronics
 Designed, implemented and analyzed various amplifier circuits (including single stage FET & BJT, Darlington Emitter follower with & without bootstrapping, two stage BJT
voltage series feedback amplifier, push pull amplifier), various oscillator circuits (including RC phase shift oscillator, Hartley & Colpitts oscillator, crystal oscillator), various
clippers and clampers, various rectifiers with & without filter
 Implemented and analyzed various op-amp circuits including inverting, non-inverting & scale changing of signals using op-amps, RC phase shift oscillator, RC coupled amplifier,
rectifiers, clippers, clampers and Schmitt trigger circuits and verified the same by simulation on pspice
Power Electronics
 Designed, implemented and analyzed triggering circuits including SCR triggering using UJT, Single & 3 phase controlled full-wave rectifiers with R and R-L loads, A.C. voltage
controller using TRIAC and DIAC combination, MOSFET based single-phase full-bridge inverter, commutation using LC circuits and auxiliary circuits
 Implemented speed control of separately excited DC motor using MOSFET chopper, speed control of DC motor using single semi converter, speed control of stepper motor and
speed control of universal motor using A.C. voltage controller

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REFERENCES
Name Position Organization E-mail Mobile
Gaurab Upadhaya
Director of Network Strategy and
Interconnection
Limelight Networks, Inc. gaurab@llnw.com +1 602 850 7199
Jesse Sandon Network Ops Manager Limelight Networks, Inc. jsandon@llnw.com +1 602 481 5161
Joni Fesler Field Operations Supervisor
Parking and Transit Services,
Arizona State University
Joni.Fesler@asu.edu +1 480 330 6782
Ajit Hattiholi Manager Tata Consultancy Services Ltd. ajit.hattiholi@tcs.com +91 888 543 3358
Gaurav Malpe Systems Engineer Tata Consultancy Services Ltd. gaurav.malpe@tcs.com +91 973 002 8704
Samit Redij Store Owner Azad Agency redij.samit@gmail.com +91 888 805 9638
Geeta Redij Social Worker Vaishya Vani Mahila Mandal angelic.nehak@gmail.com +91 944 929 3710
Mohan Shenoy Associate Professor K.L.S. Gogte Institute of Technology mpshenoy@git.edu +91 991 692 6771