SlideShare a Scribd company logo
1 of 17
Download to read offline
1 | P a g e
IIP3 improvement
using Source
Degeneration
Technique
RFIC design Course
Ahsan Ghoncheh
RFIC, Fall 2016
Professor Reza Moazzam
UCSD Extension
2 | P a g e
Acknowledgment
Special thanks to Prof. Reza Moazzam for his RFIC Course at USCD Extension and
to Ata Sarrafinazhad for his guidance on the Advance System Design
simulation.
3 | P a g e
TABLE OF CONTENTS
ACKNOWLEDGMENTS .................................................................................................. 2
TABLE OF CONTENTS.................................................................................................... 3
LIST OF TABLES .............................................................................................................. 4
1. Introduction................................................................................................................... 5
1.1 Linearity...................................................................................................................... 5
1.2 Intermodulation............................................................................................................. 8
1.3 Third order Intercept Point............................................................................................ 9
2 Third-order intercept point improvement ..................................................................... 10
2.1 Source Degenaration...................................................................................................11
2.2 Our ADS Simulatoin for Source Degeneration............................................................11
Conclusion ........................................................................................................................ 16
References........................................................................................................................... 3
4 | P a g e
TABLE OF Figures
Fig 1 Real resistor Linearity ......................................................................................... 6
Fig 2 Output voltage behavior vs Temperature........................................................ 6
Fig 3 Supply Current behavior vs Temperature....................................................... 7
Fig 4 IMD,HD ,IIP2 and IIP3 caused by two frequencies.................................... 8
Fig 5 IIP3 ......................................................................................................................... 10
Fig 6 Source degeneration .................................................................................................11
Fig 7a Our ADS Settings................................................................................................... 12
Fig 7b LNA MOSFET Circuit without using Source Degeneration................................. 13
Fig 8 IIP3 simulation without using source degeneration................................... 14
Fig 9 LNA MOSFET Circuit using Source Degeneration ................................................ 15
Fig 10 IIP3 simulation using source degeneration............................................................ 16
5 | P a g e
1. Introduction
In this article we are going to talk briefly about linearity and what intermodulation
and mainly IIP3 (Third order intercept point) is. Why Third order Intercept point is
important in linearity by simulating a design for calculating the IIP3 through
Advanced Design System (ADS), This design would be a N Type MOSFET Cascade
LNA and in the end and using source degeneration technique we would show the
IIP3 improvement.
1.1 Linearity
The basic formula for any engineer is V = R × I and as we know it is not
accurate100%. In an ideal world it is exact but the because when our V and I are
larger than what our device can handle or other conditions like high and low
temperature, humidity, and pressure compensates and therefore we won’t have
the ideal ohm law. We want the resistor, R, to be as linear as possible and remain
so over wide ranges of signals and conditions. In reality, characteristics of devices
due to limitations of the devices affects. IC components require linearity monitor
and studies therefore linearity studies should also be done in developing
components such as switches, amplifiers, VCOs, mixers, and LNAs. Avoiding or
weak study and optimization on such studies result in instabilities, failure to meet
specs, and interferences which might even result in malfunctions or destroying the
device or entire system. [1]
6 | P a g e
Fig1. Real resistor Linearity is corrupted when I and V passes physical limitation.[1]
In the above figure you can find the behavior of a simple resistor for when it reaches
over its limits in Fig1. We have also provided examples on output voltage vs
temperature behavior in Fig2 as well as temperature behavior vs supply current in
Fig3.
Fig2.Output voltage behavior vs Temperature increase [2]
7 | P a g e
Fig3.Supply Current behavior vs Temperature increase [3]
When bringing up a RF component such as front end cellular modules including
but not limited to Switches LNA, mixers, filters an PA we have a large signal
dynamic therefore they can produce harmonics, interferences, and saturation
which are effects of nonlinearities. Different parameter standards are usually
used in order to characterize the non-linarites of input vs outputs which some a
brief list would be 1dB compression point (CP-1dB),Compression dynamic range
(CDR),Spurious-free dynamic range (SFDR),Desensitization dynamic range (DDR)
and Intercept points (IPn)
In this article we exclusively study on the intercept points, IP3) to show
nonlinearity affecting useful signals.
8 | P a g e
1.2 Intermodulation
Before discussing on what IP3 is we should first briefly talk about Intermodulation.
When more than two frequencies have amplitude modulation because of
nonlinearities in a system, Intermodulation or Intermodulation Distortion would
happen which is abbreviated as IM and IMD. When Intermodulation happens, each
of the two frequencies form additional signals at harmonic frequencies called
harmonic distortion as well as a series of multiplication of sums and subtractions
of the main two frequencies. The two frequencies and intermodulation distortions
caused by them up to the third order are shown in figure 4.
Figure 4. Two fundamental signals and IMD,HD ,IIP2 and IIP3 caused by them[4]
9 | P a g e
1.3 Third-order intercept point
In an ideal linear system if we have xt  as input, we would be having yt  as output
using the below linear equation. α1 is gain of the system.[5]
yt   1 xt 
But due to non-linearity limitations of our system the actual output signal we would
get from the given input would be as below according to Taylor series expansion.
If we only have one signal coming in the system it would result in distortions such
as harmonics which can be removed using Low pass or Band Pass filters.
yt   1 xt 2 x2
t 3 x3
t 
Now let’s assume we have two frequencies as we mentioned in the 1.2 section, the
Intermodulation topic. Lets define our input is the two fundamental signals as
below:
xt  A1 cos1t  A2 cos2t
When bringing in the equation above in our output equation we would have the
below result:
yt  1 A1 cos1t  A2 cos2t2 A1 A2 cos1  2 t 2 A1 A2 cos1 2 t
3 3
A2
A 3 3
A2
A
 1 2
cos21 1 2 t  1 2
cos2  2 t
4 4
3 A2
A 3 A2
A
3 3 2 1 cos2  t  2 1 cos2  t
For analyzing the previous equation below are the importing considerations:
 The first order ω1 and ω2 terms are our desired output terms.
 ω1±ω2 terms are the second-order intermodulation products ,IM2.
 2ω1±ω2 and 2ω2±ω1 terms are third-order intermodulation products,IM3.
Second-order intermodulation can usually be eliminated using different techniques
but the challenge is meeting third order intermodulation specs. The desired output
terms increases with the input amplitude, but according to the equation given
above the IM3 output is growing with A3
. When the First order Amplitude output
meets with A3
is where IIP3 orthird-order intersection point and the output is the
output-referred IP3, or OIP3defined as shown in Fig. 5.We define IIP3 formula as
4 4
10 | P a g e
below:
IIP3 
4 1
3 3
Fig. 5 Desired Output, Third Order and Second order products.[7]
2 Third-order intercept point improvement
There are various techniques on reducing the IIP3 such as Negative Feedback,
Derivative superposition, Post correction, Biasing in strong inversion, using wide
device and thick oxide, Source degeneration and much more techniques which are
useful in optimization and improving the third order intercept point during our
simulation and design . In this article we would be working on the source
degeneration technique.
11 | P a g e
2.1 Source Degenaration
We can degenerate an output signal which will lead to lowering and linearizing the
stage’s gain curve [hasht] by using the resistance Rs to the source terminal of a
common-source stage. [8]
Fig6. An NMOS transistor with source degeneration is equivalent to a single
transistor with a smaller transconductance and larger output impedance.[8]
According to the equation mentioned above the limit of Gm with respect to Rs is is
1/Rs, meaning that larger source resistances will make the gain a weaker function
of gm and more linear. The source degeneration is used as a feedback and by tuning
it we can make the system more linearized.
2.2 Our ADS Simulatoin for Source Degeneration
After defining the concepts of IIP3 now we will work on the simulation did through
Advanced Designed Systems (ADS) software. We have designed a Low Noise
Amplifier as shown in Fig.6 which is created by cascading two N-Type MOSFET
Transistors. It is good to mention the MOSFET3 is used for biasing the supply.
12 | P a g e
7a)
13 | P a g e
7b)
Fig7. a) is a screenshot of the settings we have defined for our cascade MOSFET
design of LNA and b) shows the actual circuit.
14 | P a g e
Note that we have not defined any source impedance in our design and have
connected the our source in MOSFET1 to Ground.
Our Third-order intercept point using the simulation in ADS would be according to
Fig.9 which when tracing our two point it would be reaching at -3dB.
Fig8. IIP3 simulation without using source degeneration
Now if we use the same simulation we have used before and only add a 1.5nH
inductor in our source Resistor we would be improving our third order intercept
point for 5dB. Please note the reason we have used inductor instead of resistor is
15 | P a g e
resistor would cause noise. Therefore inductor would be a better choice for our IIP3
optimization. You can see our ADS Design in Fig10.
Fig 9) Adding 1.5 nH to source of our N Type Cascaded MOSFET1
16 | P a g e
By adding an inductor and looking at our Third-order intercept point using the
simulation in ADS seen in fig. 11we would see our IIP3 has improved from -3dB to
2dB which is a 5dB improvement.
Fig 10. IIP3 simulation using source degeneration
Conclusion
In this article we started by an introduction to Linearity and Intermodulation and
concentrated on what IIP3 is. Afterward we named different techniques on
reducing the IIP3 and concentrated and introduced source degeneration, which
we can make the system more linear using it and practically designed a N-Type
MOSFET LNA in order to measure its IIP3 and and used source degeneration to
see the improvement of IIP3 in our simulation using the discussed technique by
5dB.
17 | P a g e
References
[1] Behzad Razavi, RF Microelectronics, 2nd
edition: Prentice Hall 2011.
[2] “http://www.edn.com/design/test-and-measurement/4376465/The-IP3-
specification-demystified”
[3] “http://analog326.rssing.com/chan-13870196/all_p1.html”
[4] “http://e2e.ti.com/cfs-file/__key/communityserver-blogs-components-
weblogfiles/00-00-00-03-25/4466.Figure2.JPG”
[5] “http://www.cliftonlaboratories.com/norton_amplifier.htm”
[6] Behzad Razavi, Design of Analog CMOS Integrated Circuits: McGraw-Hill,
2001.
[7] ”Wikipedia,http://en.wikipedia.org/wiki/Third_order_intercept_
point”
[8] http://www.radio-electronics.com/info/rf-technology-
design/receiver-overload/intercept-point-third-order.php”
[9] Ali Sheikholeslami ‘Source Degeneration’ IEEE SOLID-STATE
CIRCUITS MAGAZINE, Summer 2014

More Related Content

What's hot

Tutorial transmission line details
Tutorial transmission line detailsTutorial transmission line details
Tutorial transmission line detailsDillian Jhair Staine
 
Interconnect timing model
Interconnect  timing modelInterconnect  timing model
Interconnect timing modelPrachi Pandey
 
Performance analysis of High Speed ADC using SR F/F
Performance analysis of High Speed ADC using SR F/FPerformance analysis of High Speed ADC using SR F/F
Performance analysis of High Speed ADC using SR F/FIOSR Journals
 
UNIT-III-DIGITAL SYSTEM DESIGN
UNIT-III-DIGITAL SYSTEM DESIGNUNIT-III-DIGITAL SYSTEM DESIGN
UNIT-III-DIGITAL SYSTEM DESIGNDr.YNM
 
Design and Realization of 2.4GHz Branch-line Coupler
Design and Realization of 2.4GHz Branch-line CouplerDesign and Realization of 2.4GHz Branch-line Coupler
Design and Realization of 2.4GHz Branch-line CouplerQuang Binh Pham
 
128 mA CMOS LDO with 108 dB PSRR at 2.4 MHz frequency
128 mA CMOS LDO with 108 dB PSRR at 2.4 MHz frequency128 mA CMOS LDO with 108 dB PSRR at 2.4 MHz frequency
128 mA CMOS LDO with 108 dB PSRR at 2.4 MHz frequencyTELKOMNIKA JOURNAL
 
A Design Technique To Reduce Nbti Effects From 5t Sram Cells
A Design Technique To Reduce Nbti Effects From 5t Sram CellsA Design Technique To Reduce Nbti Effects From 5t Sram Cells
A Design Technique To Reduce Nbti Effects From 5t Sram CellsIJERA Editor
 
The wire
The wireThe wire
The wiresdpable
 
RF circuit design using ADS
RF circuit design using ADSRF circuit design using ADS
RF circuit design using ADSankit_master
 
VHDL Implementation of Flexible Multiband Divider
VHDL Implementation of Flexible Multiband DividerVHDL Implementation of Flexible Multiband Divider
VHDL Implementation of Flexible Multiband Dividerijsrd.com
 
Cn3210001005
Cn3210001005Cn3210001005
Cn3210001005IJMER
 
crosstalk minimisation using vlsi
crosstalk minimisation using vlsicrosstalk minimisation using vlsi
crosstalk minimisation using vlsisubhradeep mitra
 
Performance Comparison of RF CMOS Low Noise Amplifiers in 0.18-µm technology ...
Performance Comparison of RF CMOS Low Noise Amplifiers in 0.18-µm technology ...Performance Comparison of RF CMOS Low Noise Amplifiers in 0.18-µm technology ...
Performance Comparison of RF CMOS Low Noise Amplifiers in 0.18-µm technology ...VLSICS Design
 
The International Journal of Engineering and Science (The IJES)
The International Journal of Engineering and Science (The IJES)The International Journal of Engineering and Science (The IJES)
The International Journal of Engineering and Science (The IJES)theijes
 

What's hot (20)

call for papers, research paper publishing, where to publish research paper, ...
call for papers, research paper publishing, where to publish research paper, ...call for papers, research paper publishing, where to publish research paper, ...
call for papers, research paper publishing, where to publish research paper, ...
 
Tutorial transmission line details
Tutorial transmission line detailsTutorial transmission line details
Tutorial transmission line details
 
Interconnect timing model
Interconnect  timing modelInterconnect  timing model
Interconnect timing model
 
Fm3110901095
Fm3110901095Fm3110901095
Fm3110901095
 
Performance analysis of High Speed ADC using SR F/F
Performance analysis of High Speed ADC using SR F/FPerformance analysis of High Speed ADC using SR F/F
Performance analysis of High Speed ADC using SR F/F
 
UNIT-III-DIGITAL SYSTEM DESIGN
UNIT-III-DIGITAL SYSTEM DESIGNUNIT-III-DIGITAL SYSTEM DESIGN
UNIT-III-DIGITAL SYSTEM DESIGN
 
5992-1632.docx
5992-1632.docx5992-1632.docx
5992-1632.docx
 
Design and Realization of 2.4GHz Branch-line Coupler
Design and Realization of 2.4GHz Branch-line CouplerDesign and Realization of 2.4GHz Branch-line Coupler
Design and Realization of 2.4GHz Branch-line Coupler
 
128 mA CMOS LDO with 108 dB PSRR at 2.4 MHz frequency
128 mA CMOS LDO with 108 dB PSRR at 2.4 MHz frequency128 mA CMOS LDO with 108 dB PSRR at 2.4 MHz frequency
128 mA CMOS LDO with 108 dB PSRR at 2.4 MHz frequency
 
Abstract5
Abstract5Abstract5
Abstract5
 
A Design Technique To Reduce Nbti Effects From 5t Sram Cells
A Design Technique To Reduce Nbti Effects From 5t Sram CellsA Design Technique To Reduce Nbti Effects From 5t Sram Cells
A Design Technique To Reduce Nbti Effects From 5t Sram Cells
 
The wire
The wireThe wire
The wire
 
RF circuit design using ADS
RF circuit design using ADSRF circuit design using ADS
RF circuit design using ADS
 
VHDL Implementation of Flexible Multiband Divider
VHDL Implementation of Flexible Multiband DividerVHDL Implementation of Flexible Multiband Divider
VHDL Implementation of Flexible Multiband Divider
 
Cn3210001005
Cn3210001005Cn3210001005
Cn3210001005
 
crosstalk minimisation using vlsi
crosstalk minimisation using vlsicrosstalk minimisation using vlsi
crosstalk minimisation using vlsi
 
Bt31482484
Bt31482484Bt31482484
Bt31482484
 
Analog VLSI Design
Analog VLSI DesignAnalog VLSI Design
Analog VLSI Design
 
Performance Comparison of RF CMOS Low Noise Amplifiers in 0.18-µm technology ...
Performance Comparison of RF CMOS Low Noise Amplifiers in 0.18-µm technology ...Performance Comparison of RF CMOS Low Noise Amplifiers in 0.18-µm technology ...
Performance Comparison of RF CMOS Low Noise Amplifiers in 0.18-µm technology ...
 
The International Journal of Engineering and Science (The IJES)
The International Journal of Engineering and Science (The IJES)The International Journal of Engineering and Science (The IJES)
The International Journal of Engineering and Science (The IJES)
 

Viewers also liked

Graded Care Profile
Graded Care ProfileGraded Care Profile
Graded Care ProfileBASPCAN
 
CYI Submission to the Standing Committee on Aboriginal Australian and Torres ...
CYI Submission to the Standing Committee on Aboriginal Australian and Torres ...CYI Submission to the Standing Committee on Aboriginal Australian and Torres ...
CYI Submission to the Standing Committee on Aboriginal Australian and Torres ...Gudmundur (Gummi) Fridriksson
 
How to Improve Singing Voice Quality 3 Quick Tips NOW
How to Improve Singing Voice Quality 3 Quick Tips NOWHow to Improve Singing Voice Quality 3 Quick Tips NOW
How to Improve Singing Voice Quality 3 Quick Tips NOWMarvin Lee
 
雲端學校訂餐系統
雲端學校訂餐系統雲端學校訂餐系統
雲端學校訂餐系統佳陵 林
 
Security Management PowerPoint Final
Security Management PowerPoint FinalSecurity Management PowerPoint Final
Security Management PowerPoint Finalshawn tedford
 
Teknologi bahan kelompok 4
Teknologi bahan kelompok 4Teknologi bahan kelompok 4
Teknologi bahan kelompok 4Wenti Elica
 
Epistemología, Bolivia, Belleza, Carnaval, White Skin, Corso, Piel Blanca, Co...
Epistemología, Bolivia, Belleza, Carnaval, White Skin, Corso, Piel Blanca, Co...Epistemología, Bolivia, Belleza, Carnaval, White Skin, Corso, Piel Blanca, Co...
Epistemología, Bolivia, Belleza, Carnaval, White Skin, Corso, Piel Blanca, Co...Álvaro Miguel Carranza Montalvo
 
Taller de Tesis I, Tesis, Elaboración, Disertación, Bolivie, Bioética, Piel B...
Taller de Tesis I, Tesis, Elaboración, Disertación, Bolivie, Bioética, Piel B...Taller de Tesis I, Tesis, Elaboración, Disertación, Bolivie, Bioética, Piel B...
Taller de Tesis I, Tesis, Elaboración, Disertación, Bolivie, Bioética, Piel B...Álvaro Miguel Carranza Montalvo
 
All About Mobile App Remarketing
All About Mobile App RemarketingAll About Mobile App Remarketing
All About Mobile App RemarketingJames Nichols
 
Care proceedings under the Public Law Outline: The role for pre-proceedings
Care proceedings under the Public Law Outline: The role for pre-proceedingsCare proceedings under the Public Law Outline: The role for pre-proceedings
Care proceedings under the Public Law Outline: The role for pre-proceedingsBASPCAN
 
School and domestic violence in interaction: Russian experience
School and domestic violence in interaction: Russian experienceSchool and domestic violence in interaction: Russian experience
School and domestic violence in interaction: Russian experienceBASPCAN
 
"Has knowledge brought justice"? A survivor's perspective.
"Has knowledge brought justice"? A survivor's perspective."Has knowledge brought justice"? A survivor's perspective.
"Has knowledge brought justice"? A survivor's perspective.BASPCAN
 
What is effective communication in child protection social work? Developing a...
What is effective communication in child protection social work? Developing a...What is effective communication in child protection social work? Developing a...
What is effective communication in child protection social work? Developing a...BASPCAN
 
Systems Reform: New Directions in Child Protection law policy and services in...
Systems Reform: New Directions in Child Protection law policy and services in...Systems Reform: New Directions in Child Protection law policy and services in...
Systems Reform: New Directions in Child Protection law policy and services in...BASPCAN
 
sree profile
sree profilesree profile
sree profilesrihari p
 

Viewers also liked (20)

Graded Care Profile
Graded Care ProfileGraded Care Profile
Graded Care Profile
 
CYI Submission to the Standing Committee on Aboriginal Australian and Torres ...
CYI Submission to the Standing Committee on Aboriginal Australian and Torres ...CYI Submission to the Standing Committee on Aboriginal Australian and Torres ...
CYI Submission to the Standing Committee on Aboriginal Australian and Torres ...
 
How to Improve Singing Voice Quality 3 Quick Tips NOW
How to Improve Singing Voice Quality 3 Quick Tips NOWHow to Improve Singing Voice Quality 3 Quick Tips NOW
How to Improve Singing Voice Quality 3 Quick Tips NOW
 
tülay
tülaytülay
tülay
 
雲端學校訂餐系統
雲端學校訂餐系統雲端學校訂餐系統
雲端學校訂餐系統
 
Security Management PowerPoint Final
Security Management PowerPoint FinalSecurity Management PowerPoint Final
Security Management PowerPoint Final
 
Repechage prezentacja
Repechage prezentacjaRepechage prezentacja
Repechage prezentacja
 
Teknologi bahan kelompok 4
Teknologi bahan kelompok 4Teknologi bahan kelompok 4
Teknologi bahan kelompok 4
 
Dl
DlDl
Dl
 
Epistemología, Bolivia, Belleza, Carnaval, White Skin, Corso, Piel Blanca, Co...
Epistemología, Bolivia, Belleza, Carnaval, White Skin, Corso, Piel Blanca, Co...Epistemología, Bolivia, Belleza, Carnaval, White Skin, Corso, Piel Blanca, Co...
Epistemología, Bolivia, Belleza, Carnaval, White Skin, Corso, Piel Blanca, Co...
 
Taller de Tesis I, Tesis, Elaboración, Disertación, Bolivie, Bioética, Piel B...
Taller de Tesis I, Tesis, Elaboración, Disertación, Bolivie, Bioética, Piel B...Taller de Tesis I, Tesis, Elaboración, Disertación, Bolivie, Bioética, Piel B...
Taller de Tesis I, Tesis, Elaboración, Disertación, Bolivie, Bioética, Piel B...
 
Продвижение российского бизнеса на азиатских рынках
Продвижение российского бизнеса на азиатских рынкахПродвижение российского бизнеса на азиатских рынках
Продвижение российского бизнеса на азиатских рынках
 
All About Mobile App Remarketing
All About Mobile App RemarketingAll About Mobile App Remarketing
All About Mobile App Remarketing
 
Care proceedings under the Public Law Outline: The role for pre-proceedings
Care proceedings under the Public Law Outline: The role for pre-proceedingsCare proceedings under the Public Law Outline: The role for pre-proceedings
Care proceedings under the Public Law Outline: The role for pre-proceedings
 
School and domestic violence in interaction: Russian experience
School and domestic violence in interaction: Russian experienceSchool and domestic violence in interaction: Russian experience
School and domestic violence in interaction: Russian experience
 
"Has knowledge brought justice"? A survivor's perspective.
"Has knowledge brought justice"? A survivor's perspective."Has knowledge brought justice"? A survivor's perspective.
"Has knowledge brought justice"? A survivor's perspective.
 
What is effective communication in child protection social work? Developing a...
What is effective communication in child protection social work? Developing a...What is effective communication in child protection social work? Developing a...
What is effective communication in child protection social work? Developing a...
 
Warehouse
Warehouse Warehouse
Warehouse
 
Systems Reform: New Directions in Child Protection law policy and services in...
Systems Reform: New Directions in Child Protection law policy and services in...Systems Reform: New Directions in Child Protection law policy and services in...
Systems Reform: New Directions in Child Protection law policy and services in...
 
sree profile
sree profilesree profile
sree profile
 

Similar to IIP3 improvement using Source Degeneration Technique

LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARE
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARELOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARE
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CAREieijjournal
 
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARE
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARELOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARE
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CAREieijjournal
 
Low Power SI Class E Power Amplifier and Rf Switch for Health Care
Low Power SI Class E Power Amplifier and Rf Switch for Health CareLow Power SI Class E Power Amplifier and Rf Switch for Health Care
Low Power SI Class E Power Amplifier and Rf Switch for Health Careieijjournal1
 
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARE
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARELOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARE
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CAREieijjournal1
 
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARE
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARELOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARE
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CAREieijjournal
 
A Low Noise Two Stage Operational Amplifier on 45nm CMOS Process
A Low Noise Two Stage Operational Amplifier on 45nm CMOS ProcessA Low Noise Two Stage Operational Amplifier on 45nm CMOS Process
A Low Noise Two Stage Operational Amplifier on 45nm CMOS ProcessIRJET Journal
 
Design of Low Power, High PSRR Error Amplifier for Low Drop-Out CMOS Voltage...
Design of Low Power, High PSRR Error Amplifier for Low Drop-Out CMOS  Voltage...Design of Low Power, High PSRR Error Amplifier for Low Drop-Out CMOS  Voltage...
Design of Low Power, High PSRR Error Amplifier for Low Drop-Out CMOS Voltage...IJEEE
 
Design of a Low Noise Amplifier using 0.18μm CMOS technology
Design of a Low Noise Amplifier using 0.18μm CMOS technologyDesign of a Low Noise Amplifier using 0.18μm CMOS technology
Design of a Low Noise Amplifier using 0.18μm CMOS technologytheijes
 
PARASITIC-AWARE FULL PHYSICAL CHIP DESIGN OF LNA RFIC AT 2.45GHZ USING IBM 13...
PARASITIC-AWARE FULL PHYSICAL CHIP DESIGN OF LNA RFIC AT 2.45GHZ USING IBM 13...PARASITIC-AWARE FULL PHYSICAL CHIP DESIGN OF LNA RFIC AT 2.45GHZ USING IBM 13...
PARASITIC-AWARE FULL PHYSICAL CHIP DESIGN OF LNA RFIC AT 2.45GHZ USING IBM 13...Ilango Jeyasubramanian
 
Nabeelpbm1998@gmail.com
Nabeelpbm1998@gmail.comNabeelpbm1998@gmail.com
Nabeelpbm1998@gmail.comnabeelavulan
 
Design of Ota-C Filter for Biomedical Applications
Design of Ota-C Filter for Biomedical ApplicationsDesign of Ota-C Filter for Biomedical Applications
Design of Ota-C Filter for Biomedical ApplicationsIOSR Journals
 
Comparative Performance Analysis of Low Power Full Adder Design in Different ...
Comparative Performance Analysis of Low Power Full Adder Design in Different ...Comparative Performance Analysis of Low Power Full Adder Design in Different ...
Comparative Performance Analysis of Low Power Full Adder Design in Different ...ijcisjournal
 
High Speed, Low Offset, Low Power, Fully Dynamic Cmos Latched Comparator
High Speed, Low Offset, Low Power, Fully Dynamic Cmos Latched ComparatorHigh Speed, Low Offset, Low Power, Fully Dynamic Cmos Latched Comparator
High Speed, Low Offset, Low Power, Fully Dynamic Cmos Latched Comparatoriosrjce
 
Optimization of Digitally Controlled Oscillator with Low Power
Optimization of Digitally Controlled Oscillator with Low PowerOptimization of Digitally Controlled Oscillator with Low Power
Optimization of Digitally Controlled Oscillator with Low Poweriosrjce
 
DESIGN OF HIGH EFFICIENCY TWO STAGE POWER AMPLIFIER IN 0.13UM RF CMOS TECHNOL...
DESIGN OF HIGH EFFICIENCY TWO STAGE POWER AMPLIFIER IN 0.13UM RF CMOS TECHNOL...DESIGN OF HIGH EFFICIENCY TWO STAGE POWER AMPLIFIER IN 0.13UM RF CMOS TECHNOL...
DESIGN OF HIGH EFFICIENCY TWO STAGE POWER AMPLIFIER IN 0.13UM RF CMOS TECHNOL...VLSICS Design
 
A Novel Architecture for Different DSP Applications Using Field Programmable ...
A Novel Architecture for Different DSP Applications Using Field Programmable ...A Novel Architecture for Different DSP Applications Using Field Programmable ...
A Novel Architecture for Different DSP Applications Using Field Programmable ...journal ijme
 
DESIGN AND ANALYSIS OF PHASE-LOCKED LOOP AND PERFORMANCE PARAMETERS
DESIGN AND ANALYSIS OF PHASE-LOCKED LOOP AND PERFORMANCE PARAMETERSDESIGN AND ANALYSIS OF PHASE-LOCKED LOOP AND PERFORMANCE PARAMETERS
DESIGN AND ANALYSIS OF PHASE-LOCKED LOOP AND PERFORMANCE PARAMETERSIJMEJournal1
 
IRJET-Design of Capacitor Less LDO Regulator by using Cascode Compensation Te...
IRJET-Design of Capacitor Less LDO Regulator by using Cascode Compensation Te...IRJET-Design of Capacitor Less LDO Regulator by using Cascode Compensation Te...
IRJET-Design of Capacitor Less LDO Regulator by using Cascode Compensation Te...IRJET Journal
 
Behavioral Analysis of Second Order Sigma-Delta Modulator for Low frequency A...
Behavioral Analysis of Second Order Sigma-Delta Modulator for Low frequency A...Behavioral Analysis of Second Order Sigma-Delta Modulator for Low frequency A...
Behavioral Analysis of Second Order Sigma-Delta Modulator for Low frequency A...IOSR Journals
 

Similar to IIP3 improvement using Source Degeneration Technique (20)

LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARE
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARELOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARE
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARE
 
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARE
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARELOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARE
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARE
 
Low Power SI Class E Power Amplifier and Rf Switch for Health Care
Low Power SI Class E Power Amplifier and Rf Switch for Health CareLow Power SI Class E Power Amplifier and Rf Switch for Health Care
Low Power SI Class E Power Amplifier and Rf Switch for Health Care
 
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARE
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARELOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARE
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARE
 
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARE
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARELOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARE
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CARE
 
A Low Noise Two Stage Operational Amplifier on 45nm CMOS Process
A Low Noise Two Stage Operational Amplifier on 45nm CMOS ProcessA Low Noise Two Stage Operational Amplifier on 45nm CMOS Process
A Low Noise Two Stage Operational Amplifier on 45nm CMOS Process
 
Design of Low Power, High PSRR Error Amplifier for Low Drop-Out CMOS Voltage...
Design of Low Power, High PSRR Error Amplifier for Low Drop-Out CMOS  Voltage...Design of Low Power, High PSRR Error Amplifier for Low Drop-Out CMOS  Voltage...
Design of Low Power, High PSRR Error Amplifier for Low Drop-Out CMOS Voltage...
 
Design of a Low Noise Amplifier using 0.18μm CMOS technology
Design of a Low Noise Amplifier using 0.18μm CMOS technologyDesign of a Low Noise Amplifier using 0.18μm CMOS technology
Design of a Low Noise Amplifier using 0.18μm CMOS technology
 
PARASITIC-AWARE FULL PHYSICAL CHIP DESIGN OF LNA RFIC AT 2.45GHZ USING IBM 13...
PARASITIC-AWARE FULL PHYSICAL CHIP DESIGN OF LNA RFIC AT 2.45GHZ USING IBM 13...PARASITIC-AWARE FULL PHYSICAL CHIP DESIGN OF LNA RFIC AT 2.45GHZ USING IBM 13...
PARASITIC-AWARE FULL PHYSICAL CHIP DESIGN OF LNA RFIC AT 2.45GHZ USING IBM 13...
 
Nabeelpbm1998@gmail.com
Nabeelpbm1998@gmail.comNabeelpbm1998@gmail.com
Nabeelpbm1998@gmail.com
 
Design of Ota-C Filter for Biomedical Applications
Design of Ota-C Filter for Biomedical ApplicationsDesign of Ota-C Filter for Biomedical Applications
Design of Ota-C Filter for Biomedical Applications
 
Comparative Performance Analysis of Low Power Full Adder Design in Different ...
Comparative Performance Analysis of Low Power Full Adder Design in Different ...Comparative Performance Analysis of Low Power Full Adder Design in Different ...
Comparative Performance Analysis of Low Power Full Adder Design in Different ...
 
Cw4301569573
Cw4301569573Cw4301569573
Cw4301569573
 
High Speed, Low Offset, Low Power, Fully Dynamic Cmos Latched Comparator
High Speed, Low Offset, Low Power, Fully Dynamic Cmos Latched ComparatorHigh Speed, Low Offset, Low Power, Fully Dynamic Cmos Latched Comparator
High Speed, Low Offset, Low Power, Fully Dynamic Cmos Latched Comparator
 
Optimization of Digitally Controlled Oscillator with Low Power
Optimization of Digitally Controlled Oscillator with Low PowerOptimization of Digitally Controlled Oscillator with Low Power
Optimization of Digitally Controlled Oscillator with Low Power
 
DESIGN OF HIGH EFFICIENCY TWO STAGE POWER AMPLIFIER IN 0.13UM RF CMOS TECHNOL...
DESIGN OF HIGH EFFICIENCY TWO STAGE POWER AMPLIFIER IN 0.13UM RF CMOS TECHNOL...DESIGN OF HIGH EFFICIENCY TWO STAGE POWER AMPLIFIER IN 0.13UM RF CMOS TECHNOL...
DESIGN OF HIGH EFFICIENCY TWO STAGE POWER AMPLIFIER IN 0.13UM RF CMOS TECHNOL...
 
A Novel Architecture for Different DSP Applications Using Field Programmable ...
A Novel Architecture for Different DSP Applications Using Field Programmable ...A Novel Architecture for Different DSP Applications Using Field Programmable ...
A Novel Architecture for Different DSP Applications Using Field Programmable ...
 
DESIGN AND ANALYSIS OF PHASE-LOCKED LOOP AND PERFORMANCE PARAMETERS
DESIGN AND ANALYSIS OF PHASE-LOCKED LOOP AND PERFORMANCE PARAMETERSDESIGN AND ANALYSIS OF PHASE-LOCKED LOOP AND PERFORMANCE PARAMETERS
DESIGN AND ANALYSIS OF PHASE-LOCKED LOOP AND PERFORMANCE PARAMETERS
 
IRJET-Design of Capacitor Less LDO Regulator by using Cascode Compensation Te...
IRJET-Design of Capacitor Less LDO Regulator by using Cascode Compensation Te...IRJET-Design of Capacitor Less LDO Regulator by using Cascode Compensation Te...
IRJET-Design of Capacitor Less LDO Regulator by using Cascode Compensation Te...
 
Behavioral Analysis of Second Order Sigma-Delta Modulator for Low frequency A...
Behavioral Analysis of Second Order Sigma-Delta Modulator for Low frequency A...Behavioral Analysis of Second Order Sigma-Delta Modulator for Low frequency A...
Behavioral Analysis of Second Order Sigma-Delta Modulator for Low frequency A...
 

IIP3 improvement using Source Degeneration Technique

  • 1. 1 | P a g e IIP3 improvement using Source Degeneration Technique RFIC design Course Ahsan Ghoncheh RFIC, Fall 2016 Professor Reza Moazzam UCSD Extension
  • 2. 2 | P a g e Acknowledgment Special thanks to Prof. Reza Moazzam for his RFIC Course at USCD Extension and to Ata Sarrafinazhad for his guidance on the Advance System Design simulation.
  • 3. 3 | P a g e TABLE OF CONTENTS ACKNOWLEDGMENTS .................................................................................................. 2 TABLE OF CONTENTS.................................................................................................... 3 LIST OF TABLES .............................................................................................................. 4 1. Introduction................................................................................................................... 5 1.1 Linearity...................................................................................................................... 5 1.2 Intermodulation............................................................................................................. 8 1.3 Third order Intercept Point............................................................................................ 9 2 Third-order intercept point improvement ..................................................................... 10 2.1 Source Degenaration...................................................................................................11 2.2 Our ADS Simulatoin for Source Degeneration............................................................11 Conclusion ........................................................................................................................ 16 References........................................................................................................................... 3
  • 4. 4 | P a g e TABLE OF Figures Fig 1 Real resistor Linearity ......................................................................................... 6 Fig 2 Output voltage behavior vs Temperature........................................................ 6 Fig 3 Supply Current behavior vs Temperature....................................................... 7 Fig 4 IMD,HD ,IIP2 and IIP3 caused by two frequencies.................................... 8 Fig 5 IIP3 ......................................................................................................................... 10 Fig 6 Source degeneration .................................................................................................11 Fig 7a Our ADS Settings................................................................................................... 12 Fig 7b LNA MOSFET Circuit without using Source Degeneration................................. 13 Fig 8 IIP3 simulation without using source degeneration................................... 14 Fig 9 LNA MOSFET Circuit using Source Degeneration ................................................ 15 Fig 10 IIP3 simulation using source degeneration............................................................ 16
  • 5. 5 | P a g e 1. Introduction In this article we are going to talk briefly about linearity and what intermodulation and mainly IIP3 (Third order intercept point) is. Why Third order Intercept point is important in linearity by simulating a design for calculating the IIP3 through Advanced Design System (ADS), This design would be a N Type MOSFET Cascade LNA and in the end and using source degeneration technique we would show the IIP3 improvement. 1.1 Linearity The basic formula for any engineer is V = R × I and as we know it is not accurate100%. In an ideal world it is exact but the because when our V and I are larger than what our device can handle or other conditions like high and low temperature, humidity, and pressure compensates and therefore we won’t have the ideal ohm law. We want the resistor, R, to be as linear as possible and remain so over wide ranges of signals and conditions. In reality, characteristics of devices due to limitations of the devices affects. IC components require linearity monitor and studies therefore linearity studies should also be done in developing components such as switches, amplifiers, VCOs, mixers, and LNAs. Avoiding or weak study and optimization on such studies result in instabilities, failure to meet specs, and interferences which might even result in malfunctions or destroying the device or entire system. [1]
  • 6. 6 | P a g e Fig1. Real resistor Linearity is corrupted when I and V passes physical limitation.[1] In the above figure you can find the behavior of a simple resistor for when it reaches over its limits in Fig1. We have also provided examples on output voltage vs temperature behavior in Fig2 as well as temperature behavior vs supply current in Fig3. Fig2.Output voltage behavior vs Temperature increase [2]
  • 7. 7 | P a g e Fig3.Supply Current behavior vs Temperature increase [3] When bringing up a RF component such as front end cellular modules including but not limited to Switches LNA, mixers, filters an PA we have a large signal dynamic therefore they can produce harmonics, interferences, and saturation which are effects of nonlinearities. Different parameter standards are usually used in order to characterize the non-linarites of input vs outputs which some a brief list would be 1dB compression point (CP-1dB),Compression dynamic range (CDR),Spurious-free dynamic range (SFDR),Desensitization dynamic range (DDR) and Intercept points (IPn) In this article we exclusively study on the intercept points, IP3) to show nonlinearity affecting useful signals.
  • 8. 8 | P a g e 1.2 Intermodulation Before discussing on what IP3 is we should first briefly talk about Intermodulation. When more than two frequencies have amplitude modulation because of nonlinearities in a system, Intermodulation or Intermodulation Distortion would happen which is abbreviated as IM and IMD. When Intermodulation happens, each of the two frequencies form additional signals at harmonic frequencies called harmonic distortion as well as a series of multiplication of sums and subtractions of the main two frequencies. The two frequencies and intermodulation distortions caused by them up to the third order are shown in figure 4. Figure 4. Two fundamental signals and IMD,HD ,IIP2 and IIP3 caused by them[4]
  • 9. 9 | P a g e 1.3 Third-order intercept point In an ideal linear system if we have xt  as input, we would be having yt  as output using the below linear equation. α1 is gain of the system.[5] yt   1 xt  But due to non-linearity limitations of our system the actual output signal we would get from the given input would be as below according to Taylor series expansion. If we only have one signal coming in the system it would result in distortions such as harmonics which can be removed using Low pass or Band Pass filters. yt   1 xt 2 x2 t 3 x3 t  Now let’s assume we have two frequencies as we mentioned in the 1.2 section, the Intermodulation topic. Lets define our input is the two fundamental signals as below: xt  A1 cos1t  A2 cos2t When bringing in the equation above in our output equation we would have the below result: yt  1 A1 cos1t  A2 cos2t2 A1 A2 cos1  2 t 2 A1 A2 cos1 2 t 3 3 A2 A 3 3 A2 A  1 2 cos21 1 2 t  1 2 cos2  2 t 4 4 3 A2 A 3 A2 A 3 3 2 1 cos2  t  2 1 cos2  t For analyzing the previous equation below are the importing considerations:  The first order ω1 and ω2 terms are our desired output terms.  ω1±ω2 terms are the second-order intermodulation products ,IM2.  2ω1±ω2 and 2ω2±ω1 terms are third-order intermodulation products,IM3. Second-order intermodulation can usually be eliminated using different techniques but the challenge is meeting third order intermodulation specs. The desired output terms increases with the input amplitude, but according to the equation given above the IM3 output is growing with A3 . When the First order Amplitude output meets with A3 is where IIP3 orthird-order intersection point and the output is the output-referred IP3, or OIP3defined as shown in Fig. 5.We define IIP3 formula as 4 4
  • 10. 10 | P a g e below: IIP3  4 1 3 3 Fig. 5 Desired Output, Third Order and Second order products.[7] 2 Third-order intercept point improvement There are various techniques on reducing the IIP3 such as Negative Feedback, Derivative superposition, Post correction, Biasing in strong inversion, using wide device and thick oxide, Source degeneration and much more techniques which are useful in optimization and improving the third order intercept point during our simulation and design . In this article we would be working on the source degeneration technique.
  • 11. 11 | P a g e 2.1 Source Degenaration We can degenerate an output signal which will lead to lowering and linearizing the stage’s gain curve [hasht] by using the resistance Rs to the source terminal of a common-source stage. [8] Fig6. An NMOS transistor with source degeneration is equivalent to a single transistor with a smaller transconductance and larger output impedance.[8] According to the equation mentioned above the limit of Gm with respect to Rs is is 1/Rs, meaning that larger source resistances will make the gain a weaker function of gm and more linear. The source degeneration is used as a feedback and by tuning it we can make the system more linearized. 2.2 Our ADS Simulatoin for Source Degeneration After defining the concepts of IIP3 now we will work on the simulation did through Advanced Designed Systems (ADS) software. We have designed a Low Noise Amplifier as shown in Fig.6 which is created by cascading two N-Type MOSFET Transistors. It is good to mention the MOSFET3 is used for biasing the supply.
  • 12. 12 | P a g e 7a)
  • 13. 13 | P a g e 7b) Fig7. a) is a screenshot of the settings we have defined for our cascade MOSFET design of LNA and b) shows the actual circuit.
  • 14. 14 | P a g e Note that we have not defined any source impedance in our design and have connected the our source in MOSFET1 to Ground. Our Third-order intercept point using the simulation in ADS would be according to Fig.9 which when tracing our two point it would be reaching at -3dB. Fig8. IIP3 simulation without using source degeneration Now if we use the same simulation we have used before and only add a 1.5nH inductor in our source Resistor we would be improving our third order intercept point for 5dB. Please note the reason we have used inductor instead of resistor is
  • 15. 15 | P a g e resistor would cause noise. Therefore inductor would be a better choice for our IIP3 optimization. You can see our ADS Design in Fig10. Fig 9) Adding 1.5 nH to source of our N Type Cascaded MOSFET1
  • 16. 16 | P a g e By adding an inductor and looking at our Third-order intercept point using the simulation in ADS seen in fig. 11we would see our IIP3 has improved from -3dB to 2dB which is a 5dB improvement. Fig 10. IIP3 simulation using source degeneration Conclusion In this article we started by an introduction to Linearity and Intermodulation and concentrated on what IIP3 is. Afterward we named different techniques on reducing the IIP3 and concentrated and introduced source degeneration, which we can make the system more linear using it and practically designed a N-Type MOSFET LNA in order to measure its IIP3 and and used source degeneration to see the improvement of IIP3 in our simulation using the discussed technique by 5dB.
  • 17. 17 | P a g e References [1] Behzad Razavi, RF Microelectronics, 2nd edition: Prentice Hall 2011. [2] “http://www.edn.com/design/test-and-measurement/4376465/The-IP3- specification-demystified” [3] “http://analog326.rssing.com/chan-13870196/all_p1.html” [4] “http://e2e.ti.com/cfs-file/__key/communityserver-blogs-components- weblogfiles/00-00-00-03-25/4466.Figure2.JPG” [5] “http://www.cliftonlaboratories.com/norton_amplifier.htm” [6] Behzad Razavi, Design of Analog CMOS Integrated Circuits: McGraw-Hill, 2001. [7] ”Wikipedia,http://en.wikipedia.org/wiki/Third_order_intercept_ point” [8] http://www.radio-electronics.com/info/rf-technology- design/receiver-overload/intercept-point-third-order.php” [9] Ali Sheikholeslami ‘Source Degeneration’ IEEE SOLID-STATE CIRCUITS MAGAZINE, Summer 2014