Your SlideShare is downloading. ×
0
Memory reference instruction
Memory reference instruction
Memory reference instruction
Memory reference instruction
Memory reference instruction
Memory reference instruction
Memory reference instruction
Upcoming SlideShare
Loading in...5
×

Thanks for flagging this SlideShare!

Oops! An error has occurred.

×
Saving this for later? Get the SlideShare app to save on your phone or tablet. Read anywhere, anytime – even offline.
Text the download link to your phone
Standard text messaging rates apply

Memory reference instruction

8,526

Published on

Sanjeev Patel 4x

Sanjeev Patel 4x

Published in: Education
0 Comments
3 Likes
Statistics
Notes
  • Be the first to comment

No Downloads
Views
Total Views
8,526
On Slideshare
0
From Embeds
0
Number of Embeds
0
Actions
Shares
0
Downloads
150
Comments
0
Likes
3
Embeds 0
No embeds

Report content
Flagged as inappropriate Flag as inappropriate
Flag as inappropriate

Select your reason for flagging this presentation as inappropriate.

Cancel
No notes for slide

Transcript

  • 1. MEMORY REFERNCE INSTRUCTIONS PRESENTED BY: SURBHI
  • 2. MEMORY REFERENCE INSTRUCTIONS <ul><li>The bits in IR 12 to 14 determines the memory reference instruction type if the bits were from 000 to 110. </li></ul><ul><li>Used here a 3 by 8 decoder is used to decode the 3 bits to 8 lines D0 to D7, although D7 not used here. </li></ul><ul><li>The effective address of the instruction is in AR and was placed there during timing signal T2 when I = 0, or during timing signal T3when I = 1. </li></ul><ul><li>Data from memory must be accessed to processor during T4. </li></ul>
  • 3. AND TO AC D 0 T 4 : DR  M[AR] D 0 T 5 : AC  AC DR, SC  0 ADD TO AC D 1 T 4 : DR  M[AR] D 1 T 5 : AC  AC+ DR, E  COUT, SC  0
  • 4. LDA : LOAD TO AC D 2 T 4 : DR  M[AR] D 2 T 5 : AC  DR, SC  0 STA : STORE AC D 3 T 4 : M[AR]  AC, SC  0
  • 5. BUN : BRANCH UNCONDITIONALLY D 4 T 4 : PC  AR, SC  0 BSA: BRANCH AND SAVE RETURN ADDRESS D 5 T 4 : M[AR]  PC, AR  AR+ 1 D 5 T 5 : PC  AR, SC  0
  • 6. 20 PC=21 AR=135 136 20 21 135 PC=136 (b) memory and pc after execution (a) Memory ,PC AND AR AT TIME T4 MEMORY MEMORY Example of BSA 0 BSA 135 Next instruction Subroutine 1 BUN 135 0 BSA 135 Next instruction Subroutine 1 BUN 135
  • 7. ISZ : INCREMENT AND SKIP IF ZERO <ul><li>D 6 T 4 : DR  M[AR] </li></ul><ul><li>D 6 T 5 : DR  DR+1 </li></ul><ul><li>D 6 T 6 : M[AR]  DR, if(DR=0) then (PC  PC + 1, SC  0 </li></ul>

×