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K. Nagavenkatesh et al Int. Journal of Engineering Research and Applications www.ijera.com
ISSN : 2248-9622, Vol. 4, Issue 5( Version 3), May 2014, pp.79-85
www.ijera.com 79|P a g e
Performance Analysis of BLDC MLI Drive
K.NagaVenkatesh1
, K.Dinesh2
, B.Harshad Chowdary3
, G.BalaVijayKumar4
1234
Dept. of EEE, KLUniversity, Vaddeswaram, Guntur. India
ABSTRACT
BLDC motors are used in wide range from very small motors used in hard disk drives to large motors used in
electric vehicles as it has more advantages over induction motors because it has permanent magnets in rotor
assembly generates steady magnetic field. The multilevel inverters are preferred over conventional inverters as
the voltage stress across each semiconductor switches is the voltage of one capacitor. The mli gives high
voltages with low harmonics and as no of levels increases output tends to sinusoidal. The most used multilevel
inverter configurations are diode clamped, flying capacitor, cascaded mli. In this paper five level diode clamped
mli, cascaded mli are simulated using MATLAB/SIMULINK. The performance characteristics of bldc motor is
observed when fed by each of these configurations.
Keywords: Brushless DC Motor, diode clamped, flying capacitor, cascaded, permanent magnets.
I. INTRODUCTION
Conventional DC motors have attractive
properties such as high efficiency and linear torque-
speed characteristics. The control of dc motors is also
simple and does not require complex hardware.
However, the main drawbacks of the DC motor is the
need of periodic maintenance. The brushes of the
mechanical commutator eventually wear out and
need to be replaced. The mechanical commutator has
other undesirable effects such as sparks, acoustic
noise and carbon particles coming from the brushes.
Brushless DC motor can in many cases replace
conventional DC motors. Despite the name, BLDC
motors are actually a type of permanent magnet
synchronous motors. They are driven by dc voltage
but current commutation is done by solid state
switches. The mechanical commutator is replaced by
electronic commutator. The commutation instants are
determined by rotor position and position of the rotor
is detected either by position sensors or by sensorless
techniques. BLDC motor have many advantages over
conventional dc motors:
 High dynamic response
 High efficiency
 Higher speed operation
 Higher speed range
 Higher torque-weight ratio
The PMSMs are classified on the basis of
the wave shape of their induced emf, i.e., sinusoidal
and trapezoidal. The sinusoidal type is known as
PMSM and the trapezoidal type are called PM dc
brushless machine.
II. SIMULATION OF DIODE
CLAMPED MLI
Fig. 1 shows a five-level diode-clamped
converter in which the dc bus consists of four
capacitors C1,C2,C3,C4. Fordc-bus voltage Vdc, the
voltage across each capacitor is,Vdc/4 and each
device voltage stress will be limited to one
capacitorvoltage level Vdc/4 through clamping
diodes. To synthesize staircase voltage, the neutral
point n is considered as the output phase voltage
reference point. There are five switch combinations
to synthesize five level voltages across a and n.
1) For voltage level Van= Vdc/2, turn on
all upper switches S1-S4
2) For voltage level Van= Vdc/4, turn on
three upper switches S2-S4 and one
lower switch S1‟.
3) For voltage level Van= 0, turn on two
upper switches S3,S4 and two lower
switch S1‟ and S2‟
4) For voltage level Van= -Vdc/4, turn on
one upper switches S4 and three lower
switch S1‟-S3‟.
5) For voltage level Van= -Vdc/2, turn on
all lower switches S1‟-S4‟.
Four complementary switch pairs exist in
each phase. The complementary switch pair is
defined such that turning on one ofthe switches will
exclude the other from being turned on. The four
complementary pairs are (S1,S1‟ ), (S2,S2‟ ),
(S3,S3‟), and (S4,S4‟ ).
RESEARCH ARTICLE OPEN ACCESS
K. Nagavenkatesh et al Int. Journal of Engineering Research and Applications www.ijera.com
ISSN : 2248-9622, Vol. 4, Issue 5( Version 3), May 2014, pp.79-85
www.ijera.com 80|P a g e
Fig.1 Diode Clamped Inverter Leg
Switching Technique: sinusoidal pulse width
modulation technique is used for generating firing
pulses where reference wave is compared with carrier
wave. In this technique sinusoidal is taken as
reference wave and triangular wave as carrier signal.
For n level diode clamped inverter n-1 carrier waves
are compared with reference signal.
Fig.2Comparision of reference and carrier wave
K. Nagavenkatesh et al Int. Journal of Engineering Research and Applications www.ijera.com
ISSN : 2248-9622, Vol. 4, Issue 5( Version 3), May 2014, pp.79-85
www.ijera.com 81|P a g e
Fig.3 Three phase diode clamped Inverter
III. SIMULATION OF CASCADED H-
BRIDGE MLI
Simulation of MLI is carried out by using
MATLAB. Cascaded MLI consists of series H
Bridges, each H-Bridge consists of series H- Bridges,
each Bridge consists of four switches as shown in
fig.4
Fig.4 Single cascaded bridge
The output generated by each H-Bridge is of
three different levels i.e, +Vdc, 0, -Vdc by
connecting dc source to the ac output side by
different combinations of the four switches,
S1,S2,S3,S4. Turning on S1, S4 gives +Vdc. Turning
on S2,S3 yields –Vdc. Turning off all switches gives
0V. In the same manner output at each level is
obtained. The switching sequence for a single bridge
is as follows, the firing pulse for upper switches
S1,S3 has phase delay of 1800
. The lower switches
are compliments firing pulse given through NOT
gate. The same holds good for any no of bridges
connected either in single phase or three phase. Here
three phase cascaded MLI is simulated. For N-level
output no of bridges required per phase is given by
N=2n+1.
Where n= no of bridges
For 5 level require 2 bridges per phase.
K. Nagavenkatesh et al Int. Journal of Engineering Research and Applications www.ijera.com
ISSN : 2248-9622, Vol. 4, Issue 5( Version 3), May 2014, pp.79-85
www.ijera.com 82|P a g e
Fig.5 Three phase 5 level Cascaded MLI
Controlling the conducting angles at
different inverter levels can minimise the harmonic
distortion of the output voltage. As the no of levels
increases the output voltage tends to sinusoidal.
A. Switching Technique
Switching is implemented by sinusoidal
pulse width modulation. In pulse width modulation
the firing pulses required for semiconductor switches
is obtained by comparing reference wave with carrier
wave. In sinusoidal pulse width modulation technique
sinusoidal wave is taken reference wave and
triangular wave as carrier wave. The output of
inverter i.e. amplitude and frequency can be varied
by changing the reference wave amplitude and
carrier wave frequency respectively. Amplitude
modulation index is ratio of reference wave
amplitude to carrier wave amplitude ma = Vr / Vc.
The frequency modulation is defined as ratio of
carrier wave frequency to reference wave frequency
mf = fc /fr. In this paper the amplitude modulation is
taken as ma = 1 and the frequency modulation mf
=21. The pulses are generated as below in figure
Fig6. Pwm comparator
Here the MLI is three phase the firing pulses
are given with phase delay of 1200
to each leg. The
switches in a single leg are connected as shown in
fig.7
Fig7. Single leg of three phase cacaded mli
The switch S1 and S2 has phase delay of
1800
. Switch S1 and S5 has phase delay of 900
.
Switches S3,S4 are compliment for switch S1, S2
respectively and similarly S7,S8 are compliment to
switch S5,S6. In the same the other two legs are
K. Nagavenkatesh et al Int. Journal of Engineering Research and Applications www.ijera.com
ISSN : 2248-9622, Vol. 4, Issue 5( Version 3), May 2014, pp.79-85
www.ijera.com 83|P a g e
connected and switching is done in the similar
fashion.
IV. MODELLING OF BLDC MOTOR
The modelling is carried based on
assumptions that
a) the induced currents in the rotor due to stator
harmonics are neglected.
b) Iron and stray losses are also neglected.
The stator voltage equations in terms of
electrical constants are
𝑉𝑎𝑠
𝑉𝑏𝑠
𝑉𝑐𝑠
=
𝑅𝑠 0 0
0 𝑅𝑠 0
0 0 𝑅𝑠
𝑖𝑎𝑠
𝑖𝑏𝑠
𝑖𝑐𝑠
+ p
𝐿𝑎 − 𝐿𝑚 0 0
0 𝐿𝑏 − 𝐿𝑚 0
0 0 𝐿𝑐 − 𝐿𝑚
𝑖𝑎
𝑖𝑏
𝑖𝑐
+
𝑒𝑎𝑠
𝑒𝑏𝑠
𝑒𝑐𝑠
Where Rs - Rotor resistance
La, Lb, Lc – Self inductance of each phase windings
Lm – Mutual inductance
ias, ibs, ics – Currents in stator windings
eas, ebs, ecs – induced back emf‟s.
The electromagnetic induced emfs is given as
eas= fas(Θ)λpwm
ebs = fbs(Θ)λpwm
ecs = fcs(Θ)λpwm
where f(Θ) indicates that induced emf is dependent
on rotor position
The electromagnetic torque is given by
Te= [ easias +ebsibs + ecsics] 1/wm(N-m)
Speed of motor is obtained as
wm= ∫((Te -Tl- Bwm)/ J)
Where wm – rotor speed in mechanical rad/s
B – friction coefficient
J – Inertia of motor shaft
V. SIMULATION RESULTS
Fig8. Firing pulses for five level diode clamped inverter
Fig9. Three phase voltages of diode clamped inverter
K. Nagavenkatesh et al Int. Journal of Engineering Research and Applications www.ijera.com
ISSN : 2248-9622, Vol. 4, Issue 5( Version 3), May 2014, pp.79-85
www.ijera.com 84|P a g e
Fig10. Firing pulses for five level cascaded mli
Fig11. Three phase voltage waveforms of cascaded mli
Fig12. Stator currents
Fig13. Trapezoidal Back Emf
Fig14.Speed, Rotor position, Electromagnetic torque
K. Nagavenkatesh et al Int. Journal of Engineering Research and Applications www.ijera.com
ISSN : 2248-9622, Vol. 4, Issue 5( Version 3), May 2014, pp.79-85
www.ijera.com 85|P a g e
Fig15. Trapezoidal Back Emf
Fig16. Stator Currents
Fig17. Speed, Rotor position, Electromagnetic torque
REFERENCES
[1] R. Krishnan, “Electric Motor Drives
Modelling, Analysis and Control”, Prentice
Hall, 2001.
[2] M.Rashid “Power electronics Handbook”,
Academic Press.
[3] John Wiley & Sons, Parker, R.J., “Advances
in Permanent Magnetism”, 1990.
[4] NedMohan, Undeland, Riobbins “Power
electronic converter, applications and
design” ,Wiley Student Edition.
[5] R. Krishnan, “Permanent Magnet
Synchronous and Brushless DC Motor
Drives”, CRC Press, 2010.
[6] „Multilevel Inverters: A Survey of
Topologies,Controls,andApplications‟José
Rodríguez, Jih-Sheng Lai, Fang
ZhengPeng,IEEE TRANSACTIONS ON
INDUSTRIAL ELECTRONICS, VOL. 49,
NO. 4, AUGUST 2002
[7] “Multilevel Inverter Topology Survey” M.S
Thesis Andreas Nordvall
[8] “Fundamentals of a New Diode Clamping
MultilevelInverter”XiaomingYuan,IvoBarbi,
IEEE TRANSACTIONS ON POWER
ELECTRONICS, VOL. 15, NO. 4, JULY
2000

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  • 1. K. Nagavenkatesh et al Int. Journal of Engineering Research and Applications www.ijera.com ISSN : 2248-9622, Vol. 4, Issue 5( Version 3), May 2014, pp.79-85 www.ijera.com 79|P a g e Performance Analysis of BLDC MLI Drive K.NagaVenkatesh1 , K.Dinesh2 , B.Harshad Chowdary3 , G.BalaVijayKumar4 1234 Dept. of EEE, KLUniversity, Vaddeswaram, Guntur. India ABSTRACT BLDC motors are used in wide range from very small motors used in hard disk drives to large motors used in electric vehicles as it has more advantages over induction motors because it has permanent magnets in rotor assembly generates steady magnetic field. The multilevel inverters are preferred over conventional inverters as the voltage stress across each semiconductor switches is the voltage of one capacitor. The mli gives high voltages with low harmonics and as no of levels increases output tends to sinusoidal. The most used multilevel inverter configurations are diode clamped, flying capacitor, cascaded mli. In this paper five level diode clamped mli, cascaded mli are simulated using MATLAB/SIMULINK. The performance characteristics of bldc motor is observed when fed by each of these configurations. Keywords: Brushless DC Motor, diode clamped, flying capacitor, cascaded, permanent magnets. I. INTRODUCTION Conventional DC motors have attractive properties such as high efficiency and linear torque- speed characteristics. The control of dc motors is also simple and does not require complex hardware. However, the main drawbacks of the DC motor is the need of periodic maintenance. The brushes of the mechanical commutator eventually wear out and need to be replaced. The mechanical commutator has other undesirable effects such as sparks, acoustic noise and carbon particles coming from the brushes. Brushless DC motor can in many cases replace conventional DC motors. Despite the name, BLDC motors are actually a type of permanent magnet synchronous motors. They are driven by dc voltage but current commutation is done by solid state switches. The mechanical commutator is replaced by electronic commutator. The commutation instants are determined by rotor position and position of the rotor is detected either by position sensors or by sensorless techniques. BLDC motor have many advantages over conventional dc motors:  High dynamic response  High efficiency  Higher speed operation  Higher speed range  Higher torque-weight ratio The PMSMs are classified on the basis of the wave shape of their induced emf, i.e., sinusoidal and trapezoidal. The sinusoidal type is known as PMSM and the trapezoidal type are called PM dc brushless machine. II. SIMULATION OF DIODE CLAMPED MLI Fig. 1 shows a five-level diode-clamped converter in which the dc bus consists of four capacitors C1,C2,C3,C4. Fordc-bus voltage Vdc, the voltage across each capacitor is,Vdc/4 and each device voltage stress will be limited to one capacitorvoltage level Vdc/4 through clamping diodes. To synthesize staircase voltage, the neutral point n is considered as the output phase voltage reference point. There are five switch combinations to synthesize five level voltages across a and n. 1) For voltage level Van= Vdc/2, turn on all upper switches S1-S4 2) For voltage level Van= Vdc/4, turn on three upper switches S2-S4 and one lower switch S1‟. 3) For voltage level Van= 0, turn on two upper switches S3,S4 and two lower switch S1‟ and S2‟ 4) For voltage level Van= -Vdc/4, turn on one upper switches S4 and three lower switch S1‟-S3‟. 5) For voltage level Van= -Vdc/2, turn on all lower switches S1‟-S4‟. Four complementary switch pairs exist in each phase. The complementary switch pair is defined such that turning on one ofthe switches will exclude the other from being turned on. The four complementary pairs are (S1,S1‟ ), (S2,S2‟ ), (S3,S3‟), and (S4,S4‟ ). RESEARCH ARTICLE OPEN ACCESS
  • 2. K. Nagavenkatesh et al Int. Journal of Engineering Research and Applications www.ijera.com ISSN : 2248-9622, Vol. 4, Issue 5( Version 3), May 2014, pp.79-85 www.ijera.com 80|P a g e Fig.1 Diode Clamped Inverter Leg Switching Technique: sinusoidal pulse width modulation technique is used for generating firing pulses where reference wave is compared with carrier wave. In this technique sinusoidal is taken as reference wave and triangular wave as carrier signal. For n level diode clamped inverter n-1 carrier waves are compared with reference signal. Fig.2Comparision of reference and carrier wave
  • 3. K. Nagavenkatesh et al Int. Journal of Engineering Research and Applications www.ijera.com ISSN : 2248-9622, Vol. 4, Issue 5( Version 3), May 2014, pp.79-85 www.ijera.com 81|P a g e Fig.3 Three phase diode clamped Inverter III. SIMULATION OF CASCADED H- BRIDGE MLI Simulation of MLI is carried out by using MATLAB. Cascaded MLI consists of series H Bridges, each H-Bridge consists of series H- Bridges, each Bridge consists of four switches as shown in fig.4 Fig.4 Single cascaded bridge The output generated by each H-Bridge is of three different levels i.e, +Vdc, 0, -Vdc by connecting dc source to the ac output side by different combinations of the four switches, S1,S2,S3,S4. Turning on S1, S4 gives +Vdc. Turning on S2,S3 yields –Vdc. Turning off all switches gives 0V. In the same manner output at each level is obtained. The switching sequence for a single bridge is as follows, the firing pulse for upper switches S1,S3 has phase delay of 1800 . The lower switches are compliments firing pulse given through NOT gate. The same holds good for any no of bridges connected either in single phase or three phase. Here three phase cascaded MLI is simulated. For N-level output no of bridges required per phase is given by N=2n+1. Where n= no of bridges For 5 level require 2 bridges per phase.
  • 4. K. Nagavenkatesh et al Int. Journal of Engineering Research and Applications www.ijera.com ISSN : 2248-9622, Vol. 4, Issue 5( Version 3), May 2014, pp.79-85 www.ijera.com 82|P a g e Fig.5 Three phase 5 level Cascaded MLI Controlling the conducting angles at different inverter levels can minimise the harmonic distortion of the output voltage. As the no of levels increases the output voltage tends to sinusoidal. A. Switching Technique Switching is implemented by sinusoidal pulse width modulation. In pulse width modulation the firing pulses required for semiconductor switches is obtained by comparing reference wave with carrier wave. In sinusoidal pulse width modulation technique sinusoidal wave is taken reference wave and triangular wave as carrier wave. The output of inverter i.e. amplitude and frequency can be varied by changing the reference wave amplitude and carrier wave frequency respectively. Amplitude modulation index is ratio of reference wave amplitude to carrier wave amplitude ma = Vr / Vc. The frequency modulation is defined as ratio of carrier wave frequency to reference wave frequency mf = fc /fr. In this paper the amplitude modulation is taken as ma = 1 and the frequency modulation mf =21. The pulses are generated as below in figure Fig6. Pwm comparator Here the MLI is three phase the firing pulses are given with phase delay of 1200 to each leg. The switches in a single leg are connected as shown in fig.7 Fig7. Single leg of three phase cacaded mli The switch S1 and S2 has phase delay of 1800 . Switch S1 and S5 has phase delay of 900 . Switches S3,S4 are compliment for switch S1, S2 respectively and similarly S7,S8 are compliment to switch S5,S6. In the same the other two legs are
  • 5. K. Nagavenkatesh et al Int. Journal of Engineering Research and Applications www.ijera.com ISSN : 2248-9622, Vol. 4, Issue 5( Version 3), May 2014, pp.79-85 www.ijera.com 83|P a g e connected and switching is done in the similar fashion. IV. MODELLING OF BLDC MOTOR The modelling is carried based on assumptions that a) the induced currents in the rotor due to stator harmonics are neglected. b) Iron and stray losses are also neglected. The stator voltage equations in terms of electrical constants are 𝑉𝑎𝑠 𝑉𝑏𝑠 𝑉𝑐𝑠 = 𝑅𝑠 0 0 0 𝑅𝑠 0 0 0 𝑅𝑠 𝑖𝑎𝑠 𝑖𝑏𝑠 𝑖𝑐𝑠 + p 𝐿𝑎 − 𝐿𝑚 0 0 0 𝐿𝑏 − 𝐿𝑚 0 0 0 𝐿𝑐 − 𝐿𝑚 𝑖𝑎 𝑖𝑏 𝑖𝑐 + 𝑒𝑎𝑠 𝑒𝑏𝑠 𝑒𝑐𝑠 Where Rs - Rotor resistance La, Lb, Lc – Self inductance of each phase windings Lm – Mutual inductance ias, ibs, ics – Currents in stator windings eas, ebs, ecs – induced back emf‟s. The electromagnetic induced emfs is given as eas= fas(Θ)λpwm ebs = fbs(Θ)λpwm ecs = fcs(Θ)λpwm where f(Θ) indicates that induced emf is dependent on rotor position The electromagnetic torque is given by Te= [ easias +ebsibs + ecsics] 1/wm(N-m) Speed of motor is obtained as wm= ∫((Te -Tl- Bwm)/ J) Where wm – rotor speed in mechanical rad/s B – friction coefficient J – Inertia of motor shaft V. SIMULATION RESULTS Fig8. Firing pulses for five level diode clamped inverter Fig9. Three phase voltages of diode clamped inverter
  • 6. K. Nagavenkatesh et al Int. Journal of Engineering Research and Applications www.ijera.com ISSN : 2248-9622, Vol. 4, Issue 5( Version 3), May 2014, pp.79-85 www.ijera.com 84|P a g e Fig10. Firing pulses for five level cascaded mli Fig11. Three phase voltage waveforms of cascaded mli Fig12. Stator currents Fig13. Trapezoidal Back Emf Fig14.Speed, Rotor position, Electromagnetic torque
  • 7. K. Nagavenkatesh et al Int. Journal of Engineering Research and Applications www.ijera.com ISSN : 2248-9622, Vol. 4, Issue 5( Version 3), May 2014, pp.79-85 www.ijera.com 85|P a g e Fig15. Trapezoidal Back Emf Fig16. Stator Currents Fig17. Speed, Rotor position, Electromagnetic torque REFERENCES [1] R. Krishnan, “Electric Motor Drives Modelling, Analysis and Control”, Prentice Hall, 2001. [2] M.Rashid “Power electronics Handbook”, Academic Press. [3] John Wiley & Sons, Parker, R.J., “Advances in Permanent Magnetism”, 1990. [4] NedMohan, Undeland, Riobbins “Power electronic converter, applications and design” ,Wiley Student Edition. [5] R. Krishnan, “Permanent Magnet Synchronous and Brushless DC Motor Drives”, CRC Press, 2010. [6] „Multilevel Inverters: A Survey of Topologies,Controls,andApplications‟José Rodríguez, Jih-Sheng Lai, Fang ZhengPeng,IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 49, NO. 4, AUGUST 2002 [7] “Multilevel Inverter Topology Survey” M.S Thesis Andreas Nordvall [8] “Fundamentals of a New Diode Clamping MultilevelInverter”XiaomingYuan,IvoBarbi, IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 15, NO. 4, JULY 2000