PIC_ARM_AVR

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Advance Micro controllers, PIC, ARM, AVR

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PIC_ARM_AVR

  1. 1. Relevance of MicrocontrollersRelevance of MicrocontrollersRelevance of MicrocontrollersRelevance of MicrocontrollersRelevance of MicrocontrollersRelevance of MicrocontrollersRelevance of MicrocontrollersRelevance of Microcontrollers AA whitewhite paperpaper byby SunSun MicrosystemsMicrosystems claimsclaims thatthat byby thethe endend ofof thethe decade,decade, anan averageaverage homehome willwill containcontain betweenbetween 5050 toto 100100 microcontrollersmicrocontrollers controllingcontrolling digitaldigital phones,phones, microwavemicrowave ovens,ovens, VCRs,VCRs, televisionstelevisions setssets andand televisiontelevision remotes,remotes, dishwashers,dishwashers, homehome securitysecurity systems,systems, PDAsPDAs etcetc AnAn averageaverage carcar hashas aboutabout 1515 processorsprocessors;; thethe 19991999 MercedesMercedes SS--classclass carcar hashas 6363 microprocessorsmicroprocessors,, whilewhile thethe 19991999 BMWBMW hashas 6565 processorsprocessors !! ExceptExcept perhapsperhaps thethe humanhuman body,body, microprocessorsmicroprocessors andand microcontrollersmicrocontrollers havehave gottengotten intointo everythingeverything aroundaround usus.. 16-05-2013 Mahesh J. vadhavaniya 1
  2. 2. Objectives…Objectives…Objectives…Objectives…Objectives…Objectives…Objectives…Objectives… PICPIC MicrocontrollerMicrocontroller DevelopmentDevelopment ArchitectureArchitecture PICPIC1818 ArchitectureArchitecture IntroductionIntroduction PICPIC1818 ArchitectureArchitecture FeaturesFeatures && PeripheralsPeripherals RCTRCT (Reverse(Reverse ConductingConducting Thyristor)Thyristor).. ARMARM MicrocontrollerMicrocontroller IntroductionIntroduction toto ARMARM LtdLtd ProgrammersProgrammers ModelModel 16-05-2013 Mahesh J. vadhavaniya 2
  3. 3. TheThe microcontrollersmicrocontrollers playedplayed revolutionaryrevolutionary rolerole inin embeddedembedded industryindustry afterafter thethe inventioninvention ofof IntelIntel 80518051.. IntroductionIntroductionIntroductionIntroductionIntroductionIntroductionIntroductionIntroduction TheThe steadysteady andand progressiveprogressive researchresearch inin thisthis fieldfield gavegave thethe industryindustry moremore efficient,efficient, highhigh--performanceperformance andand lowlow--powerpower consumptionconsumption microcontrollersmicrocontrollers..consumptionconsumption microcontrollersmicrocontrollers.. TheThe AVR,AVR, PICPIC andand ARMARM areare thethe primeprime examplesexamples.. TheThe newnew ageage microcontrollersmicrocontrollers areare gettinggetting smartersmarter andand richerricher byby includingincluding latestlatest communicationcommunication protocolsprotocols likelike USB,USB, II22C,C, SPI,SPI, Ethernet,Ethernet, CANCAN etcetc.. 16-05-2013 Mahesh J. vadhavaniya 3
  4. 4. HowHow ManyMany MicrocontrollersMicrocontrollers !!!!!! ?????? IntroductionIntroductionIntroductionIntroductionIntroductionIntroductionIntroductionIntroduction 16-05-2013 Mahesh J. vadhavaniya 4
  5. 5. WhoWho areare ?????? •Atmel •ARM •Intel •8-bit •8XC42 •MCS48 •MCS51 •8xC251 •16-bit •NEC •Motorola •8-bit •68HC05 •68HC08 •68HC11 •16-bit •68HC12 •16-bit •MCS96 •MXS296 •National Semiconductor •COP8 •Microchip •12-bit instruction PIC •14-bit instruction PIC •PIC16F84 •16-bit instruction PIC •68HC12 •68HC16 •32-bit •683xx •Texas Instruments •TMS370 •MSP430 •Zilog •Z8 •Z86E02 16-05-2013 Mahesh J. vadhavaniya 5
  6. 6. PIC ChipPIC Chip 16-05-2013 Mahesh J. vadhavaniya 6
  7. 7. TheThe PICPIC microcontrollermicrocontroller waswas developeddeveloped byby GeneralGeneral InstrumentsInstruments inin 19751975.. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers HistoryHistory TheThe PICPIC waswas developeddeveloped whenwhen MicroelectronicsMicroelectronics DivisionDivision ofof GeneralGeneral InstrumentsInstruments waswas testingtesting itsits 1616--bitbit CPUCPU CPCP16001600.. AlthoughAlthough thethe CPCP16001600 waswas aa goodgood CPUCPU butbut itit hadhad lowlow I/OI/O performanceperformance.. TheThe PICPIC controllercontroller waswas usedused toto offloadoffload thethe I/OI/O thethe taskstasks fromfrom CPUCPU toto improveimprove thethe overalloverall performanceperformance ofof thethe systemsystem.. InIn 19851985,, GeneralGeneral InstrumentsInstruments convertedconverted theirtheir MicroelectronicsMicroelectronics DivisionDivision toto MicrochipMicrochip TechnologyTechnology.. 16-05-2013 Mahesh J. vadhavaniya 7
  8. 8. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers PICPIC standsstands forfor PeripheralPeripheral InterfaceInterface ControllerController.. TheThe GeneralGeneral InstrumentsInstruments usedused thethe acronymsacronyms ProgrammableProgrammable InterfaceInterface ControllerController andand ProgrammableProgrammable IntelligentIntelligent ComputerComputer forfor thethe initialinitial PICsPICs (PIC(PIC16401640 andand PICPIC16501650)).. InIn 19931993,, MicrochipMicrochip TechnologyTechnology launchedlaunched thethe 88--bitbit PICPIC1616CC8484 withwith EEPROMEEPROM whichwhich couldcould bebe programmedprogrammed usingusing serialserial programmingprogramming methodmethod.. PICPIC16501650)).. TheThe improvedimproved versionversion ofof PICPIC1616CC8484 withwith flashflash memorymemory (PIC(PIC1818FF8484 andand PICPIC1818FF8484A)A) hithit thethe marketmarket inin 19981998.. 16-05-2013 Mahesh J. vadhavaniya 8
  9. 9. SinceSince 19981998,, MicrochipMicrochip TechnologyTechnology continuouslycontinuously developeddeveloped newnew highhigh performanceperformance microcontrollersmicrocontrollers withwith newnew complexcomplex architecturearchitecture andand enhancedenhanced inin--builtbuilt peripheralsperipherals.. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers DevelopmentDevelopment PICPIC microcontrollermicrocontroller isis basedbased onon HarvardHarvard architecturearchitecture.. ItIt isis alsoalso veryvery famousfamous amongamong hobbyistshobbyists duedue toto moderatemoderate costcost andand easyeasy availabilityavailability ofof itsits supportingsupporting softwaresoftware andand hardwarehardware toolstools likelike compilers,compilers, simulators,simulators, debuggersdebuggers etcetc.. AtAt presentpresent PICPIC microcontrollersmicrocontrollers areare widelywidely usedused forfor industrialindustrial purposepurpose duedue toto itsits highhigh performanceperformance abilityability atat lowlow powerpower consumptionconsumption.. 16-05-2013 Mahesh J. vadhavaniya 9
  10. 10. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers DevelopmentDevelopment TheThe 88--bitbit PICPIC microcontrollermicrocontroller isis divideddivided intointo followingfollowing fourfour categoriescategories onon thethe basisbasis ofof internalinternal architecturearchitecture:: 11.. BaseBase LineLine PICPIC 22.. MidMid--RangeRange PICPIC 33.. EnhancedEnhanced MidMid--RangeRange PICPIC33.. EnhancedEnhanced MidMid--RangeRange PICPIC 44.. PICPIC1818 BaseBase LineLine PICsPICs areare thethe leastleast complexcomplex PICPIC microcontrollersmicrocontrollers.. 11.. BaseBase LineLine PICPIC TheseThese microcontrollersmicrocontrollers workwork onon 1212--bitbit instructioninstruction architecturearchitecture whichwhich meansmeans thatthat thethe wordword sizesize ofof instructioninstruction setssets areare ofof 1212 bitsbits forfor thesethese controllerscontrollers.. 16-05-2013 Mahesh J. vadhavaniya 10
  11. 11. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers DevelopmentDevelopment TheseThese areare smallestsmallest andand cheapestcheapest PICs,PICs, availableavailable withwith 66 toto 4040 pinpin packagingpackaging.. 11.. BaseBase LineLine PICPIC……cntdcntd TheThe smallsmall sizesize andand lowlow costcost ofof BaseBase LineLine PICPIC replacedreplaced thetheTheThe smallsmall sizesize andand lowlow costcost ofof BaseBase LineLine PICPIC replacedreplaced thethe traditionaltraditional ICsICs likelike 555555,, logiclogic gatesgates etcetc.. inin industriesindustries.. MidMid--RangeRange PICsPICs areare basedbased onon 1414--bitbit instructioninstruction architecturearchitecture andand areare ableable toto workwork upup toto 2020 MHzMHz speedspeed.. 22.. MidMid -- RangeRange PICPIC TheseThese controllerscontrollers areare availableavailable withwith 88 toto 6464 pinpin packagingpackaging.. 16-05-2013 Mahesh J. vadhavaniya 11
  12. 12. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers DevelopmentDevelopment 22.. MidMid -- RangeRange PICPIC…… cntdcntd TheseThese microcontrollersmicrocontrollers areare availableavailable withwith differentdifferent peripheralsperipherals likelike ADC,ADC, PWM,PWM, OpOp--AmpsAmps andand differentdifferent communicationcommunication protocolsprotocols likelike USART,USART, SPI,SPI, II22CC (TWI),(TWI), etcetc.. whichwhich makemake themthem widelywidely usableusable microcontrollersmicrocontrollers notnot onlyonly forfor industryindustry butbut forfor hobbyistshobbyists asas wellwell.. 33.. EnhancedEnhanced MidMid -- RangeRange PICPIC TheseThese controllerscontrollers areare enhancedenhanced versionversion ofof MidMid--RangeRange corecore.. ThisThis rangerange ofof controllerscontrollers providesprovides additionaladditional performance,performance, greatergreater flashflash memorymemory andand highhigh speedspeed atat veryvery lowlow powerpower consumptionconsumption.. ThisThis rangerange ofof PICPIC alsoalso includesincludes multiplemultiple peripheralsperipherals andand supportssupports protocolsprotocols likelike USART,USART, SPI,SPI, II22CC andand soso onon.. 16-05-2013 Mahesh J. vadhavaniya 12
  13. 13. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers DevelopmentDevelopment 44.. PICPIC 1818 PICPIC1818 rangerange isis basedbased onon 1616--bitbit instructioninstruction architecturearchitecture incorporatingincorporating advancedadvanced RISCRISC architecturearchitecture whichwhich makesmakes itit highesthighest performerperformer amongamong thethe allall 88--bitbit PICPIC familiesfamilies.. TheThe PICPIC1818 rangerange isis integratedintegrated withwith newnew ageage communicationcommunication protocolsprotocols likelike USB,USB, CAN,CAN, LIN,LIN, EthernetEthernet (TCP/IP(TCP/IP protocol)protocol) toto communicatecommunicate withwith locallocal and/orand/or internetinternet basedbased networksnetworks.. ThisThis rangerange alsoalso supportssupports thethe connectivityconnectivity ofof HumanHuman InterfaceInterface DevicesDevices likelike touchtouch panelspanels etcetc.. 16-05-2013 Mahesh J. vadhavaniya 13
  14. 14. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers Base Line Mid-Range Enhanced Mid- Range PIC18 No. of Pins 6-40 8-64 8-64 18-100 Program Memory Up to 3 KB Up to 14 KB Up to 28 KB Up to 128 KB Data Memory Up to 134 Bytes Up to 368 Bytes Up to 1.5 KB Up to 4 KB Instruction Length 12-bit 14-bit 14-bit 16-bit No. of instruction set 33 35 49 83 instruction set Speed 5 MIPS* 5 MIPS 8 MIPS Up to 16 MIPS Feature • Comparator • 8-bit ADC • Data Memory •Internal Oscillator In addition of baseline · SPI · I2C · UART · PWM · 10-bit ADC · OP-Amps In addition of Mid- range · High Performance · Multiple communication peripherals In addition of Enhanced Mid- range • CAN • LIN • USB • Ethernet • 12-bit ADC Families PIC10,PIC12, PIC16 PIC12, PIC16 PIC12F1XXX, PIC16F1XXX PIC18 *MIPS stand for Millions of Instructions per Second 16-05-2013 Mahesh J. vadhavaniya 14
  15. 15. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers 16-05-2013 Mahesh J. vadhavaniya 15
  16. 16. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers DevelopmentDevelopment BesidesBesides 88--bitbit microcontrollers,microcontrollers, MicrochipMicrochip alsoalso manufacturesmanufactures 1616--bitbit andand 3232--bitbit microcontrollersmicrocontrollers.. RecentlyRecently MicrochipMicrochip developeddeveloped XLPXLP (Extreme(Extreme LowLow Power)Power) seriesseries microcontrollersmicrocontrollers whichwhich areare basedbased onon NanoWattNanoWatt technologytechnology.. TheseThese controllerscontrollers drawdraw currentcurrent inin orderorder ofof nanoamperesnanoamperes((nAnA)).. TheThe PICPIC microcontrollersmicrocontrollers areare availableavailable withwith differentdifferent memorymemory optionsoptions whichwhich areare maskmask ROM,ROM, EPROMEPROM andand flashflash memorymemory.. MemoryMemory variationsvariations TheyThey areare denoteddenoted withwith differentdifferent symbolssymbols asas givengiven inin thethe followingfollowing tabletable:: 16-05-2013 Mahesh J. vadhavaniya 16
  17. 17. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers DevelopmentDevelopment MemoryMemory variationsvariations Symbol Memory Type Example C EPROM PIC16Cxxx CR Mask ROM PIC16CRxxx F Flash memory PIC16FxxxF Flash memory PIC16Fxxx PICPIC microcontrollersmicrocontrollers areare alsoalso availableavailable withwith extendedextended voltagevoltage rangesranges whichwhich reducereduce thethe frequencyfrequency rangerange.. TheThe operatingoperating voltagevoltage rangerange ofof thesethese PICsPICs isis 22..00--66..00 voltsvolts.. TheThe letterletter ‘L’‘L’ isis includedincluded inin controller’scontroller’s namename toto denotedenote extendedextended voltagevoltage rangerange controllerscontrollers.. ForFor example,example, PICPIC1616LFxxxLFxxx (Operating(Operating voltagevoltage 22..00--66..00 volts)volts).. 16-05-2013 Mahesh J. vadhavaniya 17
  18. 18. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers ArchitectureArchitecture PICPIC microcontrollersmicrocontrollers areare basedbased onon advancedadvanced RISCRISC architecturearchitecture.. RISCRISC standsstands forfor ReducedReduced InstructionInstruction SetSet ComputingComputing.. InIn thisthis architecture,architecture, thethe instructioninstruction setset ofof hardwarehardware getsgets reducedreduced whichwhich increasesincreases thethe executionexecution raterate (speed)(speed) ofof systemsystem..reducedreduced whichwhich increasesincreases thethe executionexecution raterate (speed)(speed) ofof systemsystem.. PICPIC microcontrollersmicrocontrollers followfollow HarvardHarvard architecturearchitecture forfor internalinternal datadata transfertransfer.. InIn HarvardHarvard architecturearchitecture therethere areare twotwo separateseparate memoriesmemories forfor programprogram andand datadata.. TheseThese twotwo memoriesmemories areare accessedaccessed throughthrough differentdifferent busesbuses forfor datadata communicationcommunication betweenbetween memoriesmemories andand CPUCPU corecore.. 16-05-2013 Mahesh J. vadhavaniya 18
  19. 19. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers ArchitectureArchitecture ThisThis architecturearchitecture improvesimproves thethe speedspeed ofof systemsystem overover VonVon NeumannNeumann architecturearchitecture inin whichwhich programprogram andand datadata areare fetchedfetched fromfrom thethe samesame memorymemory usingusing thethe samesame busbus.. PICPIC1818 seriesseries controllerscontrollers areare basedbased onon 1616--bitbit instructioninstruction setset.. TheThe questionquestion maymay arisearise thatthat ifif PICPIC1818 areare calledcalled 88--bitbit microcontrollers,microcontrollers, thenthen whatwhat aboutabout themthem beingbeing basedbased onon 1616--bitbit instructionsinstructions setset.. ‘PIC‘PIC1818 isis anan 88--bitbit microcontroller’microcontroller’ thisthis statementstatement meansmeans thatthat thethe CPUCPU corecore cancan receive/transmitreceive/transmit oror processprocess aa maximummaximum ofof 88--bitbit datadata atat aa timetime.. 16-05-2013 Mahesh J. vadhavaniya 19
  20. 20. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers ArchitectureArchitecture OnOn thethe otherother handhand thethe statementstatement ‘PIC‘PIC1818 microcontrollersmicrocontrollers areare basedbased onon 1616--bitbit instructioninstruction set’set’ meansmeans thatthat thethe assemblyassembly instructioninstruction setssets areare ofof 1616--bitbit.. TheThe datadata memorymemory isis interfacedinterfaced withwith 88--bitbit busbus andand programprogram memorymemory isis interfacedinterfaced withwith 1616--bitbit busbus asas depicteddepicted inin thethememorymemory isis interfacedinterfaced withwith 1616--bitbit busbus asas depicteddepicted inin thethe followingfollowing figurefigure.. 16-05-2013 Mahesh J. vadhavaniya 20
  21. 21. VonVon NeumannNeumann ArchitectureArchitecture:: •• FetchesFetches instructionsinstructions andand datadata fromfrom aa singlesingle memorymemory spacespace •• LimitsLimits operatingoperating bandwidthbandwidth PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers ArchitectureArchitecture HarvardHarvard ArchitectureArchitecture:: •• UsesUses twotwo separateseparate memorymemory spacesspaces forfor programprogram instructionsinstructions andand datadata •• ImprovedImproved operatingoperating bandwidthbandwidth •• AllowsAllows forfor differentdifferent busbus widthswidths 16-05-2013 Mahesh J. vadhavaniya 21
  22. 22. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers PICPIC1818 HarvardHarvard ArchitectureArchitecture PICPIC microcontrollermicrocontroller containscontains anan 88--bitbit ALUALU (Arithmetic(Arithmetic LogicLogic Unit)Unit) andand anan 88--bitbit WorkingWorking RegisterRegister (Accumulator)(Accumulator).. ThereThere areare differentdifferent GPRsGPRs (General(General PurposePurpose Registers)Registers) andand SFRsSFRs (Special(Special FunctionFunction Registers)Registers) inin aa PICPIC microcontrollermicrocontroller.. TheThe overalloverall systemsystem performsperforms 88--bitbit arithmeticarithmetic andand logiclogic functionsfunctions.. TheseThese functionsfunctions usuallyusually needneed oneone oror twotwo operandsoperands.. OneOne ofof thethe operandsoperands isis storedstored inin WREGWREG (Accumulator)(Accumulator) andand thethe otherother oneone isis storedstored inin GPR/SFRGPR/SFR.. TheThe twotwo datadata isis processedprocessed byby ALUALU andand storedstored inin WREGWREG oror otherother registersregisters 16-05-2013 Mahesh J. vadhavaniya 22
  23. 23. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers PICPIC1818 HarvardHarvard ArchitectureArchitecture 16-05-2013 Mahesh J. vadhavaniya 23
  24. 24. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers PICPIC1818 HarvardHarvard ArchitectureArchitecture TheThe processprocess occursoccurs inin aa singlesingle machinemachine cyclecycle.. InIn PICPIC microcontroller,microcontroller, aa singlesingle machinemachine cyclecycle consistsconsists ofof 44 oscillationoscillation periodsperiods.. ThusThus anan instructioninstruction needsneeds 44 clockclock periodsperiods toto bebe executedexecuted.. ThisThis makesmakes itit fasterfaster thanthan otherother 80518051 microcontrollersmicrocontrollers.. ThisThis makesmakes itit fasterfaster thanthan otherother 80518051 microcontrollersmicrocontrollers.. PipeliningPipelining EarlyEarly processorsprocessors andand controllerscontrollers couldcould fetchfetch oror executeexecute aa singlesingle instructioninstruction inin aa unitunit ofof timetime.. TheThe PICPIC microcontrollersmicrocontrollers areare ableable toto fetchfetch andand executeexecute thethe instructionsinstructions inin thethe samesame unitunit ofof timetime thusthus increasingincreasing theirtheir instructioninstruction throughputthroughput.. 16-05-2013 Mahesh J. vadhavaniya 24
  25. 25. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers PICPIC1818 HarvardHarvard ArchitectureArchitecture PipeliningPipelining ThisThis techniquetechnique isis knownknown asas instructioninstruction pipeliningpipelining wherewhere thethe processingprocessing ofof instructionsinstructions isis splitsplit intointo aa numbernumber ofof independentindependent stepssteps.. 16-05-2013 Mahesh J. vadhavaniya 25
  26. 26. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers FeaturesFeatures CC CompilerCompiler OptimizedOptimized ArchitectureArchitecture withwith OptionalOptional ExtendedExtended InstructionInstruction SetSet 100100,,000000 Erase/WriteErase/Write CycleCycle EnhancedEnhanced FlashFlash ProgramProgram MemoryMemory TypicalTypical 11,,000000,,000000 Erase/WriteErase/Write CycleCycle DataData EEPROMEEPROM MemoryMemory11,,000000,,000000 Erase/WriteErase/Write CycleCycle DataData EEPROMEEPROM MemoryMemory TypicalTypical FlexibleFlexible oscillatoroscillator optionoption FourFour CrystalCrystal modes,modes, includingincluding HighHigh--PrecisionPrecision PLLPLL forfor USBUSB TwoTwo ExternalExternal ClockClock modes,modes, UpUp toto 4848 MHzMHz InternalInternal OscillatorOscillator:: 88 useruser--selectableselectable frequencies,frequencies, fromfrom 3131 kHzkHz toto 88 MHzMHz DualDual OscillatorOscillator OptionsOptions allowallow MicrocontrollerMicrocontroller andand USBUSB modulemodule toto RunRun atat differentdifferent ClockClock SpeedsSpeeds 16-05-2013 Mahesh J. vadhavaniya 26
  27. 27. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers PeripheralsPeripherals I/OI/O PortsPorts :: PICPIC1818FF45504550 havehave 55 (Port(Port A,A, PortPort B,B, PortPort C,C, PortPort DD andand PortPort E)E) 88--bitbit inputinput--outputoutput portsports.. PortBPortB && PortDPortD havehave 88 I/OI/O pinspins eacheach.. AlthoughAlthough otherother threethree portsports areare 88--bitbit portsports butbut theythey dodo notnot havehave eighteight I/OI/O pinspins.. AlthoughAlthough thethe 88--bitbit inputinput andand outputoutput areare givengiven toto thesethese ports,ports, butbut thethe pinspins whichwhich dodo notnot exist,exist, areare maskedmasked internallyinternally.. MemoryMemory :: PICPIC1818FF45504550 consistsconsists ofof threethree differentdifferent memorymemory sectionssections.. 16-05-2013 Mahesh J. vadhavaniya 27
  28. 28. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers PeripheralsPeripherals 11.. FlashFlash MemoryMemory:: FlashFlash memorymemory isis usedused toto storestore thethe programprogram downloadeddownloaded byby aa useruser onon toto thethe microcontrollermicrocontroller.. FlashFlash memorymemory isis nonnon--volatile,volatile, ii..ee..,, itit retainsretains thethe programprogram eveneven afterafter thethe powerpower isis cutcut--offoff.. 22.. EEPROMEEPROM:: ThisThis isis alsoalso aa nonvolatilenonvolatile memorymemory whichwhich isis usedused toto storestore datadata likelike valuesvalues ofof certaincertain variablesvariables.. eveneven afterafter thethe powerpower isis cutcut--offoff.. PICPIC1818FF45504550 hashas 3232KBKB ofof FlashFlash MemoryMemory.. PICPIC1818FF45504550 hashas 256256 BytesBytes ofof EEPROMEEPROM.. 16-05-2013 Mahesh J. vadhavaniya 28
  29. 29. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers PeripheralsPeripherals 33.. SRAMSRAM:: StaticStatic RandomRandom AccessAccess MemoryMemory isis thethe volatilevolatile memorymemory ofof thethe microcontroller,microcontroller, ii..ee..,, itit losesloses itsits datadata asas soonsoon asas thethe powerpower isis cutcut offoff PICPIC1818FF45504550 isis equippedequipped withwith 22 KBKB ofof internalinternal SRAMSRAM.. .. OscillatorOscillator :: TheThe PICPIC1818FF seriesseries hashas flexibleflexible clockclock optionsoptions.. TheseThese controllerscontrollers alsoalso consistconsist ofof anan internalinternal oscillatoroscillator whichwhich providesprovides eighteight selectableselectable frequencyfrequency optionsoptions varyingvarying fromfrom 3131 KHzKHz toto 88 MHzMHz.. AnAn externalexternal clockclock ofof upup toto 4848 MHzMHz cancan bebe appliedapplied toto thisthis seriesseries.. 16-05-2013 Mahesh J. vadhavaniya 29
  30. 30. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers PeripheralsPeripherals 88 xx 88 MultiplierMultiplier :: TheThe PICPIC1818FF45504550 includesincludes anan 88 xx 88 multipliermultiplier hardwarehardware.. ThisThis hardwarehardware performsperforms thethe multiplicationsmultiplications inin singlesingle machinemachine cyclecycle.. ADCADC InterfaceInterface :: PICPIC1818FF45504550 isis equippedequipped withwith 1313 ADCADC (Analog(Analog toto DigitalDigital Converter)Converter) channelschannels ofof 1010--bitsbits resolutionresolution.. machinemachine cyclecycle.. ThisThis givesgives higherhigher computationalcomputational throughputthroughput andand reducesreduces operationoperation cyclecycle && codecode lengthlength.. 16-05-2013 Mahesh J. vadhavaniya 30
  31. 31. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers PeripheralsPeripherals TimersTimers // CountersCounters :: PICPIC1818FF45504550 hashas fourfour timer/counterstimer/counters.. ThereThere isis oneone 88--bitbit timertimer andand thethe remainingremaining timerstimers havehave optionoption toto selectselect 88 oror 1616 bitbit modemode.. InterruptsInterrupts :: PICPIC1818FF45504550 consistsconsists ofof threethree externalexternal interruptsinterrupts sourcessources.. optionoption toto selectselect 88 oror 1616 bitbit modemode.. ThereThere areare 2020 internalinternal interruptsinterrupts whichwhich areare associatedassociated withwith differentdifferent peripheralsperipherals likelike USART,USART, ADC,ADC, Timers,Timers, andand soso onon.. 16-05-2013 Mahesh J. vadhavaniya 31
  32. 32. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers PINPIN DiagramDiagram 16-05-2013 Mahesh J. vadhavaniya 32
  33. 33. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers PINPIN DescriptionDescription Pin No. Name Description Alternate Function 1 MCLR/VPP/RE3 Master clear Vpp: programming voltage input RE3: I/O pin of PORTE, PIN 3 2 RA0/AN0 AN0: Analog input 0 3 RA1/AN1 AN1: Analog input 1 AN2: Analog input 2 Port A I/O Pins 1-6 4 RA2/AN2/VREF-/CVREF VREF-: A/D reference voltage (low) input. CVREF: Analog comparator reference output. 5 RA3/AN3/VREF+ AN3: Analog input3 VREF+: A/D reference voltage (high) input 6 RA4/T0CKI/C1OUT/RCV T0CKI: Timer0 external clock input. C1OUT: Comparator 1 output RCV: External USB transceiver RCV input. 7 RA5/AN4/SS/HLVDIN/C2OUT AN4: Analog input 4 SS: SPI slave select input HLDVIN: High/Low-Voltage Detect input. C2OUT: Comparator 2 output. 16-05-2013 Mahesh J. vadhavaniya 33
  34. 34. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers PINPIN DescriptionDescription Pin No. Name Description Alternate Function 8 RE0/AN5/CK1SPP Port E I/O Pins 1-3 AN5: Analog input 5 CK1SPP: SPP clock 1 output. 9 RE1/AN6/CK2SPP AN6: Analog input 6 CK2SPP: SPP clock 2 output Port E I/O Pins 1-39 RE1/AN6/CK2SPP CK2SPP: SPP clock 2 output 10 RE2/AN7/OESPP AN6: Analog input 7 OESPP : SPP Enabled output 11 VDD Positive supply 12 Vss Ground 13 OSC1/CLKI Oscillator pin 1 CLKI: External clock source input 14 OSC2/CLKO/RA6 Port E I/O Pin 7 CLKO: External clock source output OSC2: Oscillator pin 2 16-05-2013 Mahesh J. vadhavaniya 34
  35. 35. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers PINPIN DescriptionDescription Pin No. Name Description Alternate Function 15 RC0/T1OSO/T13CKI Port C I/O Pins 1-3 T1OSO :Timer1 oscillator output T13CKI: Timer1/Timer3 external clock input. 16 RC1/T1OSI/CCP2/UOE T1OSI: Timer1 oscillator output CCP2:Capture 2 input/Compare 2 output/PWM2 outputPort C I/O Pins 1-3 output UOE: External USB transceiver OE output 17 RC2/CCP1/P1A CCP1: Capture 1 input/Compare 1 output/PWM1 output. P1A :Enhanced CCP1 PWM output, channel A. 18 VUSB Internal USB 3.3V voltage regulator output, positive supply for the USB transceiver. 19 RD0/SPP0 Port D I/O Pins 1-4 SPP0-SPP4 Streaming Parallel Port data 20 RD1/SPP1 21 RD2/SPP2 22 RD3/SPP3 16-05-2013 Mahesh J. vadhavaniya 35
  36. 36. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers PINPIN DescriptionDescription Pin No. Name Description Alternate Function 23 RC3/D-/VM Port C I/O Pins 4-5 D-: USB differential minus line (input/output) VM: External USB transceiver VM input. 24 RC4/D+/VP D+: USB differential plus line (input/output). VP: External USB transceiver VP input. 25 RC6/TX/CK TX: EUSART asynchronous transmit. CK: EUSART synchronous clock (see RX/DT). 25 RC6/TX/CK Port C I/O Pins 7-8 CK: EUSART synchronous clock (see RX/DT). 26 RC7/RX/DT/SDO RX: EUSART asynchronous receive. DT: EUSART synchronous data (see TX/CK). SDO: SPI data out. 27 RD4/SPP4 Port D I/O Pins 5-8 SPP4:Streaming Parallel Port data 28 RD5/SPP5/P1B SPP5:Streaming Parallel Port data P1B: Enhanced CCP1 PWM output, channel B 29 RD6/SPP6/P1C SPP6:Streaming Parallel Port data P1C: Enhanced CCP1 PWM output, channel C 30 RD7/SPP7/P1D SPP7:Streaming Parallel Port data P1D: Enhanced CCP1 PWM output, channel D 16-05-2013 Mahesh J. vadhavaniya 36
  37. 37. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers PINPIN DescriptionDescription Pin No. Name Description Alternate Function 31 Vss Ground 32 VDD Positive supply 33 RB0/AN12/INT0/FLT0/SDI/S DA AN12: Analog input 12. INT0: External interrupt 0. FLT0: Enhanced PWM Fault input (ECCP1 module). Port B I/O Pins 1-8 SDI: SPI data in. SDA: I2C data I/O. 34 RB1/AN10/INT1/SCK/SCL AN10: Analog input 10. INT1: External interrupt 1. SCK: Synchronous serial clock input/output for SPI mode. SCL: Synchronous serial clock input/output for I2C mode. 35 RB2/AN8/INT2/VMO AN8: Analog input 8. INT2: External interrupt 2. VMO: External USB transceiver VMO output. 16-05-2013 Mahesh J. vadhavaniya 37
  38. 38. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers PINPIN DescriptionDescription Pin No. Name Description Alternate Function 36 RB3/AN9/CCP2/VPO AN9: Analog input 9. CCP2: Capture 2 input/Compare 2 output/PWM2 output. VPO: External USB transceiver VPO output. 37 RB4/AN11/KBI0/CSSPP AN11: Analog input 11. KBI0: Interrupt-on-change pin. Port B I/O Pins 1-8 37 RB4/AN11/KBI0/CSSPP KBI0: Interrupt-on-change pin. CSSPP: SPP chip select control output. 38 RB5/KBI1/PGM KBI1: Interrupt-on-change pin. PGM: Low-Voltage ICSP Programming enable pin. 39 RB6/KBI2/PGC KBI2: Interrupt-on-change pin. PGC: Low-Voltage ICSP Programming enable pin. 40 RB7/KBI3/PGD KBI3: Interrupt-on-change pin. PGD: In-Circuit Debugger and ICSP programming data pin. 16-05-2013 Mahesh J. vadhavaniya 38
  39. 39. PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers BlockBlock DiagramDiagram 16-05-2013 Mahesh J. vadhavaniya 39
  40. 40. Microprocessor Unit PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers ArithmeticArithmetic LogicLogic UnitUnit (ALU)(ALU) InstructionInstruction decoderdecoder 1616--bitbit instructionsinstructions StatusStatus registerregister thatthat storesstores flagsflags 55--bitsbits WREGWREG –– workingworking registerregister 88--bitbit accumulatoraccumulator RegistersRegisters ProgramProgram CounterCounter (PC)(PC) 2121--bitbit registerregister thatthat holdsholds thethe ProgramProgram MemoryMemory addressaddress BankBank SelectSelect RegisterRegister (BSR)(BSR) 44--bitbit registerregister usedused inin directdirect addressingaddressing thethe DataData MemoryMemory FileFile SelectSelect RegistersRegisters (FSRs)(FSRs) 1212--bitbit registersregisters usedused asas memorymemory pointerspointers inin indirectindirect addressingaddressing DataData MemoryMemory 16-05-2013 Mahesh J. vadhavaniya 40
  41. 41. Microprocessor Unit PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers AddressAddress busbus 2121--bitbit addressaddress busbus forfor ProgramProgram MemoryMemory AddressingAddressing capacitycapacity:: 22 MBMB 1212--bitbit addressaddress busbus forfor DataData MemoryMemory AddressingAddressing capacitycapacity:: 44 KBKB DataData busbus 1616--bitbit instruction/datainstruction/data busbus forfor ProgramProgram MemoryMemory1616--bitbit instruction/datainstruction/data busbus forfor ProgramProgram MemoryMemory 88--bitbit datadata busbus forfor DataData MemoryMemory PICPIC1818FF452452//45204520 MemoryMemory ProgramProgram MemoryMemory:: 3232 KK (Address(Address rangerange:: 000000000000 toto 007007FFFH)FFFH) DataData MemoryMemory:: 44 KK (Address(Address rangerange:: 000000 toto FFFH)FFFH) DataData EEPROMEEPROM NotNot partpart ofof thethe datadata memorymemory spacespace AddressedAddressed throughthrough specialspecial functionfunction registersregisters 16-05-2013 Mahesh J. vadhavaniya 41
  42. 42. Microprocessor Unit PIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollersPIC microcontrollers SpecialSpecial FeaturesFeatures SleepSleep modemode PowerPower--downdown modemode WatchdogWatchdog timertimer (WDT)(WDT) AbleAble toto resetreset thethe processorprocessor ifif thethe programprogram isis caughtcaught inin unknownunknown statestate (e(e..gg..,, infiniteinfinite loop)loop)inin unknownunknown statestate (e(e..gg..,, infiniteinfinite loop)loop) CodeCode protectionprotection EEPROMEEPROM cancan bebe protectedprotected throughthrough SFRSFR InIn--circuitcircuit serialserial programmingprogramming InIn--circuitcircuit debuggerdebugger 16-05-2013 Mahesh J. vadhavaniya 42
  43. 43. PICPIC1818FF44XX22 ArchitectureArchitecture BlockBlock DiagramDiagram 16-05-2013 Mahesh J. vadhavaniya 43
  44. 44. Embedded SystemEmbedded SystemEmbedded SystemEmbedded SystemEmbedded SystemEmbedded SystemEmbedded SystemEmbedded System MicrocontrollerMicrocontroller--basedbased TimeTime andand TemperatureTemperature SystemSystem 16-05-2013 Mahesh J. vadhavaniya 44
  45. 45. 16-05-2013 Mahesh J. vadhavaniya 45
  46. 46. 47TMT H E A R C H I T E C T U R E F O R T H E D I G I T A L W O R L D
  47. 47. The ARM Architecture 48TMT H E A R C H I T E C T U R E F O R T H E D I G I T A L W O R L D The ARM Architecture
  48. 48. ARMARMARMARMARMARMARMARM TheThe ARMARM isis aa 3232--bitbit RReducededuced IInstructionnstruction SSetet CComputeromputer ((RISCRISC)) IInstructionnstruction SSetet AArchitecturerchitecture ((ISAISA)) developeddeveloped byby ARMARM HoldingsHoldings..developeddeveloped byby ARMARM HoldingsHoldings.. ItIt waswas knownknown asas thethe AdvancedAdvanced RISCRISC MachineMachine.. 16-05-2013 Mahesh J. vadhavaniya 48
  49. 49. FoundedFounded inin NovemberNovember 19901990.. SpunSpun outout ofof AcornAcorn ComputersComputers.. ARM LtdARM LtdARM LtdARM LtdARM LtdARM LtdARM LtdARM Ltd DesignsDesigns thethe ARMARM rangerange ofof RISCRISC processorprocessor corescores.. LicensesLicenses ARMARM corecore designsdesigns toto semiconductorsemiconductor partnerspartners whowho fabricatefabricate andandsemiconductorsemiconductor partnerspartners whowho fabricatefabricate andand sellsell toto theirtheir customerscustomers.. ARMARM doesdoes notnot fabricatefabricate siliconsilicon itselfitself.. AlsoAlso developdevelop technologiestechnologies toto assistassist withwith thethe designdesign--inin ofof thethe ARMARM architecturearchitecture SoftwareSoftware tools,tools, boards,boards, debugdebug hardware,hardware, applicationapplication software,software, busbus architectures,architectures, peripheralsperipherals etcetc 16-05-2013 Mahesh J. vadhavaniya 49
  50. 50. LicencableLicencableLicencableLicencableLicencableLicencableLicencableLicencable ArchitectureArchitectureArchitectureArchitectureArchitectureArchitectureArchitectureArchitecture CompaniesCompanies thatthat areare currentlycurrently oror formerlyformerly ARMARM licenseeslicensees includeinclude :: Alcatel,Alcatel, AppleApple IncInc..,, Atmel,Atmel, Broadcom,Broadcom, CirrusCirrus Logic,Logic, DigitalDigital EquipmentEquipment Corporation,Corporation, FreescaleFreescale,, IntelIntel (through(through DEC),DEC),EquipmentEquipment Corporation,Corporation, FreescaleFreescale,, IntelIntel (through(through DEC),DEC), LG,LG, MarvellMarvell TechnologyTechnology Group,Group, NEC,NEC, NVIDIA,NVIDIA, NXPNXP (previously(previously Philips),Philips), Oki,Oki, Qualcomm,Qualcomm, Samsung,Samsung, Sharp,Sharp, STST Microelectronics,Microelectronics, SymbiosSymbios Logic,Logic, TexasTexas Instruments,Instruments, VLSIVLSI Technology,Technology, YamahaYamaha andand ZiiLABSZiiLABS 16-05-2013 Mahesh J. vadhavaniya 50
  51. 51. ARM Partnership ModelARM Partnership ModelARM Partnership ModelARM Partnership ModelARM Partnership ModelARM Partnership ModelARM Partnership ModelARM Partnership Model 16-05-2013 Mahesh J. vadhavaniya 51
  52. 52. IntroductionIntroductionIntroductionIntroductionIntroductionIntroductionIntroductionIntroduction LeadingLeading providerprovider ofof 3232--bitbit embeddedembedded RISCRISC microprocessors,microprocessors, 7575%% ofof marketmarket.. HighHigh performanceperformance LowLow powerpower consumptionconsumption LowLow systemsystem costcost SolutionsSolutions forfor EmbeddedEmbedded realreal--timetime systemssystems forfor massmass storage,storage, automotive,automotive, industrialindustrial andand networkingnetworking applicationsapplications.. SecureSecure applicationsapplications -- smartcardssmartcards andand SIMsSIMs OpenOpen platformsplatforms runningrunning complexcomplex operatingoperating systemssystems LowLow systemsystem costcost 16-05-2013 Mahesh J. vadhavaniya 52
  53. 53. IntroductionIntroductionIntroductionIntroductionIntroductionIntroductionIntroductionIntroduction FirstFirst versionversion ofof ARMARM processorprocessor 2626--bitbit addressing,addressing, nono multiplymultiply // coprocessorcoprocessor ARMvARMv11 FirstFirst commercialcommercial chipchip IncludedIncluded 3232--bitbit resultresult multiplymultiply instructions/coprocessorinstructions/coprocessor ARMvARMv22 IncludedIncluded 3232--bitbit resultresult multiplymultiply instructions/coprocessorinstructions/coprocessor supportsupport ARMARM33 chipchip withwith onon--chipchip cachecache AddedAdded loadload andand storestore cachecache managementmanagement ARMvARMv22aa ARMARM66,, 3232 bitbit addressing,addressing, virtualvirtual memorymemory supportsupport.. ARMvARMv33 16-05-2013 Mahesh J. vadhavaniya 53
  54. 54. Development ofDevelopment ofDevelopment ofDevelopment ofDevelopment ofDevelopment ofDevelopment ofDevelopment of the ARMthe ARMthe ARMthe ARMthe ARMthe ARMthe ARMthe ARM ArchitectureArchitectureArchitectureArchitectureArchitectureArchitectureArchitectureArchitecture SA-110 1 Halfword and signed halfword / byte support System mode2 4 SA-1110 Improved ARM/Thumb Interworking CLZ 5TE Saturated maths DSP multiply- ARM9EJ-S 5TEJ ARM7EJ-S ARM926EJ-S Jazelle Java bytecode execution ARM1026EJ-S ARM7TDMI 4TThumb instruction set ARM9TDMI SA-1110 ARM720T ARM940T DSP multiply- accumulate instructions XScale ARM1020E ARM9E-S ARM966E-S 3 Early ARM architectures ARM7EJ-S 6 ARM1136EJ-S ARM1026EJ-S SIMD Instructions Multi-processing V6 Memory architecture (VMSA) Unaligned data support 16-05-2013 Mahesh J. vadhavaniya 54
  55. 55. ARM Processor CoreARM Processor CoreARM Processor CoreARM Processor CoreARM Processor CoreARM Processor CoreARM Processor CoreARM Processor Core CurrentCurrent lowlow--endend ARMARM corecore forfor applicationsapplications likelike digitaldigital mobilemobile phonesphones.. TDMITDMI TT:: Thumb,Thumb, 1616--bitbit instructioninstruction setset DD:: onon--chipchip DebugDebug support,support, enablingenabling thethe processorprocessor toto halthalt inin responseresponse toto aa debugdebug requestrequesthalthalt inin responseresponse toto aa debugdebug requestrequest MM:: enhancedenhanced Multiplier,Multiplier, yieldyield aa fullfull 6464--bitbit result,result, highhigh performanceperformance II:: EmbeddedEmbedded ICEICE hardwarehardware VonVon NeumannNeumann architecturearchitecture 33--stagestage pipelinepipeline 16-05-2013 Mahesh J. vadhavaniya 55
  56. 56. ARM Core DiagramARM Core DiagramARM Core DiagramARM Core DiagramARM Core DiagramARM Core DiagramARM Core DiagramARM Core Diagram 16-05-2013 Mahesh J. vadhavaniya 56
  57. 57. The RegistersThe RegistersThe RegistersThe RegistersThe RegistersThe RegistersThe RegistersThe Registers ARMARM hashas 3737 registersregisters allall ofof whichwhich areare 3232--bitsbits longlong 11 dedicateddedicated programprogram countercounter 11 dedicateddedicated currentcurrent programprogram statusstatus registerregister 55 dedicateddedicated savedsaved programprogram statusstatus registersregisters 3030 generalgeneral purposepurpose registersregisters TheThe currentcurrent processorprocessor modemode governsgoverns whichwhich ofof severalseveral banksbanks isis accessibleaccessible.. EachEach modemode cancan accessaccessisis accessibleaccessible.. EachEach modemode cancan accessaccess aa particularparticular setset ofof rr00--rr1212 registersregisters aa particularparticular rr1313 (the(the stackstack pointer,pointer, sp)sp) andand rr1414 (the(the linklink register)register) thethe programprogram counter,counter, rr1515 (pc)(pc) thethe currentcurrent programprogram statusstatus register,register, cpsrcpsr PrivilegedPrivileged modesmodes (except(except System)System) cancan alsoalso accessaccess aa particularparticular spsrspsr (saved(saved programprogram statusstatus register)register) 16-05-2013 Mahesh J. vadhavaniya 57
  58. 58. Different StatesDifferent StatesDifferent StatesDifferent StatesDifferent StatesDifferent StatesDifferent StatesDifferent States AllAll instructionsinstructions areare 3232 bitsbits widewide AllAll instructionsinstructions mustmust bebe wordword alignedaligned WhenWhen thethe processorprocessor isis executingexecuting inin ARMARM statestate :: AllAll instructionsinstructions areare 1616 bitsbits widewide WhenWhen thethe processorprocessor isis executingexecuting inin ThumbThumb statestate :: AllAll instructionsinstructions areare 1616 bitsbits widewide AllAll instructionsinstructions mustmust bebe halfwordhalfword alignedaligned AllAll instructionsinstructions areare 88 bitsbits widewide ProcessorProcessor performsperforms aa wordword accessaccess toto readread 44 instructionsinstructions atat onceonce WhenWhen thethe processorprocessor isis executingexecuting inin JazelleJazelle statestate :: 16-05-2013 Mahesh J. vadhavaniya 58
  59. 59. ThumbThumbThumbThumbThumbThumbThumbThumb ThumbThumb isis aa 1616--bitbit instructioninstruction setset OptimisedOptimised forfor codecode densitydensity fromfrom CC codecode (~(~6565%% ofof ARMARM codecode size)size) ImprovedImproved performanceperformance fromfrom narrownarrow memorymemory SubsetSubset ofof thethe functionalityfunctionality ofof thethe ARMARM instructioninstruction setset CoreCore hashas additionaladditional executionexecution statestate –– ThumbThumb SwitchSwitch betweenbetween ARMARM andand ThumbThumb usingusing BXBX instructioninstruction 01 5 31 0 ADDS r2,r2,#1 ADD r2,#1 32-bit ARM Instruction 16-bit Thumb Instruction ForFor mostmost instructionsinstructions generatedgenerated byby compilercompiler :: ConditionalConditional executionexecution isis notnot usedused SourceSource andand destinationdestination registersregisters identicalidentical OnlyOnly LowLow registersregisters usedused ConstantsConstants areare ofof limitedlimited sizesize InlineInline barrelbarrel shiftershifter notnot usedused 16-05-2013 Mahesh J. vadhavaniya 59
  60. 60. mreq seq lock Dout[31:0] D[31:0] r /w mas[1:0] mode [4:0] trans abort me mory interface MMU interface mclk wait eclk isync bigend enin irq ¼q reset enout abe cl ock control co nfiguration in terrupts in itialization bu s control ale ape dbe bl[3:0] Tbit st atetbe enouti busen Din[31:0] A[31:0] ARM Interface SignalsARM Interface SignalsARM Interface SignalsARM Interface SignalsARM Interface SignalsARM Interface SignalsARM Interface SignalsARM Interface Signals opc cpi cpa cpb co processor interface Vdd Vss po wer dbgrq breakpt dbgack de bug exec extern1 extern0 dbgen TRST TCK TMS TDI JTAG controls TDO rangeout0 rangeout1 dbgrqi commrx commtx highz busdis ecapclk busen ARM7TDMI core tapsm[3:0] ir[3:0] tdoen tck1 tck2 screg[3:0] TAP information drivebs ecapclkbs icapclkbs highz pclkbs rstclkbs sdinbs sdoutbs shclkbs shclk2bs bo undary scan extension 16-05-2013 Mahesh J. vadhavaniya 60
  61. 61. ARM Interface SignalsARM Interface SignalsARM Interface SignalsARM Interface SignalsARM Interface SignalsARM Interface SignalsARM Interface SignalsARM Interface Signals ClockClock controlcontrol AllAll statestate changechange withinwithin thethe processorprocessor areare controlledcontrolled byby mclkmclk,, thethe memorymemory clockclock InternalInternal clockclock == mclkmclk ANDAND waitwait eclkeclk clockclock outputoutput reflectsreflects thethe clockclock usedused byby thethe corecore MemoryMemory interfaceinterface 3232--bitbit addressaddress A[A[3131::00],], bidirectionalbidirectional datadata busbus D[D[3131::00],], mreq s eq Cy cl e Us e 0 0 N Non-sequential memory access 0 1 S Sequential memory access 1 0 I Internal cycle – bus and memory inactive 1 1 C Coprocessor register transfer – memory inactive 3232--bitbit addressaddress A[A[3131::00],], bidirectionalbidirectional datadata busbus D[D[3131::00],], separateseparate datadata outout DoutDout[[3131::00],], datadata inin Din[Din[3131::00]] seqseq indicatesindicates thatthat thethe memorymemory addressaddress willwill bebe sequentialsequential toto thatthat usedused inin thethe previousprevious cyclecycle 16-05-2013 Mahesh J. vadhavaniya 61
  62. 62. ARM Interface SignalsARM Interface SignalsARM Interface SignalsARM Interface SignalsARM Interface SignalsARM Interface SignalsARM Interface SignalsARM Interface Signals InitializationInitializationInitializationInitialization fiqfiq,, fastfast interruptinterrupt request,request, higherhigher prioritypriority irqirq,, normalnormal interruptinterrupt requestrequest isyncisync,, allowallow thethe interruptinterrupt synchronizersynchronizer toto bebe passedpassed InterruptInterruptInterruptInterrupt reset,reset, startsstarts thethe processorprocessor fromfrom aa knownknown state,state, Process 0.35 um Transistors 74,209 MIPS 60 Metal layers 3 Core area 2.1 mm 2 Power 87 mW Vdd 3.3 V Clock 0 to 66 MHz MIPS/W 690 reset,reset, startsstarts thethe processorprocessor fromfrom aa knownknown state,state, executingexecuting fromfrom addressaddress 000000000000000016 ARMARM CharacteristicsCharacteristicsARMARM CharacteristicsCharacteristics 16-05-2013 Mahesh J. vadhavaniya 62
  63. 63. Memory AccessMemory AccessMemory AccessMemory AccessMemory AccessMemory AccessMemory AccessMemory Access TheThe ARMARM isis aa VonVon Neumann,Neumann,TheThe ARMARM isis aa VonVon Neumann,Neumann, load/storeload/store architecture,architecture, ii..ee..,, OnlyOnly 3232 bitbit datadata busbus forfor bothboth instinst.. andand datadata.. OnlyOnly thethe load/storeload/store instinst.. (and(and SWP)SWP) accessaccess memorymemory MemoryMemory isis addressedaddressed asas aa 3232 bitbitMemoryMemory isis addressedaddressed asas aa 3232 bitbit addressaddress spacespace DataData typetype cancan bebe 88 bitbit (bytes),(bytes), 1616 bitbit (half(half--words)words) oror 3232 bitbit (words),(words), andand maymay bebe seenseen asas aa bytebyte lineline foldedfolded intointo 44--bytebyte wordswords 16-05-2013 Mahesh J. vadhavaniya 63
  64. 64. instruction & ARM7TDMI virtual address MMU Processor Core Vs CPU CoreProcessor Core Vs CPU CoreProcessor Core Vs CPU CoreProcessor Core Vs CPU CoreProcessor Core Vs CPU CoreProcessor Core Vs CPU CoreProcessor Core Vs CPU CoreProcessor Core Vs CPU Core ProcessorProcessor CoreCore TheThe engineengine thatthat fetchesfetches instructionsinstructions andand executeexecute themthem EE..gg.:.: ARMARM77TDMI,TDMI, ARMARM99TDMI,TDMI, ARMARM99EE--SS CPUCPU CoreCore ConsistsConsists ofof thethe ARMARM processorprocessor corecore andand somesome tightlytightly coupledcoupled functionfunction AMBA address AMBA data instruction & data cache AMBA interface EmbeddedICE & JTAG instructions & data physical address CP15 MMU write buffer ARM710T tightlytightly coupledcoupled functionfunction blocksblocks CacheCache andand memorymemory managementmanagement blocksblocks EE..gg.:.: ARMARM710710T,T, ARMARM720720T,T, ARMARM7474T,T, ARMARM920920T,T, ARMARM922922T,T, ARMARM940940T,T, ARMARM946946EE--S,S, andand ARMARM966966EE--SS 16-05-2013 Mahesh J. vadhavaniya 64
  65. 65. ARM Powered Products 16-05-2013 Mahesh J. vadhavaniya 65
  66. 66. Intellectual PropertyIntellectual PropertyIntellectual PropertyIntellectual PropertyIntellectual PropertyIntellectual PropertyIntellectual PropertyIntellectual Property ARMARM providesprovides hardhard andand softsoft viewsviews toto licenceeslicencees RTLRTL andand synthesissynthesis flowsflows GDSIIGDSII layoutlayout LicenceesLicencees havehave thethe rightright toto useuse hardhard oror softsoft viewsviews ofof thethe IPIPLicenceesLicencees havehave thethe rightright toto useuse hardhard oror softsoft viewsviews ofof thethe IPIP softsoft viewsviews includeinclude gategate levellevel netlistsnetlists hardhard viewsviews areare DSMsDSMs OEMsOEMs mustmust useuse hardhard viewsviews toto protectprotect ARMARM IPIP 16-05-2013 Mahesh J. vadhavaniya 66
  67. 67. Data Sizes and Instruction SetsData Sizes and Instruction SetsData Sizes and Instruction SetsData Sizes and Instruction SetsData Sizes and Instruction SetsData Sizes and Instruction SetsData Sizes and Instruction SetsData Sizes and Instruction Sets TheThe ARMARM isis aa 3232--bitbit architecturearchitecture.. WhenWhen usedused inin relationrelation toto thethe ARMARM:: ByteByte meansmeans 88 bitsbits HalfwordHalfword meansmeans 1616 bitsbits (two(two bytes)bytes) WordWord meansmeans 3232 bitsbits (four(four bytes)bytes) MostMost ARM’sARM’s implementimplement twotwo instructioninstruction setssets :: 3232--bitbit ARMARM InstructionInstruction SetSet 1616--bitbit ThumbThumb InstructionInstruction SetSet JazelleJazelle corescores cancan alsoalso executeexecute JavaJava bytebyte codecode.. 16-05-2013 Mahesh J. vadhavaniya 67
  68. 68. Processor ModesProcessor ModesProcessor ModesProcessor ModesProcessor ModesProcessor ModesProcessor ModesProcessor Modes TheThe ARMARM hashas sevenseven basicbasic operatingoperating modesmodes :: UserUser :: unprivilegedunprivileged modemode underunder whichwhich mostmost taskstasks runrun FIQFIQ :: enteredentered whenwhen aa highhigh prioritypriority (fast)(fast) interruptinterrupt isis raisedraised IRQIRQ :: enteredentered whenwhen aa lowlow prioritypriority (normal)(normal) interruptinterrupt isis raisedraised SupervisorSupervisor :: enteredentered onon resetreset andand whenwhen aa SoftwareSoftware InterruptInterrupt instructioninstruction isis executedexecuted AbortAbort :: usedused toto handlehandle memorymemory accessaccess violationsviolations UndefUndef :: usedused toto handlehandle undefinedundefined instructionsinstructions SystemSystem :: privilegedprivileged modemode usingusing thethe samesame registersregisters asas useruser modemode 16-05-2013 Mahesh J. vadhavaniya 68
  69. 69. r0 r1 r2 r3 r4 r5 r6 FIQ IRQ SVC Undef Abort User Mode r0 r1 r2 r3 r4 r5 r6 Current Visible Registers Banked out Registers FIQ IRQ SVC Undef Abort r0 r1 r2 r3 r4 r5 r6 Current Visible Registers Banked out Registers User IRQ SVC Undef Abort FIQ ModeIRQ Mode r0 r1 r2 r3 r4 r5 r6 Current Visible Registers Banked out Registers User FIQ SVC Undef Abort Undef Mode r0 r1 r2 r3 r4 r5 r6 Current Visible Registers Banked out Registers User FIQ IRQ SVC Abort SVC Mode r0 r1 r2 r3 r4 r5 r6 Current Visible Registers Banked out Registers User FIQ IRQ Undef Abort Abort Mode r0 r1 r2 r3 r4 r5 r6 Current Visible Registers Banked out Registers User FIQ IRQ SVC Undef The ARM Register SetThe ARM Register SetThe ARM Register SetThe ARM Register SetThe ARM Register SetThe ARM Register SetThe ARM Register SetThe ARM Register Set r6 r7 r8 r9 r10 r11 r12 r13 (sp) r14 (lr) r15 (pc) cpsr r13 (sp) r14 (lr) spsr r13 (sp) r14 (lr) spsr r13 (sp) r14 (lr) spsr r13 (sp) r14 (lr) spsr r8 r9 r10 r11 r12 r13 (sp) r14 (lr) spsr FIQ IRQ SVC Undef Abortr6 r7 r8 r9 r10 r11 r12 r13 (sp) r14 (lr) r15 (pc) cpsr r13 (sp) r14 (lr) spsr r13 (sp) r14 (lr) spsr r13 (sp) r14 (lr) spsr r13 (sp) r14 (lr) spsr r8 r9 r10 r11 r12 r13 (sp) r14 (lr) spsr FIQ IRQ SVC Undef Abortr6 r7 r15 (pc) cpsr r13 (sp) r14 (lr) spsr r13 (sp) r14 (lr) spsr r13 (sp) r14 (lr) spsr r13 (sp) r14 (lr) spsr r8 r9 r10 r11 r12 r13 (sp) r14 (lr) spsr User IRQ SVC Undef Abort r8 r9 r10 r11 r12 r13 (sp) r14 (lr) r6 r7 r8 r9 r10 r11 r12 r15 (pc) cpsr r13 (sp) r14 (lr) spsr r13 (sp) r14 (lr) spsr r13 (sp) r14 (lr) spsr r13 (sp) r14 (lr) spsr r8 r9 r10 r11 r12 r13 (sp) r14 (lr) spsr User FIQ SVC Undef Abort r13 (sp) r14 (lr) r6 r7 r8 r9 r10 r11 r12 r15 (pc) cpsr r13 (sp) r14 (lr) spsr r13 (sp) r14 (lr) spsr r13 (sp) r14 (lr) spsr r13 (sp) r14 (lr) spsr r8 r9 r10 r11 r12 r13 (sp) r14 (lr) spsr User FIQ IRQ SVC Abort r13 (sp) r14 (lr) r6 r7 r8 r9 r10 r11 r12 r15 (pc) cpsr r13 (sp) r14 (lr) spsr r13 (sp) r14 (lr) spsr r13 (sp) r14 (lr) spsr r13 (sp) r14 (lr) spsr r8 r9 r10 r11 r12 r13 (sp) r14 (lr) spsr User FIQ IRQ Undef Abort r13 (sp) r14 (lr) r6 r7 r8 r9 r10 r11 r12 r15 (pc) cpsr r13 (sp) r14 (lr) spsr r13 (sp) r14 (lr) spsr r13 (sp) r14 (lr) spsr r13 (sp) r14 (lr) spsr r8 r9 r10 r11 r12 r13 (sp) r14 (lr) spsr User FIQ IRQ SVC Undef r13 (sp) r14 (lr) 16-05-2013 Mahesh J. vadhavaniya 69
  70. 70. Register Organization SummaryRegister Organization SummaryRegister Organization SummaryRegister Organization SummaryRegister Organization SummaryRegister Organization SummaryRegister Organization SummaryRegister Organization Summary User mode r0-r7, r15, and cpsr r8 FIQ r8 r0 r1 r2 r3 r4 r5 r6 r7 User IRQ User mode r0-r12, r15, and cpsr Undef User mode r0-r12, r15, and cpsr SVC User mode r0-r12, r15, and cpsr Abort User mode r0-r12, r15, and cpsr Thumb state Low registers r8 r9 r10 r11 r12 r13 (sp) r14 (lr) spsr r8 r9 r10 r11 r12 r13 (sp) r14 (lr) r15 (pc) cpsr r13 (sp) r14 (lr) spsr cpsr r13 (sp) r14 (lr) spsr cpsr r13 (sp) r14 (lr) spsr cpsr r13 (sp) r14 (lr) spsr cpsr Thumb state High registers Note: System mode uses the User mode register set 16-05-2013 Mahesh J. vadhavaniya 70
  71. 71. 16-05-2013 Mahesh J. vadhavaniya 71
  72. 72. ARM 7 applicationsARM 7 applicationsARM 7 applicationsARM 7 applicationsARM 7 applicationsARM 7 applicationsARM 7 applicationsARM 7 applications 16-05-2013 Mahesh J. vadhavaniya 72
  73. 73. ARM 9 applicationsARM 9 applicationsARM 9 applicationsARM 9 applicationsARM 9 applicationsARM 9 applicationsARM 9 applicationsARM 9 applications 16-05-2013 Mahesh J. vadhavaniya 73
  74. 74. ARM 11 applicationsARM 11 applicationsARM 11 applicationsARM 11 applicationsARM 11 applicationsARM 11 applicationsARM 11 applicationsARM 11 applications 16-05-2013 Mahesh J. vadhavaniya 74
  75. 75. ARM Cortex M applicationsARM Cortex M applicationsARM Cortex M applicationsARM Cortex M applicationsARM Cortex M applicationsARM Cortex M applicationsARM Cortex M applicationsARM Cortex M applications DellDell EE43004300 LatitudeLatitude LaptopLaptop.. instantinstant bootboot--upup forfor usersusers andand accessaccess toto selectselect applications,applications, withwith multimulti--dayday batterybattery lifetimeslifetimes.. 16-05-2013 Mahesh J. vadhavaniya 75
  76. 76. ARM Cortex A applicationsARM Cortex A applicationsARM Cortex A applicationsARM Cortex A applicationsARM Cortex A applicationsARM Cortex A applicationsARM Cortex A applicationsARM Cortex A applications 16-05-2013 Mahesh J. vadhavaniya 76
  77. 77. ARM Cortex RARM Cortex RARM Cortex RARM Cortex RARM Cortex RARM Cortex RARM Cortex RARM Cortex R 16-05-2013 Mahesh J. vadhavaniya 77
  78. 78. Architectures overviewArchitectures overviewArchitectures overviewArchitectures overviewArchitectures overviewArchitectures overviewArchitectures overviewArchitectures overview 16-05-2013 Mahesh J. vadhavaniya 78
  79. 79. ARM 7ARM 7ARM 7ARM 7ARM 7ARM 7ARM 7ARM 7 (ARM7-TDMI-S) 16-05-2013 Mahesh J. vadhavaniya 79
  80. 80. ARM7ARM7ARM7ARM7ARM7ARM7ARM7ARM7 TDMITDMITDMITDMITDMITDMITDMITDMI--------SSSSSSSS NXPNXPNXPNXPNXPNXPNXPNXP LPC2148LPC2148LPC2148LPC2148LPC2148LPC2148LPC2148LPC2148 16-05-2013 Mahesh J. vadhavaniya 80
  81. 81. ARMARMARMARMARMARMARMARM CortexRCortexRCortexRCortexRCortexRCortexRCortexRCortexR 16-05-2013 Mahesh J. vadhavaniya 81
  82. 82. TEXAS INSTRUMENTSTEXAS INSTRUMENTSTEXAS INSTRUMENTSTEXAS INSTRUMENTS TI MSP430TI MSP430TI MSP430TI MSP430TI MSP430TI MSP430TI MSP430TI MSP430 16-05-2013 Mahesh J. vadhavaniya 82
  83. 83. MSPMSPMSPMSPMSPMSPMSPMSP 430430430430430430430430 MixedMixed--signalsignal microcontrollermicrocontroller familyfamily.. 1616--bitbit CPUCPU.. LLowow cost,cost, lowlow powerpower consumptionconsumption.. MMeteringetering,, wirelesswireless radioradio frequencyfrequency engineeringengineering (RF),(RF), batterybattery--poweredpowered applicationsapplications.. MSPMSP430430xx11xxxx -- MSPMSP430430xx55xxxx SeriesSeries.. VonVon NeumannNeumann architecturearchitecture.. 1616 xx 1616 bitbit registersregisters (including(including PC,PC, SP,SP, SR,SR, constantconstant generator)generator).. SimpleSimple instructioninstruction setset.. 2020 bitbit addressaddress extensionextension.. 16-05-2013 Mahesh J. vadhavaniya 83
  84. 84. PeripheralsPeripheralsPeripheralsPeripheralsPeripheralsPeripheralsPeripheralsPeripherals GeneralGeneral--puroposepuropose I/OI/O AnalogAnalog--toto--DigitalDigital ConverterConverter BrownBrown OutOut ResetReset ComparatorComparator A,A, A+A+ DigitalDigital--toto--AnalogAnalog ConverterConverter TimersTimers DirectDirect MemoryMemory AccessAccess ControllerController ESPESP430430 (integrated(integrated inin FEFE4242xxxx devices)devices) LCD/LCD_A/LCD_BLCD/LCD_A/LCD_B OpOp AmpsAmps HardwareHardware multipliermultiplier 16-05-2013 Mahesh J. vadhavaniya 84
  85. 85. 16-05-2013 Mahesh J. vadhavaniya 85
  86. 86. AVR Microcontroller FamilyAVR Microcontroller Family 16-05-2013 Mahesh J. vadhavaniya 86
  87. 87. AVR General FeaturesAVR General FeaturesAVR General FeaturesAVR General FeaturesAVR General FeaturesAVR General FeaturesAVR General FeaturesAVR General Features EnhancedEnhanced RISCRISC architecturearchitecture withwith mostlymostly fixedfixed--lengthlength instruction,instruction, loadload--storestore memorymemory accessaccess andand 3232 generalgeneral-- purposepurpose registersregisters.. AA twotwo--stagestage instructioninstruction pipelinepipeline thatthat speedsspeeds upup executionexecution.. MajorityMajority ofof instructionsinstructions taketake oneone clockclock cyclecycle.. UpUp toto 1010--MHzMHz clockclock operationoperation.. WideWide varietyvariety ofof onon--chipchip peripheralsperipherals,, includingincluding digitaldigital I/O,I/O, ADC,ADC, EEPROM,EEPROM, Timer,Timer, UART,UART, RTCRTC timer,timer, PWMPWM etcetc.. InternalInternal programprogram andand datadata memorymemory.. 16-05-2013 Mahesh J. vadhavaniya 87
  88. 88. UpUp toto 1212 timestimes performanceperformance speedupspeedup overover conventionalconventional AVR General FeaturesAVR General FeaturesAVR General FeaturesAVR General FeaturesAVR General FeaturesAVR General FeaturesAVR General FeaturesAVR General Features InIn--SystemSystem programmableprogrammable ((ISPISP)).. AvailableAvailable inin 88--pinpin toto 6464--pinpin sizesize toto suitsuit widewide varietyvariety ofof applicationsapplications.. UpUp toto 1212 timestimes performanceperformance speedupspeedup overover conventionalconventional CISCCISC controllerscontrollers.. WideWide operatingoperating voltagevoltage fromfrom 22..77 VV toto 66..00 VV.. SimpleSimple architecturearchitecture offersoffers aa smallsmall learninglearning curvecurve toto thethe uninitiateduninitiated.. 16-05-2013 Mahesh J. vadhavaniya 88
  89. 89. What does AVR RISC meanWhat does AVR RISC meanWhat does AVR RISC meanWhat does AVR RISC meanWhat does AVR RISC meanWhat does AVR RISC meanWhat does AVR RISC meanWhat does AVR RISC mean ???????? TheThe acronymacronym AVRAVR hashas beenbeen reportedreported toto standstand forfor:: AdvancedAdvanced VirtualVirtual RISCRISC andand alsoalso forfor thethe chip'schip's designersdesigners:: AlfAlf--EgilEgil BogenBogen andand VegardVegard WollanWollan whowho designeddesigned thethe basicbasic architecturearchitecture atat thethe NorwegianNorwegian InstituteInstitute ofof TechnologyTechnology..architecturearchitecture atat thethe NorwegianNorwegian InstituteInstitute ofof TechnologyTechnology.. RISCRISC standsstands forfor ReducedReduced InstructionInstruction SetSet ComputerComputer.. CPUCPU designdesign withwith aa reducedreduced instructioninstruction setset asas wellwell asas aa simplersimpler setset ofof instructionsinstructions (like(like forfor exampleexample PICPIC andand AVR)AVR) 16-05-2013 Mahesh J. vadhavaniya 89
  90. 90. ManufacturersManufacturersManufacturersManufacturersManufacturersManufacturersManufacturersManufacturers Intel,Intel, FreescaleFreescale,, MicrochipMicrochip (PIC),(PIC), TI,TI, ZilogZilog.. AtmelAtmel AVRAVR :: ManyMany Types,Types, tinyATtinyAT,, megaATmegaAT,, automotiveautomotive Lighting,Lighting, LCDLCD ShareShare unifiedunified platformplatformShareShare unifiedunified platformplatform DifferentDifferent #s#s ofof I/OI/O controlcontrol BuiltBuilt--inin PullPull--upup resistorsresistors Ethernet,Ethernet, SerialSerial Data,Data, AuxiliaryAuxiliary Power,Power, USBUSB AnalogAnalog I/O,I/O, Packaging,Packaging, Interrupts,Interrupts, Math,Math, JTAGJTAG GetGet thethe rightright amountamount ofof memorymemory forfor thethe jobjob 16-05-2013 Mahesh J. vadhavaniya 90
  91. 91. AVR Growing FamilyAVR Growing FamilyAVR Growing FamilyAVR Growing FamilyAVR Growing FamilyAVR Growing FamilyAVR Growing FamilyAVR Growing Family 88 –– 3232 pinpin generalgeneral purposepurpose microcontrollersmicrocontrollers..88 –– 3232 pinpin generalgeneral purposepurpose microcontrollersmicrocontrollers.. 1616 familyfamily membersmembers.. 3232 -- 100100 pinpin generalgeneral purposepurpose3232 -- 100100 pinpin generalgeneral purposepurpose microcontrollersmicrocontrollers.. TinyTiny AVRAVR familyfamily MEGAMEGA AVRAVR familyfamily microcontrollersmicrocontrollers.. 2323 familyfamily membersmembers.. USB,USB, CANCAN andand LCDLCD MotorMotor ControlControl andand LightingLighting AutomotiveAutomotive BatteryBattery ManagementManagement 88 familyfamily membersmembers.. ASSPASSP AVRsAVRs 16-05-2013 Mahesh J. vadhavaniya 91
  92. 92. AVR ArchitectureAVR ArchitectureAVR ArchitectureAVR ArchitectureAVR ArchitectureAVR ArchitectureAVR ArchitectureAVR Architecture 16-05-2013 Mahesh J. vadhavaniya 92
  93. 93. AVRAVRAVRAVRAVRAVRAVRAVR –––––––– A Single Chip SolutionA Single Chip SolutionA Single Chip SolutionA Single Chip SolutionA Single Chip SolutionA Single Chip SolutionA Single Chip SolutionA Single Chip Solution 16-05-2013 Mahesh J. vadhavaniya 93
  94. 94. AVRAVRAVRAVRAVRAVRAVRAVR –––––––– A Single Chip SolutionA Single Chip SolutionA Single Chip SolutionA Single Chip SolutionA Single Chip SolutionA Single Chip SolutionA Single Chip SolutionA Single Chip Solution 16-05-2013 Mahesh J. vadhavaniya 94
  95. 95. HighHighHighHighHighHighHighHigh –––––––– Level IntegrationLevel IntegrationLevel IntegrationLevel IntegrationLevel IntegrationLevel IntegrationLevel IntegrationLevel Integration 16-05-2013 Mahesh J. vadhavaniya 95
  96. 96. AVR Mega 8 FeaturesAVR Mega 8 FeaturesAVR Mega 8 FeaturesAVR Mega 8 FeaturesAVR Mega 8 FeaturesAVR Mega 8 FeaturesAVR Mega 8 FeaturesAVR Mega 8 Features 88--KbyteKbyte selfself--programmingprogramming FlashFlash ProgramProgram MemoryMemory 11--KbyteKbyte SRAMSRAM 512512 ByteByte EEPROMEEPROM512512 ByteByte EEPROMEEPROM 66 oror 88 ChannelChannel 1010--bitbit A/DA/D-- converterconverter.. UpUp toto 1616 MIPSMIPS throughputthroughput atat 1616 MhzMhz.. 22..77 -- 55..55 VoltVolt operationoperation.. 16-05-2013 Mahesh J. vadhavaniya 96
  97. 97. AT Mega 8AT Mega 8AT Mega 8AT Mega 8AT Mega 8AT Mega 8AT Mega 8AT Mega 8 PinoutPinoutPinoutPinoutPinoutPinoutPinoutPinout 16-05-2013 Mahesh J. vadhavaniya 97
  98. 98. ATMegaATMegaATMegaATMegaATMegaATMegaATMegaATMega 16 Features16 Features16 Features16 Features16 Features16 Features16 Features16 Features 131131 InstructionsInstructions 3232 88--bitbit GPGP registersregisters ThroughputThroughput upup toto 1616 MIPSMIPS 1616KK programmableprogrammable flashflash (instructions)(instructions) 512512BytesBytes EEPROMEEPROM 11KK internalinternal SRAMSRAM Timers,Timers, serialserial andand parallelparallel I/O,I/O, ADCADC 16-05-2013 Mahesh J. vadhavaniya 98
  99. 99. AVR CPUAVR CPUAVR CPUAVR CPUAVR CPUAVR CPUAVR CPUAVR CPU PC : address of nextPC : address of next instructioninstruction IR: preIR: pre--fetchedfetched instructioninstruction ID: current instructionID: current instruction GPR: R0GPR: R0--R31R31 ALUALU 16-05-2013 Mahesh J. vadhavaniya 99
  100. 100. AVR MemoryAVR MemoryAVR MemoryAVR MemoryAVR MemoryAVR MemoryAVR MemoryAVR Memory Flash: MachineFlash: Machine instructions go hereinstructions go here SRAM: For runtimeSRAM: For runtime datadata Note busNote bus independence forindependence forindependence forindependence for data and instructionsdata and instructions EEPROM: SecondaryEEPROM: Secondary storagestorage EEPROM and FlashEEPROM and Flash memories have amemories have a limited lifetime oflimited lifetime of erase/write cycleserase/write cycles 16-05-2013 Mahesh J. vadhavaniya 100
  101. 101. Flash MemoryFlash MemoryFlash MemoryFlash MemoryFlash MemoryFlash MemoryFlash MemoryFlash Memory Programs reside in word addressable flash storagePrograms reside in word addressable flash storage Word addresses range from 0000Word addresses range from 0000--1FFF (PC is 131FFF (PC is 13 bits)bits) Byte addresses range 0000Byte addresses range 0000--3FFF (0x4000=16K)3FFF (0x4000=16K) Harvard ArchitectureHarvard ArchitectureHarvard ArchitectureHarvard Architecture It is possible to use this storage area for constantIt is possible to use this storage area for constant data as well as instructions, violating the true spiritdata as well as instructions, violating the true spirit of this architectureof this architecture Instructions are 16 or 32Instructions are 16 or 32--bitsbits Most are 16Most are 16--bits and are executed in a single clockbits and are executed in a single clock cyclecycle 16-05-2013 Mahesh J. vadhavaniya 101
  102. 102. SRAMSRAMSRAMSRAMSRAMSRAMSRAMSRAM The ATMega16 has 1K (1024 bytes) of byte addressableThe ATMega16 has 1K (1024 bytes) of byte addressable static RAMstatic RAM This is used for variable storage and stack spaceThis is used for variable storage and stack space during executionduring executionduring executionduring execution SRAM addresses start at $0060 and go throughSRAM addresses start at $0060 and go through $045F$045F •• The reason for not starting at zero will beThe reason for not starting at zero will be covered latercovered later 16-05-2013 Mahesh J. vadhavaniya 102
  103. 103. ClockClockClockClockClockClockClockClock AllAll processorsprocessors areare pushedpushed throughthrough theirtheir fetchfetch executeexecute cyclecycle byby anan alternatingalternating 00--11 signal,signal, calledcalled aa clockclock TheThe ATMegaATMega1616 cancan useuse anan internalinternal oror externalexternal clockclock signalsignal ClockClock signalssignals areare usuallyusually generatedgenerated byby anan RCRCClockClock signalssignals areare usuallyusually generatedgenerated byby anan RCRC oscillatoroscillator oror aa crystalcrystal •• TheThe internalinternal clockclock isis anan RCRC oscillatoroscillator programmableprogrammable toto 11,, 22,, 44,, oror 88 MHzMHz •• AnAn externalexternal clockclock signalsignal (crystal(crystal controlled)controlled) cancan bebe moremore preciseprecise forfor timetime criticalcritical applicationsapplications 16-05-2013 Mahesh J. vadhavaniya 103
  104. 104. AVR Machine LanguageAVR Machine LanguageAVR Machine LanguageAVR Machine LanguageAVR Machine LanguageAVR Machine LanguageAVR Machine LanguageAVR Machine Language AVR instructions are 16 or 32AVR instructions are 16 or 32--bits.bits. Each instruction contains anEach instruction contains an opcodeopcode.. OpcodesOpcodes generally are located in the initial bits ofgenerally are located in the initial bits of an instruction.an instruction.an instruction.an instruction. Some instructions have operands encoded in theSome instructions have operands encoded in the remaining bits.remaining bits. OpcodeOpcode and operands are numbers, but theirand operands are numbers, but their containers are simply some of the bits in thecontainers are simply some of the bits in the instruction.instruction. 16-05-2013 Mahesh J. vadhavaniya 104
  105. 105. AVR 8AVR 8AVR 8AVR 8AVR 8AVR 8AVR 8AVR 8 –––––––– bit RISC High Performancebit RISC High Performancebit RISC High Performancebit RISC High Performancebit RISC High Performancebit RISC High Performancebit RISC High Performancebit RISC High Performance True single cycle executionTrue single cycle execution SingleSingle--clockclock--cyclecycle--perper--instruction executioninstruction execution One MIPS (mega instructions per second) per MHzOne MIPS (mega instructions per second) per MHz Up to 20 MHz clockUp to 20 MHz clock 32 general purpose registers32 general purpose registers provide flexibility and performance when usingprovide flexibility and performance when using high level languageshigh level languages prevents access to RAMprevents access to RAM Harvard architectureHarvard architectureHarvard architectureHarvard architecture separate bus for program and data memoryseparate bus for program and data memory 16-05-2013 Mahesh J. vadhavaniya 105
  106. 106. AVR 8AVR 8AVR 8AVR 8AVR 8AVR 8AVR 8AVR 8 –––––––– bit RISC Low Power Consumptionbit RISC Low Power Consumptionbit RISC Low Power Consumptionbit RISC Low Power Consumptionbit RISC Low Power Consumptionbit RISC Low Power Consumptionbit RISC Low Power Consumptionbit RISC Low Power Consumption 1.8 to 5.5V operation1.8 to 5.5V operation will use all the energy stored in your batterieswill use all the energy stored in your batteries A variety of sleep modesA variety of sleep modes AVR Flash microcontrollers have up to six differentAVR Flash microcontrollers have up to six different sleep modessleep modes fast wakefast wake--up from sleep modesup from sleep modes Software controlled frequencySoftware controlled frequency 16-05-2013 Mahesh J. vadhavaniya 106
  107. 107. AVR 8AVR 8AVR 8AVR 8AVR 8AVR 8AVR 8AVR 8 –––––––– bit RISC Compatibilitybit RISC Compatibilitybit RISC Compatibilitybit RISC Compatibilitybit RISC Compatibilitybit RISC Compatibilitybit RISC Compatibilitybit RISC Compatibility AVR®AVR® FlashFlash microcontrollersmicrocontrollers shareshare aa singlesingle corecore architecturearchitecture useuse thethe samesame codecode forfor allall familiesfamilies 11 KbytesKbytes toto 256256 KbytesKbytes ofof codecode 88 toto 100100 pinspins allall devicesdevices havehave InternalInternal oscillatorsoscillators 16-05-2013 Mahesh J. vadhavaniya 107
  108. 108. AVR 8AVR 8AVR 8AVR 8AVR 8AVR 8AVR 8AVR 8 –––––––– bit RISCbit RISCbit RISCbit RISCbit RISCbit RISCbit RISCbit RISC picopicopicopicopicopicopicopico Power TechnologyPower TechnologyPower TechnologyPower TechnologyPower TechnologyPower TechnologyPower TechnologyPower Technology “Pico“Pico PowerPower enablesenables AVRAVR toto achieveachieve thethe industry’sindustry’s lowestlowest powerpower consumptionconsumption withwith 650650 nAnA withwith aa RTCRTC (real(real timetime clock)clock) runningrunning andand 100100nAnA inin PowerPower DownDown sleep”sleep” TrueTrue 11..88VV SupplySupply VoltageVoltageTrueTrue 11..88VV SupplySupply VoltageVoltage MinimizedMinimized LeakageLeakage CurrentCurrent UltraUltra LowLow PowerPower 3232 kHzkHz CrystalCrystal OscillatorOscillator DigitalDigital InputInput DisableDisable RegistersRegisters PowerPower ReductionReduction RegisterRegister 16-05-2013 Mahesh J. vadhavaniya 108
  109. 109. Code Size and Execution TimeCode Size and Execution TimeCode Size and Execution TimeCode Size and Execution TimeCode Size and Execution TimeCode Size and Execution TimeCode Size and Execution TimeCode Size and Execution Time MSP430 and AVR are running a close race.MSP430 and AVR are running a close race. But max speed on MSP430 is only 8But max speed on MSP430 is only 8 MHz.MHz. The C51 would have to run at 296 MHz to match the 16 MHzThe C51 would have to run at 296 MHz to match the 16 MHz AVR.AVR. PIC 18 seems fast but requires 3 times as much code space.PIC 18 seems fast but requires 3 times as much code space. 16-05-2013 Mahesh J. vadhavaniya 109
  110. 110. Comparison of Code SizeComparison of Code SizeComparison of Code SizeComparison of Code SizeComparison of Code SizeComparison of Code SizeComparison of Code SizeComparison of Code Size 16-05-2013 Mahesh J. vadhavaniya 110
  111. 111. Real Life ApplicationsReal Life ApplicationsReal Life ApplicationsReal Life ApplicationsReal Life ApplicationsReal Life ApplicationsReal Life ApplicationsReal Life Applications CompleteComplete NavigationNavigation ApplicationApplication.. CC bitfieldsbitfields.. CarCar RadioRadio ControlControl.. DESDES EncryptionEncryption // DecryptionDecryption.. ThreeThree differentdifferent modulesmodules fromfrom analoganalog telephonestelephones..ThreeThree differentdifferent modulesmodules fromfrom analoganalog telephonestelephones.. ReedReed –– SolomonSolomon (error(error correction)correction) encoderencoder // decoderdecoder.. PagerPager ProtocolProtocol.. RefrigeratorRefrigerator ControlControl.. BatteryBattery ChargerCharger.. EmbeddedEmbedded WebWeb ServerServer.. LabelLabel // ReciteRecite printerprinter.. 16-05-2013 Mahesh J. vadhavaniya 111

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