I have experimentally studied an unconventional field effect transistor (FinFET) with a gate length of 40 nm in the subthreshold regime. Prepared devices, build a cryogenics setup together with 3 Researchers, analysed and extracted experimental data and interpreted these using the Richardson model, Yuan Taur’s model and simulations of A.Burenkov et al.
I am proud to be the first with the following experimental evidence: (1) artificial corner effect (2) interrelated physical dimensions (punch through effect) (3) a good electrostatic gate to channel coupling for devices smaller than 40 nm which could be used for
ICs.
2. Outline
• Motivation
• MOSFET (analogy)
• shortening
• Bands
• doping
• materials joined
• undoped FinFET
• Application of an electric field
• Yuan Taur’s model
• Where does current flow?
• What is known in general
• Setup
• Results
• Punchthrough (VT fluctuations),
• Large/small conducting area
• Barrierheight in these regions
• Conclusions
2
3. Motivation
GL
• MOSFET- switch electronic signals
• Where ? Look at your mobile phones,
computers,……..
• And ask yourselves: Did it have the same size 50
years ago? The same speed maybe?
• Gordon Moore: shrink at certain
pace..
A human hair is 90 000 nm
thick • Smaller → Faster and Cheaper and
GL ~ 2000 smaller thus better
• But for how long?
• Nowadays: decreasing control of the current flowing in this structure
• Nowadays: new geometries for better control of the current flowing
in this structure
• We explore this control of current flow in a new geometry switch:
FinFET
3
4. Water analogy (1)
Water ↔ Current
When a wall present between source/drain reservoirs
is pulled up : water flows (on)
Good control over leakage through or over the wall and
a well set open/closed state.
4
5. MOSFET – a simple on/off switch
GL
Current flow – high/low gate voltage much as
a light switch functions
Materials are physically joined:
• Source – part where current flows from
• Drain – part where current flows to
Dimensions are 1000 000 • Gate – tune the on/off state of the device
smaller than the light switch
• Channel – region where current flows
Current
• Gate dielectric – isolation of the gate
0
VT gate voltage
5
6. Water analogy (2)
Analogy with care
Shortening of the canal will cause problems:
• water can flow under the closed wall
• building a wall might even be a problem
6
7. From MOSFET to FinFET via the scaling path
GL > 50 nm
solution < 50 nm
Undoped channel trigate FinFETs
Moore’s law
Good : the smaller the faster With better control over the
(1/GL), more switches in the entire Si body
same area (GL2)
Bad : (G and S/D) Leakage
currents, VT variations
7
8. Electric current ? Physicists think of bands first!
Conduction band edge
E2
gap EF
E1 Valence band edge
distance
EF is Fermi energy
atomic levels
Overlapping for example
orbitals
V ~ 1/r
2
Schrödinger's equation: − ∇2Ψ + V Ψ = EΨ
2m *
Pauli exclusion principle
8
9. From semiconducting to conducting
E0
Conduction band edge Conduction band edge
EF
EF
Valence band edge Valence band edge
Undoped n-doped Si shifts EF from midgap to EC
Silicon
highly doped Si - metal
9
10. Electronic structure of both joined
E0
eγ
Conduction band edge
Conduction band edge
EF EF
Valence band edge
Valence band edge
Undoped
n-doped Si
Silicon
Difference in valence and conduction band
results in built-in potential
10
11. Band structure of undoped channel trigate
nFinFET: flatband situation
HfSiO HfSiO
Si-body
Gate Gate
Fermi level
Ec n+ S/D
EF EF y
Ei
x
Ev z
Finwidth
• Band alignment
• Si is undoped and electrically isolated from A potential barrier results
the rest from source-to-drain
By lowering this barrier/wall by the gates close to
S/D Fermi level current will flow through the structure
11
12. Theoretical result (1): Yuan Taur
Screening of the gate field bend the bands
y
x
z
qψ
∂ 2ψ q
= ni e kT
∂z 2 ε Si
Current flows in the region where the source-to-drain barrier is
lowest
No experimental foundation of these predictions
12
13. Theoretical results (2): A.Burenkov et al. and F.J. Garcia et al.
y y
Y
y
z
Z
z
z
Sharp corners rounded corners
n
13
Z Z
14. What is known of this trigate FinFET ?
4nm2
< 50 nm
Proposal: Use undoped Si-body Corner effect
1. Flexible VT set by metal gate
2. good capacitive coupling over the
body
3. No Corner effect: round corners
4. S/D depletion regions could overlap
punchthrough (FW > GL)
Aim: experimental support for undoped
14
channel trigate nFinFETs
15. Study of temperature dependent switching behavior of
nFinFET
Richardson-Dushman equation:
*
e ⎛ Eb ⎞
G = SA *
T exp ⎜ − ⎟
kB ⎝ kBT ⎠
Y
y y
Z
z z
Large area Small area
From which the area where current flows, barrierheight and
capacitive coupling can be extracted
15
17. Dataset
= 40
nm
e ⎛ Eb ⎞
G = SA* T exp ⎜ − ⎟
kB ⎝ k BT ⎠
4 Different Finwidths: 25 nm, 55 nm, 125 nm and 875 nm
17
18. Conductance vs. gate voltage at 100 K
Linearity: thermionic
transport
Threshold voltage deviation
once FW > GL: Punchthrough
Leakage currents, typical for
Punchthrough
18
19. Large FinFET
GL
yj ydmax
LI
Decrease of GL wrt. S/D
FW = 3 μm < GL = 10 μm depletion region produces a
leakage path
No leakage current at 300 K
19
20. Active areas
Y
y y
Z
z z
Below VT Above VT
At threshold voltage around 14 nm2
for FW = 25 nm
20
21. Active areas
Y
y y
Z
z z
Below VT Above VT
• Small area at the interface
• Corners
n
Z Z
21
23. α , the coupling
α from stability
Device nr. FW (nm) α from fit
measurements
1 25 1 0,7
4 55 0,7 0,8
8 125 0,14 0,7
2 875 0,03 0,8
•Punchthrough → couplings do not coincide
•Small devices → good correspondence
Robustness
e Vg = -α Eb
23
24. Conclusions
We determined the control of current flow in an unconventional nano-
transistor with variable temperature measurements. It was predicted to
have better control.
•Wide devices show Punchthrough
•These undoped channel devices show an artificial Corner effect, which
could degrade device performance
•Two independent measurements, thermionic measurements and stability
diagram measurements, revealed same gate coupling
This work will be published
24