Model Based System Design PPT MODULE IV.pptx

Module IV
CONTROLAND TESTING METHODS
1/2/2024
SREC - EIE - 20EI253 - MODEL BASED
SYSTEM DESIGN
1

SRI RAMAKRISHNA ENGINEERING COLLEGE
VATTAMALAIPALAYAM, N.G.G.O. COLONY POST, COIMBATORE – 641 022.
DEPARTMENT OF ELECTRONICS AND INSTRUMENTATION ENGINEERING
Controller on Target and Plant on Target
20EI253 MODEL BASED SYSTEM DESIGN
Prepared By
Dr.B.Sharmila
Professor / EIE
Sri Ramakrishna Engineering College
Coimbatore - 22
1/2/2024
SYSTEM DESIGN
2
Module IV

MODULE IV
CONTROL AND TESTING METHODS
• Controller on target
• Plant on target
• Processor in the Loop (PIL) real-time simulations
• Model In Loop test (MIL)
• Code verification using Software In Loop test (SIL)
• Hardware In loop Test (HIL)
• HIL implementation using raspberry pi: Coupled
Tanks Model, Quarter Car Model
• FPGA based Hardware in Loop simulation (HIL) for
Power Electronics
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SYSTEM DESIGN
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On Target Verification
• On-target testing means testing the application in its
target environment.
• It may also be referred to as host-target testing or cross-
testing.
• On-host testing means testing the application on a host
computer (such as the development system used to build
the application).
• This may also be referred to as host-host testing.
• The key principle behind testing an application on-target
is that code is executed in the environment for which it
was designed.
• Rather than in an environment where it was never intended
to be executed.
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On-target verification of embedded
systems difficult
• Every embedded system is different
• There are a huge range of possible applications for
embedded systems, ranging from very simple
• Monitoring the mirror switches on your car door
• controlling the flight control system of an
aerodynamically unstable fighter jet
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systems difficult
Embedded Processor and OS
• There are many different processor families (different
instruction sets, architectures) – unlike PCs which use slight
variations on a single architecture, which is also backwards
compatible with the original PC architecture from the mid
1980s.
• Different hardware configurations (different memory
layouts, different peripherals) exist – although PCs can
provide different hardware configurations, These are
abstracted away by the OS.
• It’s not necessary, for example, to know where in memory
to put your application when you build the software
• There are many real-time operating systems – unlike
PCs, which use a much smaller number (e.g. Windows, Linux
or Mac OS for desktops/laptops)
• Real-time operating systems also have varying levels
of complexity - some are barely a scheduler, while others are
much more complex.
• Some are modifications of existing desktop operating
systems (e.g. lots are based on the Linux kernel). Some are
commercial products.
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systems difficult
Real-time embedded systems often have resource
limitations
• They are much slower devices
• Devices with a real-time requirement can’t do single step
debugging, because the plant connected to the device will
break
• Much less memory is available
• Communication to the outside world is limited.
• PCs/phones have nice big graphical displays - an embedded
system might only have a few IO pins and a couple of
LEDs
• Real-time embedded systems are fixed applications. Unlike a
PC, it’s often not possible to run a verification tool on an
embedded system – so any data collected must be transferred
to a separate PC for analysis.
This is a challenge for anyone looking to extract enough
information to perform on-target analysis
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Controller on Target
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STEPS INVOLVED IN CONTROLLER ON
TARGET
Developed mathematical model of
controller will run on the processor
Real time input is given to the processor.
Now the processor act as a real time
controller
On this condition, the performance of
the controller is evaluated with the
project requirement

Plant on Target
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STEPS INVOLVED IN PLANT ON TARGET
Developed mathematical model of plant
(System Model) will run on the processor
Now the processor act as a real time plant
The real time input will be given to the
processor
The model inside the processor will
predict the plant (System) behaviour

Processor in the Loop real-time simulations (PIL)
Prepared by :
Dr.B.Sharmila,
Professor / EIE
Coimbatore 22.
1/2/2024
SYSTEM DESIGN
10
Module IV

PIL (Process In Loop Test)
• This step incorporates changes to the controller code
for embedded hardware features that allows execution
and tuning on the target micro-controller or DSP.
• PIL setup involves
• Loading the compiled object code onto the
target processor or DSP
• Then run the simulations on the plant model
for verification.
1/2/2024 Dr.B.Sharmila- UI Bridge - SIL, PIL and HIL 11

PIL (Process In Loop Test)
• This is a non-real time setup
• Hence allows execution of large number of
V&V test suits to evaluate embedded CPU/DSP
capability to run controller algorithms.
• If there are differences between SIL and PIL
results, then PIL object code is fine-tuned (for
example) for fixed-point precision, memory
footprint or compiler optimization flags

Model In Loop test (MIL)
Prepared by :
Dr.B.Sharmila,
Professor / EIE
Coimbatore 22.
1/2/2024
SYSTEM DESIGN
13
Module IV

Model in the Loop (MIL) Test
• Model-in-the-loop testing (MIL) and
simulation is a technique used to abstract the
behaviour of a system or sub-system in a
way that this model can be used to test,
simulate and verify that model.
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Develop a model of the actual plant
(hardware) in a simulation environment
Simulink, which captures most of the
important features of the hardware system.
Plant model is created
Develop the controller model
Verify if the controller can control the plant
(which is the model of the motor in this case)
as per the requirement

• This step is called Model-in-Loop (MIL)
• Process,
• Testing the controller logic on the simulated
model of the plant
• If your controller works as desired
• Should record the input and output of the
controller which will be used in the later stage
of verification
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Model in Loop Test
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Code verification using Software In Loop (SIL) test
Prepared by :
Dr.B.Sharmila,
Professor / EIE
Coimbatore 22.
1/2/2024
SYSTEM DESIGN
18
Module IV

SIL (Software In Loop Test)
• In this case, the model is adapted further according
to the end goals of the embedded platform.
• The controller model is coded in C or C++ (can be auto-
generate code)
• Then inserted back into the simulation environment to
evaluate it along with the plant simulation.

SIL and PIL
• In a SIL or PIL simulation, code is generated
for either the top model or part of the model.
• With SIL, this code is compiled for and
executed on your development computer.
• With PIL, the code is cross-compiled for the
target hardware and runs on the target
processor.

SIL vs PIL
Type of SIL or PIL
Simulation
What Happens in SIL Simulation What Happens in PIL Simulation
Specify through:
•Top-model simulation mode
•Model block Simulation
mode parameter
• Test behavior of generated source code
code on development computer.
Simulation does not test code
compiled for target hardware because
code is compiled for the development
computer (different compiler and
different processor architecture than
the target).
• Generated production code compiled
and executed on development
computer as separate process,
independent of MATLAB
®
process.
• Execution is host/host and non-real
time.
• Test object code that you intend
to deploy in production on either
either real target hardware or an
instruction set simulator.
• On development computer,
generated production code cross-
cross-compiled for target. Object
Object code downloaded and
executed on target processor or
instruction set simulator.
• Execution is host/target and
non-real time.
Use SIL or PIL block created
from subsystem.
• Simulation runs compiled object code
through S-function. S-function
communicates with object code
executing as standalone application on
on development computer. SIL block
execution is independent of the
MATLAB process.
• Execution is host/host and non-real
time.
• Simulation runs cross-compiled
object code through S-function
on development computer. S-
function communicates with
object code executing as
standalone application on target
processor or instruction set
simulator.
• Execution is host/target and
non-real time.

Hardware In loop Test (HIL)
Prepared by :
Dr.B.Sharmila,
Professor / EIE
Coimbatore 22.
1/2/2024
SYSTEM DESIGN
22
Module IV

Hardware-in-the-loop (HIL)
• Hardware-in-the-loop (HIL) simulation is a
type of real-time simulation.
• HIL simulation is used to test controller design.
• HIL simulation shows how controller responds
in real time to realistic virtual stimuli.
• HIL can also be used to determine if your
physical system (plant) model is valid.

• After the controller code has been verified using PIL;
• Next step usually involves substituting the plant model
with the actual system (or a lab prototype) or a real-
time simulator running the plant model
• For example,
• If a DC motor speed controller is being designed then
the controller code is deployed on the micro-controller
or DSP board that is then interfaced to a real DC motor
by connecting the inputs and outputs at the interface
points such as sensors and power electronics
components.
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• HIL testing is one of the last integration levels
that allows debugging and evaluation of
functional and operational tests in a
manageable way in a real-time environment.
• Often a substantial amount of software based
test automation and logging as well as
hardware interfacing components are required
to implement a reliable HIL setup.
• The PIL setup is comparatively easier and
require less hardware and software resources.
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Using Simulator for Hardware
• Mathematical model of the system is
developed and same is programmed into
the Microcontroller
• Now, the Microcontroller now act like
that system.
• In this example, a Two Tank system is
modelled and programmed in Arduino
nano
• Now Arduino act as Two Tank System
• From this simulation they found,
• Liquid levels to rise from 2.7 meters
to 3.3 meters when the flow rate was
was increased from 1 cubic meter per
per sec to 1.11 cubic meter per sec
https://reference.wolfram.com/langu
age/MicrocontrollerKit/workflow/HI
L

HIL implementation using
raspberry pi: coupled tanks model, quarter car model
Prepared by :
Dr.B.Sharmila,
Professor / EIE
Coimbatore 22.
1/2/2024
SYSTEM DESIGN
29
Module IV

Coupled Tank Model
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Coupled Tank Parameters
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State space model of the system
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Discrete Model of the system
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Block diagram of HIL Implementation
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Response of the plant with step change
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Quarter Car Model
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State Space Model
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Discrete model
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HIL Setup
• https://www.wolfram.com/language/12/microcontroll
er-kit/hil-simulation-of-a-quarter-car-suspension-
model.html?product=language
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Response of the system
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FPGA based Hardware in Loop simulation (HIL) for Power
Electronics
Prepared by :
Dr.B.Sharmila,
Professor / EIE
Coimbatore 22.
1/2/2024
SYSTEM DESIGN
41
Module IV

Need for FPGA in HIL
• Real-time simulation of power electronic
converter systems, in the context of HIL
testing, is a challenging task.
• This is due to:
1. The computational burden imposed on the
simulator hardware due to the inherent switching
nature of power electronic converters, and
2. The asynchronous digital interface between the
controller PWM outputs and the simulator inputs.
PWM gating signals generated by the controller
rarely coincides with the real-time simulation
time-grid. Switching events are usually imposed
by the controller in-between two simulation
instances.
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2. The simulator, unlike an actual system, cannot
instantaneously respond to the PWM outputs of
the controller and only accounts for it at the end
of the simulation time-step, thus, errors are
introduced to the simulation results.
3. The percentage error due to ITS is a function of
the simulation time-step of the simulator and the
switching frequency of the controller.
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• This problem is more pronounced in multilevel
converter systems,
• particularly when the voltage balancing task of the
converter is carried out through the modification of
the switching functions, with no requirement to
additional power circuitry.
• With the increase in the switching events per
simulation time-step, it will be very likely to have
multiple switching events imposed by the controller
in between two simulation instances. This
phenomenon is called multiple inter-simulation
time-step switching (MITS).
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• Certain issues make running a model real-time
challenging
• Minimum time step
• Model complexity
• Specialized solvers
• It is all about time step
• Thermal – seconds
• Mechanical – milliseconds
• Power Systems – sub-milliseconds
• Power Electronics – microseconds
• Radar – nanoseconds
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• Typical real-time CPU based solutions run in
the sub-millisecond range
• FPGA based solutions run in the microsecond
range
• bordering sub-microsecond for specific applications
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The Need for Small Time Step
Simulations
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Path to FPGA Accelerated Real-time:
Simscape
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Example : Solar Inverter for Real Time
Testing
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Testing
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Testing
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Testing
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Testing
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Testing
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Testing
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Testing
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Testing
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Testing
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Testing
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Testing
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Testing
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Testing
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Example Video : dSpace
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https://www.youtube.com/watch?v=JTDYQfrR
Xl8
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References
• https://www.design-
reuse.com/articles/42548/embedded-software-
verification-validation-in-model-based-
development.html
• https://in.mathworks.com/matlabcentral/answers/4402
77-what-are-mil-sil-pil-and-hil-and-how-do-they-
integrate-with-the-model-based-design-approach
• https://in.mathworks.com/discovery/model-based-
testing.html
• http://ifatwww.et.uni-
magdeburg.de/ifac2020/media/pdfs/2243.pdf
• https://www.mathworks.com/content/dam/mathworks/
mathworks-dot-
com/images/events/matlabexpo/kr/2019/power-
electronics-hil-testing-using-simscape-to-hdl-
conversion.pdf
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Thank you
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