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BITS Pilani
Pilani|Dubai|Goa|Hyderabad
Electrical Sciences
Dr.G.MEENAKSHI SUNDARAM
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Response of the circuits
Outline for today’s lecture:
1. Second order RLC circuit
2. Damping of RLC circuits
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Basic Concepts
Finding initial and final values
• Objective: Find v(0), i(0), dv(0)/dt, di(0)/dt, i(∞), v(∞)
• Two key points: (a) The direction of the current i(t)
(b) the polarity of voltage v(t).
• v and i are defined according to the passive sign convention.
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Basic Concepts
• The capacitor voltage is always continuous:
v(0+) = v(0-)
• The inductor current is always continuous:
i(0+) = i(0-)
Learning objectives:
• Determine the natural responses of parallel and series RLC circuits.
• To understand the initial conditions in an RLC circuit and use them to determine the
expansion coefficients of the complete solution.
• What do the response curves of over, under, and critically-damped circuits look like?
How to choose R, L, C values to achieve fast switching or to prevent overshooting
damage.
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Second Order Circuits
Series RLC circuit: with initial inductor current
i(0) A and initial capacitor voltage v(0) V
Applying KVL for the given circuit
0
)
(
)
(
0
)
(





L
L
C Ri
dt
t
di
L
t
v
t
v
)
(
)
(
)
(
)
(
t
i
t
i
dt
t
dv
C
t
i
C
L
C
C


0
)
(
)
(
)
(
2
2


 t
v
dt
t
dv
RC
dt
t
v
d
LC C
C
C
0
)
(
1
)
(
)
(
2
2


 t
v
LC
dt
t
dv
L
R
dt
t
v
d
C
C
C
Consider two energy storage elements in a circuit, these circuits are described by second order
Linear differential equations.
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
General Solution
Let us assume the vC(t) = Aest and substitute in
the above differential equation.
0
2


 st
st
st
e
LC
A
se
L
AR
e
As
0
)
1
( 2



LC
s
L
R
s
Aest
0
1
2



LC
s
L
R
s
LC
L
R
n
1
2




Let us assume
0
2 2
2


 n
s
s 

The above equation is in the following general
form
𝑑2𝑦(𝑡)
𝑑𝑡
+ 2 ∝
𝑑𝑦 𝑡
𝑑𝑡
+ 𝑤𝑛
2𝑦 t = 0
0
1
)
(
)
(
2
2


 st
st
st
Ae
LC
dt
Ae
d
L
R
dt
Ae
d
Therefore the quadratic equation
Becomes as given below
This quadratic equation is known
as Characteristic equation
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
General Solution (con’t…)
LC
L
R
L
R
s
LC
L
R
L
R
s
1
2
2
1
2
2
2
2
2
1




















2
2
2
2
2
1
n
n
s
s














0
2 2
2


 n
s
s 

Using the quadratic roots formula for the above characteristic equation we have below
Two solutions
𝑠 =
−2 ∝ ∓√(4 ∝2 −4𝑤𝑛
2 )
2
=−∝ ∓√(∝2 −𝑤𝑛
2)
Substituting the values of α and ωn for 𝑠1 and 𝑠2
We get
Therefore the two solution for the above second order differential equation are 𝐴1𝑒𝑠1𝑡
And 𝐴2𝑒𝑠2𝑡. Where A1 and A2 are arbitrary constants
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
General Solution (con’t…)
t
s
t
s
C
C
C
t
s
C
t
s
C
e
A
e
A
t
v
t
v
t
v
e
A
t
v
e
A
t
v
2
1
2
1
2
1
2
1
2
2
1
1
)
(
)
(
)
(
)
(
)
(






Therefore voltage across the capacitor will be given by below equations
Use the Initial conditions to solve for A1 and A2.
– Since the voltage across a capacitor must be a continuous function of time.
– Also we know that
   
S
s
s
s
s
S
o
C
o
C
o
C
o
C
V
A
A
e
A
e
A
V
t
v
t
v
t
v
t
v












2
1
0
2
0
1
2
1
2
1
)
(
)
(
)
(
)
(
 
   
0
0
)
(
)
(
)
(
)
(
2
2
1
1
0
2
2
0
1
1
2
1
2
1








A
s
A
s
e
A
s
e
A
s
t
v
t
v
dt
d
dt
t
dv
C
t
i
s
s
s
s
o
C
o
C
o
C
o
C
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Damping
Depending on the relative values of α and ωn, the values of 𝑠1 and 𝑠2 can be either real or
Complex numbers.
α > ωn:
∝2 −𝑤𝑛
2 > 0
Over Damping
2
4
1
2 R
L
C
LC
L
R




t
s
t
s
c e
A
e
A
t
v 2
1
2
1
)
( 


The voltage waveform is as shown
In the figure
Overdamped response
2
2
2
2
2
1
n
n
s
s














LC
L
R
n
1
2




Therefore 𝑠1 and 𝑠2are negative and real
numbers.
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Damping
α = ωn:
∝2 −𝑤𝑛
2 = 0
⇒ 𝑠1 = 𝑠2 = -α R
L 2


  t
c e
A
t
A
t
v 



 2
1
)
(
Critically damped:
The voltage waveform is as shown
In the figure
Critically-damped response
LC
L
R 1
4 2
2


C
L
R 2


LC
L
R
n
1
2




BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Damping
α < ωn:
∝2 −𝑤𝑛
2 < 0
Therefore 𝑠1 and 𝑠2are complex numbers.
Under Damping
2
4
1
2 R
L
C
LC
L
R




 
 





















d
n
d
n
j
s
j
s










2
2
2
2
2
1
2
2
where 

 
 n
d
 
sin
cos
)
( 2
1 t
A
t
A
e
t
v d
d
t
c 



 
The voltage waveform is as shown
In the figure
Under damped response
Note:
It is clear that the natural response for this case is exponentially damped but also
oscillatory in nature. The response has a time constant of 1/α and a period of T =
2π/ωd.
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Over Damped Critically Damped Under Damped
Condition α > ωn α = ωn α < ωn
Voltage
Waveform
t
s
t
s
c e
A
e
A
t
v 2
1
2
1
)
( 

sin
cos
)
(
2
1









 
t
A
t
A
e
t
v
d
d
t
c



  t
c e
A
t
A
t
v 


 2
1
)
(
2
2
2
2
2
1
n
n
s
s














𝑠1 = 𝑠2 = -α = -L/2R
 
 























d
n
d
n
j
s
j
s










2
2
2
2
2
1
1
s 2
s
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Angular Frequencies
wn is called the undamped natural frequency
– The frequency at which the energy stored in the capacitor flows to the inductor and
then flows back to the capacitor. If R = 0 Ω, this will occur forever.
wd is called the damped natural frequency
– Since the resistance of R is not usually equal to zero, some energy will be dissipated
through the resistor as energy is transferred between the inductor and capacitor.
• α determined the rate of the damping response.
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Conclusions:
(i) The damping effect is due to the presence of resistance R.
• The damping factor α determines the rate at which the response is damped.
• If R = 0, then α = 0 and we have an LC circuit with 1/ LC as the undamped natural
frequency. The response in such a case is undamped and purely oscillatory.
• The circuit is said to be lossless because the dissipating or damping element (R) is
absent.
• By adjusting the value of R, the response may be made undamped, overdamped,
critically damped or underdamped.
(ii) Oscillatory response is possible due to the presence L and C.
• The damped oscillation exhibited by the underdamped response is known as
ringing. It stems from the ability of the storage elements L and C to transfer energy
back and forth between them.
(iii) The overdamped has the longest settling time because it takes the longest time to
dissipate the initial stored energy.
• If we desire the fastest response without oscillation or ringing, the critically
damped circuit is the right choice.
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Examples
Problem 1: For the given circuit, R= 40 Ω, L = 4 H, and C = 1/4 F. Calculate the characteristic
roots of the circuit. Is the natural response overdamped, underdamped, or critically
damped?
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Examples
s1
s2
52
1
 5
 5 52
1
s1 = -0.101; s2 =-9.899
This is also evident from the fact that the
roots are real and negative.
The roots are,
R= 40 Ω, L = 4 H, C = 1/4 F =>
2
0
2
2
2
0
2
1














s
s
1
1
;
5
2
0 



LC
L
R


Since α > ω0, we conclude that the response is overdamped. The roots are real and
negative.
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Examples
Problem 2: Find i(t) for t > 0. Assume that the circuit has reached steady state before the
switch is opened.
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Examples
Solution:
(a) for t < 0 (b) for t > 0.
Under-damped response
i(0) 
10
4 6 0
2L
1
LC

R
 6; 10
s  6 62
100
1
s2  6  62
100
s1,2  6  j8
v(0)  6i(0) 6V
1A;  
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Examples
Hence,
A1 and A2 are found using the initial conditions.
At t = 0, i(0) = 1 = A1
i(t)  e6t
[A(cos8t) A (sin8t)]
1 2
di
dt
Taking the derivativeof i(t)
dt
t0  
1
[Ri(0)v(0)]
di

e6t
(8)[A (sin 8t)  A (cos8t)]
1 2
t > 0
L
 0A/ s
6e6t
[A(cos8t) A (sin8t)]
1 2
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Examples
for t > 0
0  6(Α1 0)  8(0  A2)
substituting Α11,
0  6  8A2
 A2  0.75
Substituting the values of A1 and A2 yields the
complete solutionas,
i(t)  e6t
[(cos8t)0.75(sin8t)]A
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Examples
Problem 3: The switch was closed for a long time and opened at t = 0.
Find: (a) i(0+), v(0+), (b) di(0+) ∕dt, dv(0+) ∕dt, (c) i(∞), v(∞).
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Examples
i(0-)=(12)/(4+2)=2A, v(0-) =2i(0-) =4V
As the inductor current and the capacitor voltage cannot change abruptly,
i(0+) = i(0-) = 2 A, v(0+) = v(0-) = 4V
At t = 0+, the switch is open, same current flows through both the inductor and capacitor.
Hence, iC(0+) = i(0+) = 2 A
(a) t = 0- (b) t = 0+ (c) t → ∞
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Examples
vL is obtained by applying KVL in theloop,
−12 + 4i(0+) + vL(0+) + v(0+) = 0
=> vL(0+) = 12 − 8 − 4 = 0
=>
c
dt dt C
i (0 )
dv(0 )
dt
c 2
C 0.1


Since, i  C
dv
;
dv

ic
   20V/s
L
Also, v  L
di
;
di

vL
dt dt L
v (0 ) 0
0.25
di(0 )
dt
L
L
 
   0A/s
t = 0+
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Examples
Fort>0,
• The circuit first undergoes through some transients.
• As t → ∞, the circuit reaches steady state. The inductor acts
like a short circuit and the capacitor like an open circuit.
i(∞) = 0 A, v(∞) = 12V
t → ∞
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Step Response Of Series RLC
Circuit
 The step response is obtained by the sudden application of a
DC source as shown below
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
s
dt
L
di
 Ri  v V
 Applying KVL around the loop for t > 0,
dt
where i  C
dv
 Substituting for i in the above equation and rearranging terms,
s
dt2
L dt LC LC
d 2
v

R dv

v

V
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
 The solution of the differential equation has two components:
 Transient response vt(t): time-varying component of the total
response that eventually dies out
 Steady-state response vss: final steady state value at t → ∞
(t)
v(t)  vt (t)  vss
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
 In order to determine the transient part of solution, we let
v  Aest
where, A and s are constants to be determined
 Substituting these values and carrying out the necessary
differentiations we obtain,
As2
est 
AR
sest

A
est
 0
L LC
2
st
Or, Ae

s 
R
s 
1   0
 L LC 
 
 The two roots are,
1
R
LC
 R 
2
 R 
2
s1  
2L
 
1
,s  
R

LC 2
2L

 2L  2L
   
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
 A more compact way of expressing the roots is,
s   2
2
,s   2
2
1 0 2 0
where, 0
2L
1
LC

R
, 
The roots s1 and s2 are called natural frequencies, measured in nepers per second (Np/s),
because they are associated with the natural response of the circuit
 In terms of α and ω0, the response can be written as,
0
s2  2s2
 0
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Total Response Of Series RLC
Circuit
 Steady state response: is the final value of v(t)
vss (t)  v() Vs
The final value of the capacitor voltage is the same as the source voltage Vs
(capacitor becomes open circuit in steady state).
 Thus, the complete solution is,
v(t) V  Aes1t
 A es2t
s 1 2
v(t) V  (A  A t)et
s 1 2
v(t) V  ( A cost A sint)et
s 1 d 2 d
The values of the constants A1 and A2 are obtained from the
initial conditions: v(0) and dv(0)∕dt.
(Overdamped)
(Critically damped)
(Underdamped)
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Examples
Problem 1:
For the circuit shown, find v(t) and i(t) for t > 0.
Assume that the switch was closed for a long time before opening. Consider three cases:
(a) R = 5 Ω, (b) R = 4 Ω, and (c) R = 1 Ω.
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Examples
Solution:
(a): R = 5 Ω
For t < 0, the capacitor behaves like an open circuit while the inductor
acts like a short circuit. The initial current through the inductor is,
i(0) 
24
 4A
51
5 Ω
and the initial voltage across the capacitor is the same as the voltage
across the 1Ω resistor, v(0)  1i(0) 4V
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Examples
For t > 0, the switch is opened, so that 1Ω resistor disconnected.
The characteristic roots are determined as follows:
0

R
  2.5,    2
5
2L 21
1 1
LC 10.25
1,2 0
s   2
2
 1,4
Since α > ω0, we have the overdamped natural response.
ss
The total response is therefore  ( Aet
 A e4t
)
1 2
vss is the final value of the capacitor voltage = 24V.
=> v(t)  24  (Aet
 A e4t
)
1 2
5 Ω
v(t)  v
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Examples
v(0)  4  24  A1  A2 =>
The current through the inductor cannot change
abruptly and is the same current through the
capacitor at t = 0+ because the inductor and
capacitor are now in series. Hence,
i(0)  C
dV(0)
 4,
dV(0)

4

4
dt dt C 0.25
16
Determine A1 and A2 via initial conditions:
1 2
dt
dV(0)
16  A  4A => A1 = −64/3, A2 = 4/3
3
v(t)  24 
4
(16et
 e4t
)
dt
i(t)  C
dV
3
i(t) 
4
(4et
 e4t
)
5 Ω
20  A1  A2
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Examples
i(0)   4.8A
24
4 1
CASE 2: R = 4 Ω
The initial current through the inductor is
and the initial voltage across the capacitor is
v(0)  1;i(0) 4.8V 4 Ω

R
  2
4
2L 21
For the characteristic roots,
ω0 =2
s1 = s2 = −α = −2 => critically damped response
v(t)  v  (A  A t)e2t
 v(t)  24 (A  A t)e2t
ss 1 2 1 2
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Examples
Since i(0) = C dv(0)∕dt = 4.8,
1 2 2
dt
dV
 (2A  2tA  A )e2t
1 2
dt
dV (0)
 19.2 2A  A 2
=> A = 19.2 v(t)  24 19.2(1 t)e2t
The inductor current is the same as the capacitor current i(t) = Cdv(t)∕dt multiplying by
C = 0.25 and substituting the values of A1 and A2 intodv∕dt
i(t)  (4.8  9.6t)e2t
v(0)  4.8  24  A1 A1 19.2 4 Ω
Thus,
dV (0) 
4.8  19.2
dt C
To find A1 and A2, we use the initial conditions
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Examples
CASE 3: R = 1 Ω
24
The initial inductor current is 12A
11
v(0) 1;i(0) 12V

R
  0.5
1
2L 21
Since α = 0.5 < ω0 = 2, we have the under-damped response
s   2
2
 0.5 j1.936
1,2 0
The total response is therefore,
v(t)  24(A cos1.936t  Asin1.936)e0.5t
and the initial voltage across the capacitor is the same as the
voltage across the 1Ω resistor,
i(0) 
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Examples
v(0)  12  24  A1 A112
Since, i(0) = C dv(0)∕dt = 12,
dV (0)

12
 48
dt C
1 2 1 2
dt
dv
 e0.5t
(1.936Asin1.936t 1.936Acos1.936t) 0.5e0.5t
( Acos1.936tAsin1.936t)
2 1
dt
dv(0)
48(0 1.936 A) 0.5(A0)
Substituting A1 = −12 gives A2 =21.694 v(t) 24(21.694sin1.936t12cos1.936t)e0.5t
Multiplying by C = 0.25 and substituting the values of A1and A2 into dv∕dt
i(t)  (3.1sin1.936t 12cos1.936t)e0.5t
1 Ω
In order to determine A1 andA2,
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Examples
(R=1Ω)
(R = 4 Ω)
(R = 5 Ω)
Critically damped circuit
gives fastest response
without any over-shooting
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Step Response Of Parallel
RLC Circuit
 With the sudden application of a DC current, we need to determine i
in the following circuit.
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
 Applying KCL at the top node for t > 0,
s
V
 i C
dV
 I
R dt dt
Here, v  L di
 Substituting for v and dividing by LC, we get
s
d2
i

1 di

i

I
dt2
RC dt LC LC
 The complete solution consists of the transient response it(t) and the
steady-state response iss,
i(t)  it (t) iss
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
 We obtain the characteristic equation by replacing the first derivative
by s and the second derivative by s2,
1
RC LC
s2

1
s   0
 The roots of the characteristic equation are
1,2
s   2
2
where, 0
1
2RC
1
LC
 , 
 There are three possible solutions, depending on whether
α > ω0, α = ω0, or α < ω0
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Total Response Of Parallel RLC
Circuit
The final steady-state value of the current through the inductor is the
same as the source current Is
 The total response can be given as,
i(t)  I  Aes1t
 A es2t
s 1 2
i(t)  I  (A  A t)et
s 1 2
i(t)  I  ( A cost A sint)et
s 1 d 2 d
The constants A1 and A2 in each case can be determined from the
initial conditions i(0) and di(0)∕dt
(Overdamped i.e. α > ω0)
(Critically damped i.e. α = ω0)
(Underdamped i.e. α < ω0)
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Examples
Problem:In the circuit shown, find i(t) and iR(t) fort> 0.
Assume theswitch is openforalongtimebefore closing.
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Solution:
For t < 0, the switch is open, and the circuit is
partitioned intotwo independent sub-circuits.The4-A current
flows through the inductor
i.e.
i(0)  4A
Since 30u(− t) = 30 when t < 0 and = 0 when t > 0,
the voltage source is operative for t < 0. By voltage division, the initial
capacitor voltage is
v(0)  (30) 15V
20
20 20
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
For t>0, equivalent parallel
resistance
1,2 0
  2
2
 6.25 39.0625 6.25  6.25 5.7282
 s1 11.978, s2 0.5218
Since α > ω0, we have the over-damped case
s 1 2
 i(t)  I  Ae11.978t
 A e0.5218t
R = 20||20 = 10 Ω

1
2RC

1
 6.25
2108103

o 
1
LC
 1
 2.5
208103
The characteristic roots are: s
s
where I = 4 is the final value of i(t).
We now use the initial conditions to determine A1 andA2.
At t = 0, i(0)  4  4  A1 A2  A2 A1
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Taking thederivativeof i(t),
1 2
dt
di
 11.978Ae11.978t
 0.5218A e0.5218t
so that at t = 0,
di(0)
 11.978A  0.5218A,
dt 1 2
L
di(0)
 v(0) 15,
dt
di(0)

15

15
0.75
dt L 20
Substituting A1 = -A2 we get,
0.75  (11.9780.5218)A2 A2 0.0655
Thus the complete solution is i(t)  4  0.0655(e0.5218t
 e11.978t
)A
From i(t) we obtain v(t) = L di∕dt,
R 20 20 dt
i (t) 
v(t)

L di
 0.785e11.978t
 0.0342e0.5218t
A

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Electrical Sciences_ Session6-7 (Response of 2nd order Circuits).pdf

  • 2. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Response of the circuits Outline for today’s lecture: 1. Second order RLC circuit 2. Damping of RLC circuits
  • 3. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Basic Concepts Finding initial and final values • Objective: Find v(0), i(0), dv(0)/dt, di(0)/dt, i(∞), v(∞) • Two key points: (a) The direction of the current i(t) (b) the polarity of voltage v(t). • v and i are defined according to the passive sign convention.
  • 4. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Basic Concepts • The capacitor voltage is always continuous: v(0+) = v(0-) • The inductor current is always continuous: i(0+) = i(0-) Learning objectives: • Determine the natural responses of parallel and series RLC circuits. • To understand the initial conditions in an RLC circuit and use them to determine the expansion coefficients of the complete solution. • What do the response curves of over, under, and critically-damped circuits look like? How to choose R, L, C values to achieve fast switching or to prevent overshooting damage.
  • 5. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Second Order Circuits Series RLC circuit: with initial inductor current i(0) A and initial capacitor voltage v(0) V Applying KVL for the given circuit 0 ) ( ) ( 0 ) (      L L C Ri dt t di L t v t v ) ( ) ( ) ( ) ( t i t i dt t dv C t i C L C C   0 ) ( ) ( ) ( 2 2    t v dt t dv RC dt t v d LC C C C 0 ) ( 1 ) ( ) ( 2 2    t v LC dt t dv L R dt t v d C C C Consider two energy storage elements in a circuit, these circuits are described by second order Linear differential equations.
  • 6. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 General Solution Let us assume the vC(t) = Aest and substitute in the above differential equation. 0 2    st st st e LC A se L AR e As 0 ) 1 ( 2    LC s L R s Aest 0 1 2    LC s L R s LC L R n 1 2     Let us assume 0 2 2 2    n s s   The above equation is in the following general form 𝑑2𝑦(𝑡) 𝑑𝑡 + 2 ∝ 𝑑𝑦 𝑡 𝑑𝑡 + 𝑤𝑛 2𝑦 t = 0 0 1 ) ( ) ( 2 2    st st st Ae LC dt Ae d L R dt Ae d Therefore the quadratic equation Becomes as given below This quadratic equation is known as Characteristic equation
  • 7. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 General Solution (con’t…) LC L R L R s LC L R L R s 1 2 2 1 2 2 2 2 2 1                     2 2 2 2 2 1 n n s s               0 2 2 2    n s s   Using the quadratic roots formula for the above characteristic equation we have below Two solutions 𝑠 = −2 ∝ ∓√(4 ∝2 −4𝑤𝑛 2 ) 2 =−∝ ∓√(∝2 −𝑤𝑛 2) Substituting the values of α and ωn for 𝑠1 and 𝑠2 We get Therefore the two solution for the above second order differential equation are 𝐴1𝑒𝑠1𝑡 And 𝐴2𝑒𝑠2𝑡. Where A1 and A2 are arbitrary constants
  • 8. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 General Solution (con’t…) t s t s C C C t s C t s C e A e A t v t v t v e A t v e A t v 2 1 2 1 2 1 2 1 2 2 1 1 ) ( ) ( ) ( ) ( ) (       Therefore voltage across the capacitor will be given by below equations Use the Initial conditions to solve for A1 and A2. – Since the voltage across a capacitor must be a continuous function of time. – Also we know that     S s s s s S o C o C o C o C V A A e A e A V t v t v t v t v             2 1 0 2 0 1 2 1 2 1 ) ( ) ( ) ( ) (       0 0 ) ( ) ( ) ( ) ( 2 2 1 1 0 2 2 0 1 1 2 1 2 1         A s A s e A s e A s t v t v dt d dt t dv C t i s s s s o C o C o C o C
  • 9. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Damping Depending on the relative values of α and ωn, the values of 𝑠1 and 𝑠2 can be either real or Complex numbers. α > ωn: ∝2 −𝑤𝑛 2 > 0 Over Damping 2 4 1 2 R L C LC L R     t s t s c e A e A t v 2 1 2 1 ) (    The voltage waveform is as shown In the figure Overdamped response 2 2 2 2 2 1 n n s s               LC L R n 1 2     Therefore 𝑠1 and 𝑠2are negative and real numbers.
  • 10. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Damping α = ωn: ∝2 −𝑤𝑛 2 = 0 ⇒ 𝑠1 = 𝑠2 = -α R L 2     t c e A t A t v      2 1 ) ( Critically damped: The voltage waveform is as shown In the figure Critically-damped response LC L R 1 4 2 2   C L R 2   LC L R n 1 2    
  • 11. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Damping α < ωn: ∝2 −𝑤𝑛 2 < 0 Therefore 𝑠1 and 𝑠2are complex numbers. Under Damping 2 4 1 2 R L C LC L R                              d n d n j s j s           2 2 2 2 2 1 2 2 where      n d   sin cos ) ( 2 1 t A t A e t v d d t c       The voltage waveform is as shown In the figure Under damped response Note: It is clear that the natural response for this case is exponentially damped but also oscillatory in nature. The response has a time constant of 1/α and a period of T = 2π/ωd.
  • 12. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Over Damped Critically Damped Under Damped Condition α > ωn α = ωn α < ωn Voltage Waveform t s t s c e A e A t v 2 1 2 1 ) (   sin cos ) ( 2 1            t A t A e t v d d t c      t c e A t A t v     2 1 ) ( 2 2 2 2 2 1 n n s s               𝑠1 = 𝑠2 = -α = -L/2R                            d n d n j s j s           2 2 2 2 2 1 1 s 2 s
  • 13. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Angular Frequencies wn is called the undamped natural frequency – The frequency at which the energy stored in the capacitor flows to the inductor and then flows back to the capacitor. If R = 0 Ω, this will occur forever. wd is called the damped natural frequency – Since the resistance of R is not usually equal to zero, some energy will be dissipated through the resistor as energy is transferred between the inductor and capacitor. • α determined the rate of the damping response.
  • 14. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Conclusions: (i) The damping effect is due to the presence of resistance R. • The damping factor α determines the rate at which the response is damped. • If R = 0, then α = 0 and we have an LC circuit with 1/ LC as the undamped natural frequency. The response in such a case is undamped and purely oscillatory. • The circuit is said to be lossless because the dissipating or damping element (R) is absent. • By adjusting the value of R, the response may be made undamped, overdamped, critically damped or underdamped. (ii) Oscillatory response is possible due to the presence L and C. • The damped oscillation exhibited by the underdamped response is known as ringing. It stems from the ability of the storage elements L and C to transfer energy back and forth between them. (iii) The overdamped has the longest settling time because it takes the longest time to dissipate the initial stored energy. • If we desire the fastest response without oscillation or ringing, the critically damped circuit is the right choice.
  • 15. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Examples Problem 1: For the given circuit, R= 40 Ω, L = 4 H, and C = 1/4 F. Calculate the characteristic roots of the circuit. Is the natural response overdamped, underdamped, or critically damped?
  • 16. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Examples s1 s2 52 1  5  5 52 1 s1 = -0.101; s2 =-9.899 This is also evident from the fact that the roots are real and negative. The roots are, R= 40 Ω, L = 4 H, C = 1/4 F => 2 0 2 2 2 0 2 1               s s 1 1 ; 5 2 0     LC L R   Since α > ω0, we conclude that the response is overdamped. The roots are real and negative.
  • 17. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Examples Problem 2: Find i(t) for t > 0. Assume that the circuit has reached steady state before the switch is opened.
  • 18. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Examples Solution: (a) for t < 0 (b) for t > 0. Under-damped response i(0)  10 4 6 0 2L 1 LC  R  6; 10 s  6 62 100 1 s2  6  62 100 s1,2  6  j8 v(0)  6i(0) 6V 1A;  
  • 19. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Examples Hence, A1 and A2 are found using the initial conditions. At t = 0, i(0) = 1 = A1 i(t)  e6t [A(cos8t) A (sin8t)] 1 2 di dt Taking the derivativeof i(t) dt t0   1 [Ri(0)v(0)] di  e6t (8)[A (sin 8t)  A (cos8t)] 1 2 t > 0 L  0A/ s 6e6t [A(cos8t) A (sin8t)] 1 2
  • 20. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Examples for t > 0 0  6(Α1 0)  8(0  A2) substituting Α11, 0  6  8A2  A2  0.75 Substituting the values of A1 and A2 yields the complete solutionas, i(t)  e6t [(cos8t)0.75(sin8t)]A
  • 21. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Examples Problem 3: The switch was closed for a long time and opened at t = 0. Find: (a) i(0+), v(0+), (b) di(0+) ∕dt, dv(0+) ∕dt, (c) i(∞), v(∞).
  • 22. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Examples i(0-)=(12)/(4+2)=2A, v(0-) =2i(0-) =4V As the inductor current and the capacitor voltage cannot change abruptly, i(0+) = i(0-) = 2 A, v(0+) = v(0-) = 4V At t = 0+, the switch is open, same current flows through both the inductor and capacitor. Hence, iC(0+) = i(0+) = 2 A (a) t = 0- (b) t = 0+ (c) t → ∞
  • 23. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Examples vL is obtained by applying KVL in theloop, −12 + 4i(0+) + vL(0+) + v(0+) = 0 => vL(0+) = 12 − 8 − 4 = 0 => c dt dt C i (0 ) dv(0 ) dt c 2 C 0.1   Since, i  C dv ; dv  ic    20V/s L Also, v  L di ; di  vL dt dt L v (0 ) 0 0.25 di(0 ) dt L L      0A/s t = 0+
  • 24. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Examples Fort>0, • The circuit first undergoes through some transients. • As t → ∞, the circuit reaches steady state. The inductor acts like a short circuit and the capacitor like an open circuit. i(∞) = 0 A, v(∞) = 12V t → ∞
  • 25. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Step Response Of Series RLC Circuit  The step response is obtained by the sudden application of a DC source as shown below
  • 26. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 s dt L di  Ri  v V  Applying KVL around the loop for t > 0, dt where i  C dv  Substituting for i in the above equation and rearranging terms, s dt2 L dt LC LC d 2 v  R dv  v  V
  • 27. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956  The solution of the differential equation has two components:  Transient response vt(t): time-varying component of the total response that eventually dies out  Steady-state response vss: final steady state value at t → ∞ (t) v(t)  vt (t)  vss
  • 28. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956  In order to determine the transient part of solution, we let v  Aest where, A and s are constants to be determined  Substituting these values and carrying out the necessary differentiations we obtain, As2 est  AR sest  A est  0 L LC 2 st Or, Ae  s  R s  1   0  L LC     The two roots are, 1 R LC  R  2  R  2 s1   2L   1 ,s   R  LC 2 2L   2L  2L    
  • 29. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956  A more compact way of expressing the roots is, s   2 2 ,s   2 2 1 0 2 0 where, 0 2L 1 LC  R ,  The roots s1 and s2 are called natural frequencies, measured in nepers per second (Np/s), because they are associated with the natural response of the circuit  In terms of α and ω0, the response can be written as, 0 s2  2s2  0
  • 30. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Total Response Of Series RLC Circuit  Steady state response: is the final value of v(t) vss (t)  v() Vs The final value of the capacitor voltage is the same as the source voltage Vs (capacitor becomes open circuit in steady state).  Thus, the complete solution is, v(t) V  Aes1t  A es2t s 1 2 v(t) V  (A  A t)et s 1 2 v(t) V  ( A cost A sint)et s 1 d 2 d The values of the constants A1 and A2 are obtained from the initial conditions: v(0) and dv(0)∕dt. (Overdamped) (Critically damped) (Underdamped)
  • 31. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Examples Problem 1: For the circuit shown, find v(t) and i(t) for t > 0. Assume that the switch was closed for a long time before opening. Consider three cases: (a) R = 5 Ω, (b) R = 4 Ω, and (c) R = 1 Ω.
  • 32. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Examples Solution: (a): R = 5 Ω For t < 0, the capacitor behaves like an open circuit while the inductor acts like a short circuit. The initial current through the inductor is, i(0)  24  4A 51 5 Ω and the initial voltage across the capacitor is the same as the voltage across the 1Ω resistor, v(0)  1i(0) 4V
  • 33. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Examples For t > 0, the switch is opened, so that 1Ω resistor disconnected. The characteristic roots are determined as follows: 0  R   2.5,    2 5 2L 21 1 1 LC 10.25 1,2 0 s   2 2  1,4 Since α > ω0, we have the overdamped natural response. ss The total response is therefore  ( Aet  A e4t ) 1 2 vss is the final value of the capacitor voltage = 24V. => v(t)  24  (Aet  A e4t ) 1 2 5 Ω v(t)  v
  • 34. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Examples v(0)  4  24  A1  A2 => The current through the inductor cannot change abruptly and is the same current through the capacitor at t = 0+ because the inductor and capacitor are now in series. Hence, i(0)  C dV(0)  4, dV(0)  4  4 dt dt C 0.25 16 Determine A1 and A2 via initial conditions: 1 2 dt dV(0) 16  A  4A => A1 = −64/3, A2 = 4/3 3 v(t)  24  4 (16et  e4t ) dt i(t)  C dV 3 i(t)  4 (4et  e4t ) 5 Ω 20  A1  A2
  • 35. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Examples i(0)   4.8A 24 4 1 CASE 2: R = 4 Ω The initial current through the inductor is and the initial voltage across the capacitor is v(0)  1;i(0) 4.8V 4 Ω  R   2 4 2L 21 For the characteristic roots, ω0 =2 s1 = s2 = −α = −2 => critically damped response v(t)  v  (A  A t)e2t  v(t)  24 (A  A t)e2t ss 1 2 1 2
  • 36. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Examples Since i(0) = C dv(0)∕dt = 4.8, 1 2 2 dt dV  (2A  2tA  A )e2t 1 2 dt dV (0)  19.2 2A  A 2 => A = 19.2 v(t)  24 19.2(1 t)e2t The inductor current is the same as the capacitor current i(t) = Cdv(t)∕dt multiplying by C = 0.25 and substituting the values of A1 and A2 intodv∕dt i(t)  (4.8  9.6t)e2t v(0)  4.8  24  A1 A1 19.2 4 Ω Thus, dV (0)  4.8  19.2 dt C To find A1 and A2, we use the initial conditions
  • 37. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Examples CASE 3: R = 1 Ω 24 The initial inductor current is 12A 11 v(0) 1;i(0) 12V  R   0.5 1 2L 21 Since α = 0.5 < ω0 = 2, we have the under-damped response s   2 2  0.5 j1.936 1,2 0 The total response is therefore, v(t)  24(A cos1.936t  Asin1.936)e0.5t and the initial voltage across the capacitor is the same as the voltage across the 1Ω resistor, i(0) 
  • 38. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Examples v(0)  12  24  A1 A112 Since, i(0) = C dv(0)∕dt = 12, dV (0)  12  48 dt C 1 2 1 2 dt dv  e0.5t (1.936Asin1.936t 1.936Acos1.936t) 0.5e0.5t ( Acos1.936tAsin1.936t) 2 1 dt dv(0) 48(0 1.936 A) 0.5(A0) Substituting A1 = −12 gives A2 =21.694 v(t) 24(21.694sin1.936t12cos1.936t)e0.5t Multiplying by C = 0.25 and substituting the values of A1and A2 into dv∕dt i(t)  (3.1sin1.936t 12cos1.936t)e0.5t 1 Ω In order to determine A1 andA2,
  • 39. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Examples (R=1Ω) (R = 4 Ω) (R = 5 Ω) Critically damped circuit gives fastest response without any over-shooting
  • 40. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Step Response Of Parallel RLC Circuit  With the sudden application of a DC current, we need to determine i in the following circuit.
  • 41. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956  Applying KCL at the top node for t > 0, s V  i C dV  I R dt dt Here, v  L di  Substituting for v and dividing by LC, we get s d2 i  1 di  i  I dt2 RC dt LC LC  The complete solution consists of the transient response it(t) and the steady-state response iss, i(t)  it (t) iss
  • 42. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956  We obtain the characteristic equation by replacing the first derivative by s and the second derivative by s2, 1 RC LC s2  1 s   0  The roots of the characteristic equation are 1,2 s   2 2 where, 0 1 2RC 1 LC  ,   There are three possible solutions, depending on whether α > ω0, α = ω0, or α < ω0
  • 43. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Total Response Of Parallel RLC Circuit The final steady-state value of the current through the inductor is the same as the source current Is  The total response can be given as, i(t)  I  Aes1t  A es2t s 1 2 i(t)  I  (A  A t)et s 1 2 i(t)  I  ( A cost A sint)et s 1 d 2 d The constants A1 and A2 in each case can be determined from the initial conditions i(0) and di(0)∕dt (Overdamped i.e. α > ω0) (Critically damped i.e. α = ω0) (Underdamped i.e. α < ω0)
  • 44. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Examples Problem:In the circuit shown, find i(t) and iR(t) fort> 0. Assume theswitch is openforalongtimebefore closing.
  • 45. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Solution: For t < 0, the switch is open, and the circuit is partitioned intotwo independent sub-circuits.The4-A current flows through the inductor i.e. i(0)  4A Since 30u(− t) = 30 when t < 0 and = 0 when t > 0, the voltage source is operative for t < 0. By voltage division, the initial capacitor voltage is v(0)  (30) 15V 20 20 20
  • 46. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 For t>0, equivalent parallel resistance 1,2 0   2 2  6.25 39.0625 6.25  6.25 5.7282  s1 11.978, s2 0.5218 Since α > ω0, we have the over-damped case s 1 2  i(t)  I  Ae11.978t  A e0.5218t R = 20||20 = 10 Ω  1 2RC  1  6.25 2108103  o  1 LC  1  2.5 208103 The characteristic roots are: s s where I = 4 is the final value of i(t). We now use the initial conditions to determine A1 andA2. At t = 0, i(0)  4  4  A1 A2  A2 A1
  • 47. BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956 Taking thederivativeof i(t), 1 2 dt di  11.978Ae11.978t  0.5218A e0.5218t so that at t = 0, di(0)  11.978A  0.5218A, dt 1 2 L di(0)  v(0) 15, dt di(0)  15  15 0.75 dt L 20 Substituting A1 = -A2 we get, 0.75  (11.9780.5218)A2 A2 0.0655 Thus the complete solution is i(t)  4  0.0655(e0.5218t  e11.978t )A From i(t) we obtain v(t) = L di∕dt, R 20 20 dt i (t)  v(t)  L di  0.785e11.978t  0.0342e0.5218t A